JPS621255U - - Google Patents
Info
- Publication number
- JPS621255U JPS621255U JP9134985U JP9134985U JPS621255U JP S621255 U JPS621255 U JP S621255U JP 9134985 U JP9134985 U JP 9134985U JP 9134985 U JP9134985 U JP 9134985U JP S621255 U JPS621255 U JP S621255U
- Authority
- JP
- Japan
- Prior art keywords
- data
- external trigger
- memory
- processor
- processing device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000013481 data capture Methods 0.000 claims 2
- 238000000034 method Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Description
第1図はこの考案によるデータ処理装置の一例
を示すブロツク図、第2図はその動作の説明に供
するためのタイムチヤート、第3図はデータ処理
器15の動作の例を示す流れ図、第4図は第1図
の一部変形を示す図、第5図は他の例におけるタ
イムチヤート、第6図は第5図と対応したデータ
処理装置のブロツク図、第7図は従来のデータ処
理装置の動作を示すタイムチヤートである。
11:データ入力端子、12:AD変換器、1
3:クロツク発生器、14:データメモリ、15
:データ処理器、16:外部トリガ入力端子、1
7:書込み制御回路、25:取込みデータが一定
数となつたことを検出するカウンタ、27:表示
器。
FIG. 1 is a block diagram showing an example of the data processing device according to this invention, FIG. 2 is a time chart for explaining its operation, FIG. 3 is a flowchart showing an example of the operation of the data processor 15, and FIG. The figure shows a partial modification of Fig. 1, Fig. 5 is a time chart in another example, Fig. 6 is a block diagram of a data processing device corresponding to Fig. 5, and Fig. 7 is a conventional data processing device. This is a time chart showing the operation. 11: Data input terminal, 12: AD converter, 1
3: Clock generator, 14: Data memory, 15
: Data processor, 16: External trigger input terminal, 1
7: Write control circuit, 25: Counter that detects when the number of captured data reaches a certain value, 27: Display device.
Claims (1)
ータに変換してデータメモリに書込み、そのデー
タメモリ内のデータをデータ処理器で一定数だけ
読出してデータ処理を行うデータ処理装置におい
て、 上記入力アナログデータと関連した外部トリガ
が入力され、その外部トリガの存在している間、
上記データメモリに対し書込み動作を行う書込み
制御回路と、 上記外部トリガの初めから一定数のデータを取
込むとそれを上記データ処理器へ通知し、これを
起動させる通知手段と、 上記データ処理器はその取込んだ一定数のデー
タを処理するごとに上記データメモリの最新の上
記一定数のデータの取込み処理を繰り返す手段と
、 上記外部トリガの終りが上記データ処理器に通
知されてその直前のデータ取込みでデータの取込
みを中止する手段とを具備するデータ処理装置。[Claims for Utility Model Registration] A data processing device that converts input analog data into digital data using an AD converter, writes it into a data memory, and processes the data by reading out a certain number of data from the data memory using a data processor. , an external trigger associated with the above input analog data is input, and while the external trigger exists,
a write control circuit that performs a write operation on the data memory; a notification means that notifies the data processor when a certain number of data are taken in from the beginning of the external trigger and activates the data processor; means for repeating the process of acquiring the latest constant number of data in the data memory every time the acquired constant number of data is processed; A data processing device comprising: means for stopping data capture during data capture.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9134985U JPH035958Y2 (en) | 1985-06-17 | 1985-06-17 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9134985U JPH035958Y2 (en) | 1985-06-17 | 1985-06-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS621255U true JPS621255U (en) | 1987-01-07 |
JPH035958Y2 JPH035958Y2 (en) | 1991-02-15 |
Family
ID=30647165
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9134985U Expired JPH035958Y2 (en) | 1985-06-17 | 1985-06-17 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH035958Y2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015143643A (en) * | 2014-01-31 | 2015-08-06 | アンリツ株式会社 | Device and method for signal analysis |
JP2015143642A (en) * | 2014-01-31 | 2015-08-06 | アンリツ株式会社 | Device and method for signal analysis |
-
1985
- 1985-06-17 JP JP9134985U patent/JPH035958Y2/ja not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015143643A (en) * | 2014-01-31 | 2015-08-06 | アンリツ株式会社 | Device and method for signal analysis |
JP2015143642A (en) * | 2014-01-31 | 2015-08-06 | アンリツ株式会社 | Device and method for signal analysis |
Also Published As
Publication number | Publication date |
---|---|
JPH035958Y2 (en) | 1991-02-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS621255U (en) | ||
JPS5336149A (en) | Information processing system | |
JPS5994393U (en) | Image processing device | |
JPS60184198U (en) | In-home device for handwritten image communication | |
JPS6047054U (en) | arithmetic processing unit | |
JPS605404Y2 (en) | Input data processing circuit | |
JPS62195805U (en) | ||
JPS6074337U (en) | random pattern generator | |
JPS59178703U (en) | digital output circuit | |
JPS60131060U (en) | Image processing device | |
JPS5851352U (en) | analog input controller | |
JPS5897605U (en) | Controller for batch processing using multiprocessor | |
JPS58138141U (en) | Analog input capture device | |
JPH01103916U (en) | ||
JPS59156605U (en) | Abnormal electrocardiogram recognition device | |
JPS59130158U (en) | pattern recognition device | |
JPS6092343U (en) | data acquisition device | |
JPS60189184U (en) | image encoding device | |
JPS5842676U (en) | Radiation monitoring device | |
JPS60158369U (en) | Image binarization device | |
JPS5897658U (en) | Computer time automatic correction device | |
JPS5870839U (en) | Assembly line work instruction device | |
JPS59100337U (en) | DMA control circuit | |
JPS6151554U (en) | ||
JPS59187778U (en) | signal input device |