JPS621255U - - Google Patents

Description

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of the data processing device according to this invention, FIG. 2 is a time chart for explaining its operation, FIG. 3 is a flowchart showing an example of the operation of the data processor 15, and FIG. The figure shows a partial modification of Fig. 1, Fig. 5 is a time chart in another example, Fig. 6 is a block diagram of a data processing device corresponding to Fig. 5, and Fig. 7 is a conventional data processing device. This is a time chart showing the operation. 11: Data input terminal, 12: AD converter, 1
3: Clock generator, 14: Data memory, 15
: Data processor, 16: External trigger input terminal, 1
7: Write control circuit, 25: Counter that detects when the number of captured data reaches a certain value, 27: Display device.

Claims (1)

[Claims for Utility Model Registration] A data processing device that converts input analog data into digital data using an AD converter, writes it into a data memory, and processes the data by reading out a certain number of data from the data memory using a data processor. , an external trigger associated with the above input analog data is input, and while the external trigger exists,
a write control circuit that performs a write operation on the data memory; a notification means that notifies the data processor when a certain number of data are taken in from the beginning of the external trigger and activates the data processor; means for repeating the process of acquiring the latest constant number of data in the data memory every time the acquired constant number of data is processed; A data processing device comprising: means for stopping data capture during data capture.