JPS62124780A - Optical semiconductor module - Google Patents

Optical semiconductor module

Info

Publication number
JPS62124780A
JPS62124780A JP60263891A JP26389185A JPS62124780A JP S62124780 A JPS62124780 A JP S62124780A JP 60263891 A JP60263891 A JP 60263891A JP 26389185 A JP26389185 A JP 26389185A JP S62124780 A JPS62124780 A JP S62124780A
Authority
JP
Japan
Prior art keywords
optical semiconductor
semiconductor element
insulating substrate
semiconductor module
optical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60263891A
Other languages
Japanese (ja)
Inventor
Shinya Sasaki
慎也 佐々木
Hiroyuki Nakano
中野 博行
Katsuki Tanaka
田中 捷樹
Minoru Maeda
稔 前田
Eiichi Adachi
安達 栄一
Tsutomu Yoshiya
吉屋 勉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60263891A priority Critical patent/JPS62124780A/en
Publication of JPS62124780A publication Critical patent/JPS62124780A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance

Landscapes

  • Semiconductor Lasers (AREA)
  • Light Receiving Elements (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Optical Couplings Of Light Guides (AREA)

Abstract

PURPOSE:To inhibit a parasitic reactance component extremely, and to enable the operation of a GHZ zone by fixing an optical semiconductor element to one surface of an insulating substrate and forming an electrode lead to the other surface of the insulating substrate. CONSTITUTION:Positive and negative electrodes for an optical semiconductor element are connected to electrical patterns 12, 12' on an insulating substrate 15, to which metallizing is executed, through bonding wires 9, 9', but the insulating substrate 15 is connected electrically to each electrode lead 3, 3' through through-holes 13, 13'. The electrode leads 3, 3' may have length required for soldering to the substrate, thus reducing parasitic inductance. Since the through- holes 13, 13' are used, parasitic inductance in a package is also reduced, thus enabling high-frequency operation.

Description

【発明の詳細な説明】 〔発明の利用・分野〕 本発明は、発光または受光用の光半導体モジュールに関
するものである。
DETAILED DESCRIPTION OF THE INVENTION [Use/Field of the Invention] The present invention relates to an optical semiconductor module for emitting or receiving light.

〔発明の背景〕[Background of the invention]

従来、この種の光半導体モジュール(G、D。 Conventionally, this type of optical semiconductor module (G, D.

Khoe et+a1.  “Progress in
 Monomode○ptical  −Fiber 
 Interconnection  Devices
”、アイ・イー・イー・イー、ジャーナル・オブ・ライ
トウニイブ・チクノロシイ、VOl、LT−2、Nα3
、p 、 217 (1984) )では、半導体素子
のマウント方法や半導体素子と光ファイバとの結合につ
いては詳細に検討されているが、モジュールの電気的実
装方法の問題を認識していない。
Khoe et+a1. “Progress in
Monomode○ptical -Fiber
Interconnection Devices
”, I.E.I., Journal of Light University Chikunoroshii, VOl, LT-2, Nα3
, p. 217 (1984)) discusses in detail the method of mounting semiconductor elements and the coupling of semiconductor elements with optical fibers, but does not recognize the problem of the method of electrically mounting modules.

従来の光半導体モジュールでは、第6図に示すように、
光半導体モジュールを駆動させる電極リード3がモジュ
ール筐体であるパッケージ2の側面中央部から外部に出
ている。上記モジュールを基板に実装する場合には、第
7図に示すように基板4上のパタン5に電極リード3を
はんだ付けするため、上記電極リード3を曲げる必要が
ある。
In the conventional optical semiconductor module, as shown in Fig. 6,
Electrode leads 3 for driving the optical semiconductor module extend outside from the center of the side surface of the package 2, which is a module housing. When mounting the module on a board, the electrode leads 3 must be bent to solder them to the pattern 5 on the board 4 as shown in FIG.

このように実装を行うと電極リード3の長さが長くなり
、電極リード3に付随するインダクタンスが増大する。
When the electrode lead 3 is mounted in this manner, the length of the electrode lead 3 increases, and the inductance associated with the electrode lead 3 increases.

その結果、上記光半導体モジュールは高周波領域で動作
できない。また光半導体モジュールの従来例における断
面図を第8図に示す。
As a result, the optical semiconductor module cannot operate in a high frequency region. Further, a cross-sectional view of a conventional example of an optical semiconductor module is shown in FIG.

第8図において、3′はパッケージ2と電気的に接続さ
れた電極リード、6はキャップ7につけられたガラス等
の透明な窓、8は発光または受光機能を有する半導体素
子でいわゆる光半導体素子、9は上記光半導体素子8と
電極リード3とを電気的に接続するためのボンディング
ワイヤ、10は電極リード3とパッケージ2とを電気的
に絶縁するための絶縁物である。上記モジュールを基板
実装する場合、電極リード3および3′を短かくしても
、モジュール内における電極リード部分のインダクタン
スおよび絶縁物10を介して電極リード3とパッケージ
2との間に生じるキャパシタンスによって、上記光半導
体モジュールも高周波領域で動作することができない。
In FIG. 8, 3' is an electrode lead electrically connected to the package 2, 6 is a transparent window such as glass attached to the cap 7, and 8 is a semiconductor element having a light emitting or light receiving function, which is a so-called optical semiconductor element. 9 is a bonding wire for electrically connecting the optical semiconductor element 8 and the electrode lead 3, and 10 is an insulator for electrically insulating the electrode lead 3 and the package 2. When the above module is mounted on a board, even if the electrode leads 3 and 3' are shortened, the above-mentioned optical Semiconductor modules also cannot operate in the high frequency range.

〔発明の目的〕[Purpose of the invention]

本発明は、電気的実装方法を考慮し、かつ高周波領域で
の動作が可能な光半導体モジュールを得ることを目的と
する。
An object of the present invention is to obtain an optical semiconductor module that takes electrical packaging methods into consideration and is capable of operating in a high frequency region.

〔発明の概要〕[Summary of the invention]

本発明による光半導体モジュールは、発光または受光機
能を有する光半導体素子を含む光半導体モジュールにお
いて、絶縁性基板の一方の面に光半導体素子を直接また
はサブマウントを介して固着し、上記光半導体素子に電
気信号を加えるため、あるいは電気信号を取出すための
電極リードを、上記絶縁性基板の他方の面に設けたこと
により、電極リードは光半導体モジュールの底面から外
部に出るため、トランジスタ、IC1抵抗などを搭載し
た基板上に電気的に実装する場合は、上記光半導体モジ
ュールの電極リードを基板上にはんだ付けするだけで固
定が可能になる。しかも上記電極リードは光半導体モジ
ュールの底面から出ているため、その長さははんだ付け
に必要な長さだけでよく、寄生インダクタンスを極力抑
えることができるので、上記光半導体モジュールは高速
動作が可能になる。
The optical semiconductor module according to the present invention includes an optical semiconductor element having a light emitting or light receiving function, in which the optical semiconductor element is fixed to one surface of an insulating substrate directly or via a submount, and the optical semiconductor element is fixed to one surface of an insulating substrate. By providing an electrode lead for applying an electric signal to or taking out an electric signal on the other side of the insulating substrate, the electrode lead exits from the bottom of the optical semiconductor module, so that the transistor, IC1 resistor When electrically mounting the optical semiconductor module on a board on which the optical semiconductor module is mounted, the optical semiconductor module can be fixed simply by soldering the electrode leads of the optical semiconductor module onto the board. Moreover, since the electrode leads come out from the bottom of the optical semiconductor module, their length is only required for soldering, and parasitic inductance can be suppressed as much as possible, allowing the optical semiconductor module to operate at high speed. become.

〔発明の実施例〕[Embodiments of the invention]

つぎに本発明の実施例を図面とともに説明する。 Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明による光半導体モジュールの第1実施例
を示す図で、(a)は正面図、(b)および(c)は側
面図、(d)は底面図、(e)は拡大断面図、第2図は
本発明の第2実施例の断面図。
FIG. 1 shows a first embodiment of an optical semiconductor module according to the present invention, in which (a) is a front view, (b) and (c) are side views, (d) is a bottom view, and (e) is an enlarged view. FIG. 2 is a cross-sectional view of a second embodiment of the present invention.

第3図は本発明の第3実施例を示す断面図、第4図は本
発明の第4実施例を示す断面図、第5図は本発明の第5
実施例を示す断面図である。
3 is a sectional view showing a third embodiment of the present invention, FIG. 4 is a sectional view showing a fourth embodiment of the invention, and FIG. 5 is a sectional view showing a fifth embodiment of the invention.
It is a sectional view showing an example.

第1図において、光半導体素子8は表面にメタライズを
施したサブマウント11にダイボンドされている。光は
キャップ7に付けられたガラス等の透明な窓6を介して
外部に取出し、または取込むようになっている。光半導
体素子の正、負の電極はボンディングワイヤ9.9′を
介してメタライズを施した絶縁性基板15上の電気的パ
タン12.12′に接続されるが、上記絶縁性基板15
は、スルーホール13.13’を介してそれぞれの電極
リード3.3′と電気的に接続されている。上記パッケ
ージの底には電極リード3.3′の他に、ケースにアー
スをとる必要があるときに使用できるように、金属パタ
ン14が設けられている。
In FIG. 1, an optical semiconductor element 8 is die-bonded to a submount 11 whose surface is metallized. Light is taken out or taken in to the outside through a transparent window 6 made of glass or the like attached to the cap 7. The positive and negative electrodes of the optical semiconductor element are connected to electrical patterns 12 and 12' on a metallized insulating substrate 15 via bonding wires 9 and 9'.
are electrically connected to the respective electrode leads 3.3' via through holes 13.13'. In addition to the electrode leads 3.3', the bottom of the package is provided with a metal pattern 14 for use when it is necessary to ground the case.

上記光半導体モジュールの構造では、電極り−ド3,3
′がパッケージの底面から出ているため、平らな電気部
品搭載用基板への実装が容易になる。
In the structure of the optical semiconductor module described above, the electrode electrodes 3, 3
′ protrudes from the bottom of the package, making it easy to mount it on a flat board for mounting electrical components.

また電極リード3.3′は上記基板へのはんだ付けに必
要な長さだけでよく、そのため寄生インダクタンスを小
さくすることができる。またスルーホール13.13′
を用いているため、パッケージ内部での寄生インダクタ
ンスも小さく、本光半導体モジュールは高周波動作が可
能であるという効果を有する。
Furthermore, the electrode leads 3.3' need only have the length necessary for soldering to the substrate, so that parasitic inductance can be reduced. Also through hole 13.13'
Because of this, the parasitic inductance inside the package is also small, and this optical semiconductor module has the advantage of being capable of high frequency operation.

第2図に示す第2実施例では、光の取出しまたは取込み
用に光ファイバ1を用い、該光ファイバ1はキャップ7
を貫通して外に出ている。
In the second embodiment shown in FIG. 2, an optical fiber 1 is used for extracting or introducing light, and the optical fiber 1 is connected to a cap 7
It passes through and comes out.

第3図に示す第3実施例は、光半導体素子8と光ファイ
バ1との光学的結合用のレンズ16をパッケージの中に
組込んでいる。この他に球レンズだけでなく、光アイソ
レータや偏光子、ハーフミラ−などの光学部品を、光半
導体素子8と光ファイバ1との間に設置して、モジュー
ルとすることもできる。
In the third embodiment shown in FIG. 3, a lens 16 for optically coupling the optical semiconductor element 8 and the optical fiber 1 is incorporated into the package. In addition to this, not only a ball lens but also optical components such as an optical isolator, a polarizer, and a half mirror can be installed between the optical semiconductor element 8 and the optical fiber 1 to form a module.

第4図に示す第4実施例は、光半導体素子8と電極リー
ド3.3′を電気的に接続するために、スルーホールで
はなく絶縁性基板15の端面に至るまで連続的にメタラ
イズを施して電気的パタン12.12’を形成し、上記
パタン12.12′と電極リード3.3′とをそれぞれ
溶接している。本実施例ではキャップ7を導電性材料で
形成しているため、上記パタン12.12′の絶縁用に
絶縁物17を用いている。
In the fourth embodiment shown in FIG. 4, in order to electrically connect the optical semiconductor element 8 and the electrode leads 3.3', metallization is continuously applied to the end surface of the insulating substrate 15 instead of through holes. Then, an electrical pattern 12.12' is formed, and the pattern 12.12' and the electrode lead 3.3' are welded to each other. In this embodiment, since the cap 7 is made of a conductive material, the insulator 17 is used to insulate the patterns 12 and 12'.

第5図に示す第5実施例は、光半導体素子8が固着して
いる絶縁性基板15の同一面上に集積回路18をダイボ
ンディングしており、このチップをボンディングワイヤ
9 # 、 9 ILLにより電気的パタン12.12
″に接続している6本実施例において5例えば光半導体
素子8に半導体レーザ、集積回路として上記半導体レー
ザ用の駆動回路ICを用いたとすると、上記半導体レー
ザと駆動回路ICが非常に近接して配置されるため、こ
れらの各素子の相互配線に伴う寄生リアクタンス成分を
小さくすることができ、半導体レーザを高速変調できる
という効果がある。
In the fifth embodiment shown in FIG. 5, an integrated circuit 18 is die-bonded on the same surface of an insulating substrate 15 to which an optical semiconductor element 8 is fixed, and this chip is bonded by bonding wires 9 # and 9 ILL. Electrical pattern 12.12
In this embodiment, for example, if a semiconductor laser is used as the optical semiconductor element 8, and the driver circuit IC for the semiconductor laser is used as an integrated circuit, the semiconductor laser and the driver circuit IC are very close to each other. Because of this arrangement, the parasitic reactance component associated with the interconnection of these elements can be reduced, and the semiconductor laser can be modulated at high speed.

〔発明の効果〕〔Effect of the invention〕

上記のように本発明による光半導体モジュールは、発光
または受光機能を有する光半導体素子を含む光半導体モ
ジュールにおいて、絶縁性基板の一方の面に光半導体素
子を直接またはサブマウントを介して固着し、上記光半
導体素子に電気信号を加えるため、あるいは電気信号を
取出すための電極リードを、上記絶縁性基板の他方の面
に設けたことにより、光半導体素子の電極に至るまでの
光半導体モジュールに付随する寄生リアクタンス成分を
極力抑えることができるため、従来の光半導体モジュー
ルでは動作不可能であったGHz帯の動作が可能になり
、また、絶縁性基板にあけたスルーホールと電極リード
とが溶接などによって接続されるため、気密封止が可能
になり、光半導体素子を保護する効果がある。
As described above, the optical semiconductor module according to the present invention includes an optical semiconductor element having a light emitting or light receiving function, in which the optical semiconductor element is fixed to one surface of an insulating substrate directly or via a submount, By providing an electrode lead on the other surface of the insulating substrate for applying an electric signal to the optical semiconductor element or for taking out an electric signal, it is attached to the optical semiconductor module up to the electrode of the optical semiconductor element. Since the parasitic reactance component caused by the insulating substrate can be suppressed as much as possible, it is possible to operate in the GHz band, which was impossible with conventional optical semiconductor modules. Since they are connected by , airtight sealing is possible, which has the effect of protecting the optical semiconductor element.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明による光半導体モジュールの第1実施例
を示す図で、(a)は正面図、(b)および(c)は側
面図、(d)は底面図、(e)は拡大断面図、第2図は
本発明の第2実施例を示す断面図、第3図は本発明の第
3実施例を示す断面図、第4図は本発明の第4実施例を
示す断面図、第5図は本発明の第5実施例を示す断面図
、第6図は従来の光半導体モジュールの外観図、第7図
は上記モジュールの基板実装状態を示す図、第8図は従
来の他の光半導体モジュールの断面図である。
FIG. 1 shows a first embodiment of an optical semiconductor module according to the present invention, in which (a) is a front view, (b) and (c) are side views, (d) is a bottom view, and (e) is an enlarged view. 2 is a sectional view showing a second embodiment of the invention, FIG. 3 is a sectional view showing a third embodiment of the invention, and FIG. 4 is a sectional view showing a fourth embodiment of the invention. , FIG. 5 is a sectional view showing a fifth embodiment of the present invention, FIG. 6 is an external view of a conventional optical semiconductor module, FIG. 7 is a view showing the above module mounted on a board, and FIG. FIG. 3 is a cross-sectional view of another optical semiconductor module.

Claims (6)

【特許請求の範囲】[Claims] (1)発光または受光機能を有する光半導体素子を含む
光半導体モジュールにおいて、絶縁性基板の一方の面に
光半導体素子を直接またはサブマウントを介して固着し
、上記光半導体素子に電気信号を加えるため、あるいは
電気信号を取出すための電極リードを、上記絶縁性基板
の他方の面に設けたことを特徴とする光半導体モジュー
ル。
(1) In an optical semiconductor module that includes an optical semiconductor element having a light emitting or light receiving function, the optical semiconductor element is fixed to one surface of an insulating substrate directly or via a submount, and an electrical signal is applied to the optical semiconductor element. An optical semiconductor module characterized in that an electrode lead for transmitting or extracting an electric signal is provided on the other surface of the insulating substrate.
(2)上記電極リードは、絶縁性基板に設けたスルーホ
ールを介して、上記光半導体素子と接続されていること
を特徴とする特許請求の範囲第1項に記載した光半導体
モジュール。
(2) The optical semiconductor module according to claim 1, wherein the electrode lead is connected to the optical semiconductor element via a through hole provided in an insulating substrate.
(3)上記電極リードは、絶縁性基板上から該絶縁性基
板の側壁にかけて設けた電気的パタンを介して上記光半
導体素子と接続されていることを特徴とする特許請求の
範囲第1項に記載した光半導体モジュール。
(3) The electrode lead is connected to the optical semiconductor element through an electrical pattern provided from an insulating substrate to a side wall of the insulating substrate. The optical semiconductor module described.
(4)上記光半導体素子は、上記光半導体モジュールに
設けた光ファイバと、光学的に結合されていることを特
徴とする特許請求の範囲第1項ないし第3項のいずれか
に記載した光半導体モジュール。
(4) The optical semiconductor element according to any one of claims 1 to 3, wherein the optical semiconductor element is optically coupled to an optical fiber provided in the optical semiconductor module. semiconductor module.
(5)上記光ファイバは、上記光半導体素子との間に、
光学部品を介在させていることを特徴とする特許請求の
範囲第4項に記載した光半導体モジュール。
(5) Between the optical fiber and the optical semiconductor element,
The optical semiconductor module according to claim 4, characterized in that an optical component is interposed.
(6)上記絶縁性基板は、光半導体素子の固着面上に、
電子回路または集積回路を設けたことを特徴とする特許
請求の範囲第1項ないし第5項のいずれかに記載した光
半導体モジュール。
(6) The insulating substrate is placed on the fixing surface of the optical semiconductor element,
An optical semiconductor module according to any one of claims 1 to 5, characterized in that an electronic circuit or an integrated circuit is provided.
JP60263891A 1985-11-26 1985-11-26 Optical semiconductor module Pending JPS62124780A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60263891A JPS62124780A (en) 1985-11-26 1985-11-26 Optical semiconductor module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60263891A JPS62124780A (en) 1985-11-26 1985-11-26 Optical semiconductor module

Publications (1)

Publication Number Publication Date
JPS62124780A true JPS62124780A (en) 1987-06-06

Family

ID=17395689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60263891A Pending JPS62124780A (en) 1985-11-26 1985-11-26 Optical semiconductor module

Country Status (1)

Country Link
JP (1) JPS62124780A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999062150A2 (en) * 1998-05-27 1999-12-02 Infineon Technologies Ag Housing arrangement for a laser module
EP1094355A1 (en) * 1999-10-19 2001-04-25 Corning Incorporated Electrical interconnection of planar lightwave circuits
JP2006245336A (en) * 2005-03-03 2006-09-14 Koito Mfg Co Ltd Light-emitting device
JP2011138970A (en) * 2009-12-29 2011-07-14 Sharp Corp Concentrating solar battery, concentrating solar battery module, and method of manufacturing the same
JP2014003062A (en) * 2012-06-15 2014-01-09 Mitsubishi Electric Corp Optical semiconductor device
JP2017063231A (en) * 2016-12-26 2017-03-30 ローム株式会社 Light-emitting element package and illumination device
US9997682B2 (en) 2010-12-28 2018-06-12 Rohm Co., Ltd. Light emitting element unit and method for manufacturing the same, light emitting element package and illuminating device
WO2021019914A1 (en) * 2019-07-30 2021-02-04 ソニーセミコンダクタソリューションズ株式会社 Semiconductor laser drive device, electronic apparatus, and method for manufacturing semiconductor laser drive device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5050884A (en) * 1973-09-05 1975-05-07
JPS575083A (en) * 1980-06-13 1982-01-11 Tokyo Shibaura Electric Co Display unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5050884A (en) * 1973-09-05 1975-05-07
JPS575083A (en) * 1980-06-13 1982-01-11 Tokyo Shibaura Electric Co Display unit

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999062150A2 (en) * 1998-05-27 1999-12-02 Infineon Technologies Ag Housing arrangement for a laser module
WO1999062150A3 (en) * 1998-05-27 2000-01-13 Siemens Ag Housing arrangement for a laser module
US6422766B1 (en) 1998-05-27 2002-07-23 Siemens Aktiengesellschaft Ag Housing configuration for a laser module
EP1094355A1 (en) * 1999-10-19 2001-04-25 Corning Incorporated Electrical interconnection of planar lightwave circuits
JP2006245336A (en) * 2005-03-03 2006-09-14 Koito Mfg Co Ltd Light-emitting device
JP2011138970A (en) * 2009-12-29 2011-07-14 Sharp Corp Concentrating solar battery, concentrating solar battery module, and method of manufacturing the same
US9997682B2 (en) 2010-12-28 2018-06-12 Rohm Co., Ltd. Light emitting element unit and method for manufacturing the same, light emitting element package and illuminating device
JP2014003062A (en) * 2012-06-15 2014-01-09 Mitsubishi Electric Corp Optical semiconductor device
JP2017063231A (en) * 2016-12-26 2017-03-30 ローム株式会社 Light-emitting element package and illumination device
WO2021019914A1 (en) * 2019-07-30 2021-02-04 ソニーセミコンダクタソリューションズ株式会社 Semiconductor laser drive device, electronic apparatus, and method for manufacturing semiconductor laser drive device

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