JPS62123781A - Photoelectric conversion element - Google Patents

Photoelectric conversion element

Info

Publication number
JPS62123781A
JPS62123781A JP60263123A JP26312385A JPS62123781A JP S62123781 A JPS62123781 A JP S62123781A JP 60263123 A JP60263123 A JP 60263123A JP 26312385 A JP26312385 A JP 26312385A JP S62123781 A JPS62123781 A JP S62123781A
Authority
JP
Japan
Prior art keywords
layer
photoelectric conversion
amorphous silicon
substrate
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60263123A
Other languages
Japanese (ja)
Inventor
Hitoshi Sannomiya
仁 三宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP60263123A priority Critical patent/JPS62123781A/en
Publication of JPS62123781A publication Critical patent/JPS62123781A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0236Special surface textures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022466Electrodes made of transparent conductive layers, e.g. TCO, ITO layers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To increase a light absorptance, increase a short-circuit current, improve a curve factor and improve photoelectric conversion efficiency by a method wherein a conductive electrode is formed on a substrate and fine unevenness is provided on its surface opposite to the substrate. CONSTITUTION:Indium-titanium oxide ITO is deposited on a metal substrate 11 made of stainless steel or the like to form a conductive layer 21 and fine unevenness is provided on its surface by a method such as varying evaporating time. In the same way, a buffer layer 22 made of tin oxide SnO2 is formed on the layer 21 to form a conductive electrode 12 of a double-layer composition. A P-type amorphous silicon layer 13, an I-type amorphous silicon layer 14 and an N-type amorphous silicon layer 15 are successively laminated on the electrode 12 as photoelectric converting layers and a transparent conductive layer 16 made of indium-tin oxide or the like and upper electrodes 16a and formed.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、アモルファスシリコンを用いた太陽電池など
に有利に■いられる光電変換素子に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a photoelectric conversion element that can be advantageously used in solar cells using amorphous silicon.

背景技術 典型的な先行技術は、第4図に示されている。Background technology A typical prior art is shown in FIG.

この光電変換素子1は、ステンレス鋼などから成る金属
基板2上に、P型アモルファスシリコン層3と、I型ア
モルファスシリコン層4と、N型アモルファス2972
層5とがこの順序で接合されて構成される。トI型アモ
ルファスシリコン層5上には、酸化インノウムースズ(
ISO)などから成る透明導電Wi6と、上部電極8と
がf↓空蒸着などによってそれぞれ形成される。透明導
電層6測から入射される光は、P型、I型およびN型ア
モル77久ンリコン層3〜5内で光電変換され、2生じ
た電流は、金属基板2と上部電極3とに接続される図示
しない外部の負荷に供給され、こうして太陽電池として
の機能が実現される。
This photoelectric conversion element 1 includes a P-type amorphous silicon layer 3, an I-type amorphous silicon layer 4, and an N-type amorphous silicon layer 2972 on a metal substrate 2 made of stainless steel or the like.
Layer 5 is joined in this order. On the type I amorphous silicon layer 5, innowous tin oxide (
The transparent conductive Wi6 made of ISO) or the like and the upper electrode 8 are respectively formed by f↓vacuum deposition or the like. Light incident from the transparent conductive layer 6 is photoelectrically converted within the P-type, I-type, and N-type amorphous layers 3 to 5, and the generated current is connected to the metal substrate 2 and the upper electrode 3. The solar cell is supplied to an external load (not shown), and thus functions as a solar cell.

このような先行技術では、透明導電層6の&而が平坦で
あるために光の反射率が大きく、したがって入射光量を
増加することができない。このためP型、■型およびN
型アそルアTスシリコン層3〜5における光の吸収率を
高めることができず、短絡層;嘉の増加および曲線因子
を改善することができない。
In such prior art, since the transparent conductive layer 6 is flat, the reflectance of light is high, and therefore the amount of incident light cannot be increased. Therefore, P type, ■ type and N type
It is not possible to increase the absorption rate of light in the silicon layers 3 to 5, and it is not possible to improve the increase in the short circuit layer and the fill factor.

発明が解決しようと士る間厘点 本発明の目的は、上述の技術的課題を解決し、短絡電流
の増加および曲線因子の改善を図り、これによって光電
変換効率を向上させるようにした光電変換素子を提供す
ることである。
An object of the present invention is to solve the above-mentioned technical problems, and to provide a photoelectric conversion system that increases the short circuit current and improves the fill factor, thereby improving the photoelectric conversion efficiency. The purpose is to provide an element.

問題点を解決するための手段 本発明は、基板と、 W板上に形成され、基板とは反対側の表面が微細な凹凸
に形成されている導電性電極と、前記導電性電極上に形
成される光電変換半導体層と、 前記光電変換半導体層上に形成される透明導電層とを含
むことを特徴とする光電変換素子である。
Means for Solving the Problems The present invention provides a substrate, a conductive electrode formed on the W plate and having a surface opposite to the substrate having fine irregularities, and a conductive electrode formed on the conductive electrode. This is a photoelectric conversion element characterized by comprising: a photoelectric conversion semiconductor layer formed by the photoelectric conversion semiconductor layer; and a transparent conductive layer formed on the photoelectric conversion semiconductor layer.

作  用 本発明に従えば、基板上に導電性電極を形成し、この導
電性電極の基板とは反対側の表面を微細な凹凸に形成す
ることによって、光の吸収率を高めて、光電変換効率の
向上を図ることができる。
Effect According to the present invention, a conductive electrode is formed on a substrate, and the surface of the conductive electrode opposite to the substrate is formed with fine irregularities to increase the light absorption rate and perform photoelectric conversion. Efficiency can be improved.

実施例 第1図は、本発明に従う光電変換素子10の断面図であ
る。この光電変換素子10は、基本的には、従来の光電
変換素子1(第4図参照)に類似した(1が成を有する
。すなわちステンレス鋼などから成る金属基板11上に
は、酸化インノウムースズから成る導電wJ21と、酸
化スズ(S1102)から成るバッフT層22との二層
購造を有する導電性電極12が形成される。この導電性
電極12上には、光電変換半導体層としてのP型アモル
ファスシリコン層13と、I型アモルファスシリコン層
14と、N型アモルファスシリコンN 15とがこの類
序で接合される。N型アモルファス2977層15上に
は、酸化インノウムースズなどから成る透明導電層16
と、上部電極16aとが真空蒸着などによってそれぞれ
形成される。
Embodiment FIG. 1 is a sectional view of a photoelectric conversion element 10 according to the present invention. This photoelectric conversion element 10 is basically similar to the conventional photoelectric conversion element 1 (see FIG. 4). A conductive electrode 12 is formed which has two layers: a conductive layer 21 made of conductive material WJ21 and a buffer T layer 22 made of tin oxide (S1102). The amorphous silicon layer 13, the I-type amorphous silicon layer 14, and the N-type amorphous silicon N 15 are bonded in this order.On the N-type amorphous 2977 layer 15, a transparent conductive layer 16 made of innowous tin oxide or the like is formed.
and the upper electrode 16a are formed by vacuum evaporation or the like.

本発明では、透明導電層16の表面の光の反射率を低下
させるために、導電性電極12の金属基板11に臨む面
とは反対側の面を粗面化、すなわち微細な凹凸に形成し
、これによって透明導電層16の表面を粗面化とした同
様な効果を得ようとするものである。透明導電層16の
表面を粗面化することによって、P型、■型およびN型
アモルファス2972層13〜15における光の吸収率
を高めることができ、これによって後述するように本発
明に従う光電変換素子10の光電変換効率の向上を図る
ことができる。
In the present invention, in order to reduce the light reflectance on the surface of the transparent conductive layer 16, the surface of the conductive electrode 12 opposite to the surface facing the metal substrate 11 is roughened, that is, formed into fine irregularities. This is intended to achieve the same effect as that of roughening the surface of the transparent conductive layer 16. By roughening the surface of the transparent conductive layer 16, it is possible to increase the light absorption rate in the P-type, ■-type, and N-type amorphous 2972 layers 13 to 15, thereby facilitating photoelectric conversion according to the present invention as described later. The photoelectric conversion efficiency of the element 10 can be improved.

導電性電極12を粗面化するにあたっては、金属フ、1
コ板11上に、まず真空蒸着やメッキ法などによって酸
化インノウムーチタン(ITO)を約数1000人の膜
厚で堆積させ、これによって導電層21を形成する。こ
のとき蒸着時間の変化および金Fi j3;板1】の温
度の変化などによって、導電層21の金属基板11に臨
む面とは反対側の面を、約数100Å以上の微細な凹凸
状に形成することができる。その後、導電層21上に真
空蒸着やメンキ法などによって酸化スズ(SnOz)を
約100人の膜厚でIll f貞させ、これ1こよって
パン77522を形成する。バ、77Wi22の導電J
?g21に臨む而とは反対側の面は、導電R1!21の
上記約100人夏、上の微細な凹凸形状とほぼ等しい凹
凸形状に形成される。
In roughening the surface of the conductive electrode 12, metal foil, 1
On the plate 11, indium titanium oxide (ITO) is first deposited to a thickness of about several thousand layers by vacuum evaporation or plating, thereby forming the conductive layer 21. At this time, due to changes in the deposition time and changes in the temperature of the gold plate 1, the surface of the conductive layer 21 opposite to the surface facing the metal substrate 11 is formed into fine irregularities of approximately several hundred Å or more. can do. Thereafter, tin oxide (SnOz) is deposited on the conductive layer 21 to a thickness of about 100 mm by vacuum evaporation or the Menki method, thereby forming a pan 77522. Conductive J of 77Wi22
? The surface opposite to the surface facing g21 is formed into a concavo-convex shape that is approximately the same as the fine concavo-convex shape above the conductive R1!21.

導電Wi21は、下部電極としてのは能を果たし、また
パンツ7に!122は、導電層21中に含まれるインノ
ウムの拡散を減少させる役割を果たす。このように導電
性電極12を、導電層21とバ・ン7TWJ22との二
JF!i構造とすることによって、光透過率を問題にす
る必要がなく、しから導電層21の粗面化をより容易に
コントロールすることができるという特長を有する。
The conductive Wi 21 functions as a lower electrode and also serves as the pants 7! 122 serves to reduce the diffusion of innoum contained in the conductive layer 21. In this way, the conductive electrode 12 is connected to the conductive layer 21 and the band 7TWJ22. By adopting the i-structure, there is no need to consider light transmittance as a problem, and the surface roughening of the conductive layer 21 can be more easily controlled.

このように金属基板11上に、粗面化した導電層12を
形成した後、導電性電極12上にグロー放電によるプラ
ズマCV D  (Cbemical V al+ou
rD eposition)法によって、P型アモルフ
ァスシリコン層13と、I型アモルファスシリコン11
.iと、N型アモルファス2932層15とをこの預序
でそれぞれ均一な膜厚で形成する。さら(こN型アモル
ファス2977層15上に、真空蒸着などによって酸化
インノウムーチタン(ITO)などから成る透明導電層
16を均一な膜厚で形成する。
After forming the roughened conductive layer 12 on the metal substrate 11 in this way, a plasma CVD (Cbemical V al+ou
A P-type amorphous silicon layer 13 and an I-type amorphous silicon layer 11 are formed by the rD deposition method.
.. i and the N-type amorphous 2932 layer 15 are formed with uniform thicknesses in this order. Furthermore, on this N-type amorphous 2977 layer 15, a transparent conductive layer 16 made of indium titanium oxide (ITO) or the like is formed with a uniform thickness by vacuum evaporation or the like.

これらP型、■型およびN型アモルファスシリフン層1
3〜15、および透明導電層16は、導電性電極12の
前記微細な凹凸上にそれぞれ堆積されることによって°
、透明導電層16の表面には、導電性電極12の前記微
細な凹凸形状がそのまま現れることとなる。したがって
導電性電極12を粗面化することによっ′〔、結果的に
は透明導電層1Gの表面を粗面化したと同様な効果を得
ることができる。
These P type, ■ type and N type amorphous silicon layers 1
3 to 15 and the transparent conductive layer 16 are respectively deposited on the fine irregularities of the conductive electrode 12.
, the fine irregularities of the conductive electrode 12 appear as they are on the surface of the transparent conductive layer 16. Therefore, by roughening the conductive electrode 12, it is possible to obtain the same effect as by roughening the surface of the transparent conductive layer 1G.

木兄町名の実験によれば、従来の光電変換素子1(第・
を図参照)における電流/電圧特性は、第2図のライン
!1で示されるとおりであり、本発明に従う光電変換索
子10の電流/電圧特性はラインア2で示されるとおり
である。この実験結果から明らかなように、光電変換素
子10の解放電圧は、従来の光電変換索子1と差異はな
いが、短絡電流と曲線因子に関してはその向上が見られ
、光電変換効率が高められていることが理解される。
According to Kinoe Machina's experiment, conventional photoelectric conversion element 1 (No.
The current/voltage characteristics at ! 1, and the current/voltage characteristics of the photoelectric conversion cable 10 according to the present invention are as shown in line 2. As is clear from the experimental results, the open voltage of the photoelectric conversion element 10 is the same as that of the conventional photoelectric conversion element 1, but the short circuit current and fill factor are improved, and the photoelectric conversion efficiency is increased. It is understood that

また0を来の光電変換索子1の分光感度特性は、第3図
のラインア3で示されるとおりであり、本発明に従う光
電変換素子10の分光感度特性は、ラインJ?4で示さ
れるとおりである。光電変換素子10では、導電性電極
12の表面が微細な凹凸に形成されているため、入射さ
れた光のイテ路長の増加およびキャリヤに対する実質的
な膜厚の減少が実現され、これによって光電変換素子1
0の収集効率が全体的に向上する。ラインノ4から明ら
かなように、特に入射光の長波長側iこおいては、尤の
緩衝の低下および導電性電極12の粗面化:こよる反射
光の増加によって、収集効率が極めて向上していること
が埋M3れる。
Further, the spectral sensitivity characteristics of the photoelectric conversion element 1 based on 0 are as shown by line 3 in FIG. As shown in 4. In the photoelectric conversion element 10, since the surface of the conductive electrode 12 is formed with fine irregularities, an increase in the path length of the incident light and a substantial reduction in the film thickness for carriers are realized. Conversion element 1
0 collection efficiency is improved overall. As is clear from Line No. 4, especially on the long wavelength side of the incident light, the buffering is reduced and the surface of the conductive electrode 12 is roughened, and the collection efficiency is extremely improved due to the increase in reflected light. The things that are happening are buried in M3.

このように本件光電変換素子10においては、■尤の散
乱効果による尤の行路長の増加、■ヌ4電性電極X2の
豪細な凹凸1こおける反射光の増加、■キャリヤ(電子
、正孔)に対する膜厚のり、に少、$P型、I型および
N型アモルファス2937層13〜15の膜厚の不均一
性による光のモ渉の低下などの利点を得ることができる
。この光電変換索子10を太陽電池として用いる場合、
11ガ記第2図および第3図の実験結果から、太陽電池
待避としての短絡電流の増加および曲線因子の改迎が期
待される。短絡電流の増加は、主に光電変換素子lOの
長波長感度が導電性電極12の微細な凹凸による光反射
の増加および各アモルファスシリコン層13〜15のv
厚による光の緩衝の低下によって実現される。また曲線
因子は、各アモルファスシリコン層13〜15の膜厚の
不均一性により、キャリヤに対する有効膜厚が実際の膜
厚上りも薄(なるため改善されると考えられる。なおス
テンレス鋼などから成る金属基板11上にP型、■型I
jよびN型アモルファス2937層13〜15を形成す
ることによって、粗面化される導電性電極]2は、透明
である必要はなく、また導電性電極12の膜厚設定ら自
由であり、太陽電池特性の最適化が図られるという利点
を有する。
In this way, in the present photoelectric conversion element 10, ■ an increase in the path length due to the scattering effect, ■ an increase in reflected light due to each fine unevenness of the four-electrode electrode X2, and ■ an increase in carriers (electrons, Advantages such as a small film thickness relative to the pores and a reduction in light interference due to the non-uniformity of the film thickness of the $P-type, I-type and N-type amorphous 2937 layers 13 to 15 can be obtained. When using this photoelectric conversion cord 10 as a solar cell,
From the experimental results shown in Figures 2 and 3 of Chapter 11, it is expected that the short circuit current will increase and the fill factor will improve as a solar cell evacuation. The increase in short-circuit current is mainly due to the long wavelength sensitivity of the photoelectric conversion element 10, the increase in light reflection due to the fine irregularities of the conductive electrode 12, and the voltage of each amorphous silicon layer 13 to 15.
This is achieved by reducing the light buffering due to thickness. In addition, the fill factor is considered to be improved because the effective film thickness for the carrier is thinner (even the actual film thickness) due to the non-uniformity of the film thickness of each amorphous silicon layer 13 to 15. P type, ■ type I on the metal substrate 11
The conductive electrode 2 whose surface is roughened by forming the N-type and N-type amorphous 2937 layers 13 to 15 does not need to be transparent, and the thickness of the conductive electrode 12 can be set freely. This has the advantage that battery characteristics can be optimized.

参考的に述べれば、従来のアモルファスシリコンを用い
た太陽電池の基板としては、ステンレス調以外にガラス
などの透光性材料が泪いちれている。プラス基板を用い
る場合、ガラス基板が絶縁体であるため、その表面に透
明導電膜を付着する必要があったが、最近ではその透明
導電膜の粗面化によって太陽電池の効率を向上させる試
みが行二なわれている。ところがステンレス鋼などの金
属基板の場合、アモルファスシリコン層を形成した後に
、透明導電膜を付着しなければならないということらあ
り、これまで試みられていなかっ嬬これはアモルファス
シリコンを用いた太陽’;H?aの場合、作成後の熱処
理によってそのアモルファスシリコン層の特性が大きく
変化するrこめ、大陽届池の効率を損なうことなく、表
面を咀面ft士ることは極めて困難を伴なうからである
。そこて′本発明においては、光入射側でなく反射の面
、rなわち導電性電極12の表面を微細な凹凸にして粗
面化することによって、入射′側を粗面化した揚重とほ
ぼ同等の効果を得るものである。
For reference, in addition to stainless steel, transparent materials such as glass are also commonly used as substrates for solar cells using conventional amorphous silicon. When using a positive substrate, since the glass substrate is an insulator, it was necessary to attach a transparent conductive film to its surface, but recently there have been attempts to improve the efficiency of solar cells by roughening the surface of the transparent conductive film. Two lines are being played. However, in the case of metal substrates such as stainless steel, it is necessary to attach a transparent conductive film after forming the amorphous silicon layer, and this has not been attempted so far. ? In the case of a, the properties of the amorphous silicon layer change significantly due to post-preparation heat treatment, and it is extremely difficult to polish the surface without impairing the efficiency of the Taiyo-chip. . Therefore, in the present invention, by roughening the reflective surface, i.e., the surface of the conductive electrode 12, instead of the light incident side, by making the surface roughened with fine irregularities, the light incident side is roughened. Almost the same effect can be obtained.

導電性電極12の材料としては、■コ易に+U而面する
ことが可能であること、■尤の吸収か少ない、特に長波
長光の吸収が少なり・こと、■比抵抗が充分に小さいこ
と、■アモルファススシリコン中ドープされてもそのセ
ル特性に大きな影′nを与えないこと、■基板との密着
性が良好でσ%に剥がれないこと、などの条件を満たせ
ばよく、:ijj記実施例で用いた酸化インノウムーチ
タン(I T □)や酸化スズ(SI+02)に限定さ
れない。
The material for the conductive electrode 12 should: ■ be able to easily form a +U surface; ■ have very little absorption, especially of long wavelength light; and ■ have a sufficiently low specific resistance. It is only necessary to satisfy the following conditions: ■ Even if it is doped into amorphous silicon, it does not have a large effect on the cell characteristics; ■ It has good adhesion to the substrate and does not peel off by σ%. It is not limited to innomium titanium oxide (I T □) and tin oxide (SI+02) used in the above examples.

前記実施例では、導電性電極12の4■面化は、蒸着時
間の変化および金属基板11の温度の変化などによって
行なうようにしたけれども、これ以外の方法、たとえば
圧延ローラによって微細な凹凸を形成するようにしても
よい。
In the above embodiment, the conductive electrode 12 is formed into four sides by changing the vapor deposition time and the temperature of the metal substrate 11, but it is also possible to form fine irregularities by other methods such as using a rolling roller. You may also do so.

前記実施例では、PIN購遣のアモルファスシリコン層
13〜15を導電性電極12上に形成したけれども、こ
れに限定されず、N I PlR造のアモルファスシリ
コン層を形成するようにしてもよく、また多層PIN#
湾遣または多層丁PN構造のアモルファスシリコン層を
形成するようにしてもよい。
In the above embodiment, the amorphous silicon layers 13 to 15 made of PIN were formed on the conductive electrode 12, but the present invention is not limited thereto, and an amorphous silicon layer made of NI PlR may be formed. Multilayer PIN#
The amorphous silicon layer may have a curved or multilayer PN structure.

本発明に従う光電変換素子は、太lia電池に限らず、
その他各種センサなと広範囲の技術分野に亘って実施さ
れることができる。
The photoelectric conversion element according to the present invention is not limited to the Tai Lia battery.
It can be implemented in a wide range of technical fields such as various other sensors.

効  果 以上のように本発明によれば、導電性電極の基板とは反
対側の表面を、微細な凹凸に形成することによって、光
吸収率を高めることができ、短絡電流の増加および曲線
因子を改善することができ、これによって光電変換効率
の向上を図ることができる。
Effects As described above, according to the present invention, by forming the surface of the conductive electrode opposite to the substrate into fine irregularities, it is possible to increase the light absorption rate, reduce the increase in short-circuit current, and reduce the fill factor. This makes it possible to improve photoelectric conversion efficiency.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の断面図、PS2図は電流/
電圧特性を示すグラフ、第3図は収集効率と波長との関
係を示すグラフ、第4図は先行技術を説明するだめの図
である。 1.10・・・光電変換素子、2.11・・・金属基板
、3〜5,13〜15・・・アモルファスシリコン層、
6.16・・・透明導電層、12・・・導電性電極、2
1・・・導電層、22・・・バッフrM 代理人  弁理士 口数 圭一部 第1図 電圧(v) 第2図 液長(mm) 第3図 尤 第4図
Figure 1 is a cross-sectional view of one embodiment of the present invention, and Figure PS2 is a current/
FIG. 3 is a graph showing the voltage characteristics, FIG. 3 is a graph showing the relationship between collection efficiency and wavelength, and FIG. 4 is a diagram for explaining the prior art. 1.10... Photoelectric conversion element, 2.11... Metal substrate, 3-5, 13-15... Amorphous silicon layer,
6.16... Transparent conductive layer, 12... Conductive electrode, 2
1... Conductive layer, 22... Baffle rM Agent Patent attorney Number of speakers Keiichi Figure 1 Voltage (v) Figure 2 Liquid length (mm) Figure 3 Figure 4

Claims (1)

【特許請求の範囲】 基板と、 基板上に形成され、基板とは反対側の表面が微細な凹凸
に形成されている導電性電極と、 前記導電性電極上に形成される光電変換半導体層と、 前記光電変換半導体層上に形成される透明導電層とを含
むことを特徴とする光電変換素子。
[Scope of Claims] A substrate, a conductive electrode formed on the substrate and having a surface opposite to the substrate having fine irregularities, and a photoelectric conversion semiconductor layer formed on the conductive electrode. and a transparent conductive layer formed on the photoelectric conversion semiconductor layer.
JP60263123A 1985-11-22 1985-11-22 Photoelectric conversion element Pending JPS62123781A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60263123A JPS62123781A (en) 1985-11-22 1985-11-22 Photoelectric conversion element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60263123A JPS62123781A (en) 1985-11-22 1985-11-22 Photoelectric conversion element

Publications (1)

Publication Number Publication Date
JPS62123781A true JPS62123781A (en) 1987-06-05

Family

ID=17385141

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60263123A Pending JPS62123781A (en) 1985-11-22 1985-11-22 Photoelectric conversion element

Country Status (1)

Country Link
JP (1) JPS62123781A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS642688A (en) * 1987-06-26 1989-01-06 Janome Sewing Mach Co Ltd Thread control in automatic thread tension sewing machine
EP0305928A2 (en) * 1987-08-31 1989-03-08 Solarex Corporation Method of depositing textured tin oxide
JPH0423149U (en) * 1990-06-13 1992-02-26
JPH05218469A (en) * 1992-02-05 1993-08-27 Canon Inc Photovoltaic element and manufacture thereof
WO2010041846A2 (en) 2008-10-06 2010-04-15 Lg Electronics Inc. Solar cell
JPWO2014064929A1 (en) * 2012-10-23 2016-09-08 パナソニックIpマネジメント株式会社 Solar cell

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS642688A (en) * 1987-06-26 1989-01-06 Janome Sewing Mach Co Ltd Thread control in automatic thread tension sewing machine
EP0305928A2 (en) * 1987-08-31 1989-03-08 Solarex Corporation Method of depositing textured tin oxide
JPH0423149U (en) * 1990-06-13 1992-02-26
JPH05218469A (en) * 1992-02-05 1993-08-27 Canon Inc Photovoltaic element and manufacture thereof
WO2010041846A2 (en) 2008-10-06 2010-04-15 Lg Electronics Inc. Solar cell
EP2240967A2 (en) * 2008-10-06 2010-10-20 LG Electronics Inc. Solar cell
EP2240967A4 (en) * 2008-10-06 2013-02-27 Lg Electronics Inc Solar cell
JPWO2014064929A1 (en) * 2012-10-23 2016-09-08 パナソニックIpマネジメント株式会社 Solar cell

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