JPS62122394A - Synchronizing signal generator for pll - Google Patents

Abstract

PURPOSE:To simplify a constitution and an adjustment by frequency dividing the output of a frequency specific times as long as a horizontal frequency specifically by the first frequency divider, comparing the phases of a signal obtained by specifically dividing the output from which a pulse is sampled according to the output thereof with the output of the second frequency divider and controlling one frequency. CONSTITUTION:An oscillator 1 oscillates the frequency of 4nfH (n is a natural number), 4fH divided by the 1/n divider 2 is divided by the 1/2 divider 3 to have 2fH, further divided by the 1/625 divider 4 to have a vertical synchronizing frequency fv. The 2fH is divided into two by the 1/2 divider 5 to have a horizontal synchronizing frequency fH. The 4fH is divided into 625 by the 1/625 divider 6 to have 2fv, inputted to a pulse sampler 8 as a signal for controlling a sampling timing, synchronizes with, for instance, the leading edge of the 2fv and one of the pulses of 4fsc is removed. The output of the pulse sampler 8 is applied to the 1/1135 divider 9 to have the fH. The phases of the fH and fH' are compared by a phase comparator 10, and an oscillator 7 is controlled by the output thereof. The 1/4 divider 11 divides the output of the oscillator 7 into four to form a chrominance sub-carrier frequency fsc.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a reference signal generating apparatus for a color television camera, and particularly to a PAL system reference signal generating apparatus.

<Prior Art> The color subcarrier frequency fsc and the horizontal synchronization frequency fH1 direct synchronization frequency of the PAL system, which is a single color television system, are standardized as follows.

f H= ”−’ f v −−−−−−−(1) f
s c −−f H+ −Tmf v −(2) fSC and fH, fv that completely satisfy equations (1) and (2)
is obtained by dividing the output of the FI'TI-reference signal generator, so that the least common multiple of fH, fsC is approximately 11
It's GH2, and it's very difficult.

The reason why fsc, fH, and fv were selected in this way is as follows.

In the PAL system, one color subcarrier of the color difference modulation axis is inverted once in one water period in order to minimize color errors due to phase distortion in the transmission system. For this reason, with l/2 interleaving, the phases of the color subcarriers of the inverted axes are aligned every horizontal interval, and when played back on a monitor, the dots are lined up vertically, making the so-called dots more noticeable. cause disturbance. For this reason, the relationship is 1/4 interleaved,
Arrange the dots in a checkered pattern, and then add f v /
By inverting the phase between fields using 2 offsets, the dot positions are inverted for each field to prevent dot interference.

Conventionally, to create such fSC and f), there are methods using a frequency calculator, a method using a phase-locked loop (PLL), and a pulse removal circuit that extracts pulses for each water period and vertical period (Japanese Patent Publication No. 60-27469). In addition, as a simple method, 1/161 of the reference frequency, which is 282n times the horizontal frequency, and l/162, which is the frequency n times the fSC, are used as P.
Synchronous control method using LL (Special Publication No. 59-1222)
No. 4).

<Problems to be Solved by the Invention> In the above-described method, the system using a frequency calculator is complicated in configuration and adjustment.

A system using a pulse removal circuit for extracting pulses has a complicated configuration.

Also, the base of 282n times the horizontal frequency is 1/l of the frequency 6
The method of synchronously controlling l/162, which is n times the frequency of L and fsc, using a PLL has a large error with respect to the standard (
fsc (approximately 0.7 Hz).

The present invention has been made in view of the drawbacks of the conventional example,
It is an object of the present invention to provide a PAL type synchronous signal generator that complies with standards by eliminating such drawbacks and at the same time having a simple configuration.

Means for Solving the Problems> In order to solve the above-mentioned conventional drawbacks, the present invention provides a first oscillator with a frequency four times that of the color subcarrier of the PAL system and a first oscillator with a frequency 4n times the horizontal frequency. a second oscillator, a first frequency divider that divides the output of the second oscillator by 71, and extracts pulses from the output of the first oscillator in synchronization with the output of the first frequency divider. A pulse extractor, a second frequency divider that divides the output of the pulse extractor by 1135, and a phase comparison between the 1/4n signal of the second oscillator and the output of the second frequency divider. It is characterized by having a phase comparator and controlling the frequency of the first or second oscillator by the output of one phase comparator.

Effect> In the configuration described in -E, the present invention divides the output of a frequency 4n times the horizontal frequency by T cloves by a first frequency divider,
According to the output of the first frequency divider, a pulse is extracted from the output of the first oscillator, and the phase of the signal obtained by dividing the extracted output by 1135 and the output of the second frequency divider is adjusted. Compare,
The frequency of either the first oscillator or the second oscillator is controlled based on the result of the phase comparison.

<Example> As described above, there is a relationship between the color subcarrier frequency fSC and the horizontal synchronization frequency f)l of the PAL system.
The relational expression f H+ + f v holds true, but if we multiply both sides by 4 and transform the expression, we get 4f sc = 1135fH + 2fy - - - (3)
4fsc-2fy=1135fH---(4)(5
) The numerator on the left side of the equation is 2 from a pulse with a frequency four times fSC.
It means extracting l copulses in fv period,
Equation (5) is expressed as fSC and f using the pulse extractor and PLL.
)l indicates a bar that can be synchronously coupled.

The present invention has been made by focusing on the principle stated in L. Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a first embodiment of the present invention. In Figure 1, l is an oscillator, 1, 2, 3.4, 5, 6, 9.1
1 is a frequency divider, and 7 is an oscillator 2, the oscillation frequency of which changes depending on the input signal. 8 is a pulse extractor, 10 is a phase comparator, and 12 is a low pass filter (LPF).

Oscillator 1 oscillates at a frequency of 4nf+ (n is a natural number),
The frequency is divided by the 1/n frequency divider 2 to obtain 4f).
fH is divided by a 1/2 frequency divider 3 to become 2fH, and further divided by 4 by a T-Ishioka frequency divider to become fV.

On the other hand, 2f)l is frequency-divided by 2 by the 1/2 frequency divider 5 to become fH.

In addition, 4f) (is divided by 625 by the 1/625 frequency divider 6, resulting in 2fV. 2fV is input to the pulse extractor 8 as a signal to control the sampling timing. The oscillator 2 shown as 7 oscillates 4fSC. do.

4 fsc is applied to the pulse extractor 8. The pulse extractor 8 operates to remove one of the 4fsc pulses in synchronization with the 2fv, for example, Il'/second rising edge.

As a result, a pulse having a frequency corresponding to the numerator on the left side of the above equation (5) is realized.

Further, the output of the pulse extractor 8 is added to a frequency divider 9 of -']=1-5 to become fH'.

f) l and fH' are phase-compared by a phase comparator 10, and the output thereof controls an oscillator 2 shown as 7 via a low-pass filter 12.

A 1/4 frequency divider 11 divides the output of the oscillator 2, shown as 7, by 4 to produce fSC.

Although the output of the phase comparator 10 is applied to the oscillator 2 shown as 7, it may be applied to the oscillator 1 shown as 1 as shown by the dotted line.

FIG. 2 is a block diagram of another embodiment of the invention. Second
In the drawings, elements having the same functions as those in FIG. In FIG. 2, lot is an oscillator 3, 102, 103 is a frequency divider, and 104 is a decoder.

An oscillator 3 designated as 101 oscillates at a frequency of 2 mfH. This output is divided by 2fH by the frequency divider 102.
becomes.

2fH is divided by 625 by the -1-frequency divider 103 to obtain fV, and the outputs of each stage of the frequency divider are applied to the decoder 104. In the decoder 104, 2fV is synthesized.

2fV synthesized by the decoder 104 as in the first embodiment
is input to the pulse extractor 8, and a pulse of 4fc is extracted.

In the embodiment of FIG. 2 as well, the output within the phase comparator controls the frequency of oscillator 27 or oscillator 3 shown at 101.

According to this embodiment, it is 1/62 as in the embodiment shown in FIG.
By providing one 1/625 frequency divider and a decoder instead of two 5 frequency dividers, the circuit configuration can be simplified.

<Effects of the Invention> As explained above, according to the present invention, a PAL synchronization signal generation device that satisfies the standards can be realized with a simple configuration.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a first embodiment of the invention, and FIG. 2 is a block diagram of a second embodiment of the invention. 1--1 oscillator l, 8-11-pulse extractor, 7
----Oscillator 2.10---One phase comparator. Applicant: Canon Co., Ltd.

Claims (1)

[Claims] 1) A first oscillator with a frequency 4 times the color subcarrier of the PAL system, a second oscillator with a frequency 4n times the horizontal frequency, and a second oscillator that divides the output of the second oscillator by 1/625×n. 1, a pulse extractor that extracts pulses from the output of the first oscillator in synchronization with the output of the first frequency divider, and a second frequency divider that divides the output of the pulse extractor by 1135. and a phase comparator that compares the phase of the 1/4n signal of the second oscillator and the output of the second frequency divider, and the frequency of the first or second oscillator is determined by the phase comparator output. A signal generating device for PAL, characterized in that it controls.