JPS62122120A - Manufacture of semiconductor substrate - Google Patents

Manufacture of semiconductor substrate

Info

Publication number
JPS62122120A
JPS62122120A JP323786A JP323786A JPS62122120A JP S62122120 A JPS62122120 A JP S62122120A JP 323786 A JP323786 A JP 323786A JP 323786 A JP323786 A JP 323786A JP S62122120 A JPS62122120 A JP S62122120A
Authority
JP
Japan
Prior art keywords
film
crystal semiconductor
single crystal
insulating film
semiconductor film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP323786A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP323786A priority Critical patent/JPS62122120A/en
Publication of JPS62122120A publication Critical patent/JPS62122120A/en
Pending legal-status Critical Current

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  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To reduce the parasitic capacitance of a semiconductor device and a single crystal semiconductor substrate, and to increase working speed by burying a first single crystal semiconductor film up to the same height as an insulating film on the substrate to a window section formed to the insulating film, shaping a polycrystalline semiconductor film onto the fist single crystal semiconductor film and irradiating the polycrystalline semiconductor film by heat rays or beams to change the polycrystalline semiconductor film into a second single crystal semiconductor film. CONSTITUTION:An insulating film 12 is formed onto the surface of a single crystal semiconductor substrate 11, a window is bored to the insulating film through photo-etching, a first single crystal semiconductor film 13 is buried, and the surface of the film 13 is flattened approximately to the surface of the insulating film 12. A polycrystalline or amorphous silicon film 14 is shaped onto the surface of the substrate through a CVD method, etc., and heat rays or beams are projected, heating the substrate 11 from the surface of the film 14 to melt the silicon film 14. The film 14 is recrystallized in a cooling process to form a second single crystal semiconductor film 15, thus shaping the flat single crystal semiconductor film 15. Accordingly, the thickness of the insulating film can be thickened, thus reducing the parasitic capacitance of the semiconductor device and a single crystal semiconductor substrate, then further increasing working speed.

Description

【発明の詳細な説明】 本発明は半導体基板の製造方法に係り、特に単結晶半導
体基板上に絶縁膜が窓開けして形成され、該窓部および
絶縁膜上に単結晶半導体膜が形成されて成る半導体基板
の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor substrate, and in particular, an insulating film is formed on a single-crystal semiconductor substrate by opening a window, and a single-crystal semiconductor film is formed on the window and the insulating film. The present invention relates to a method for manufacturing a semiconductor substrate comprising:

単結晶半導体基板表面に絶縁膜が窓開けして形成され、
該窓部および絶縁膜上に単結晶半導体膜が′形成された
半導体基板に関しては、最近Appl 。
An insulating film is formed by opening a window on the surface of a single crystal semiconductor substrate,
Regarding a semiconductor substrate in which a single crystal semiconductor film is formed on the window portion and the insulating film, there has recently been published in Appl.

Phys、 Lett、 38 f51 、 I Ma
rch 1981 に報告された技術がある。
Phys, Lett, 38 f51, I Ma
There is a technique reported in RCH 1981.

しかし、前記技術による単結晶半導体基板上の窓開けさ
れた絶縁膜上と窓部上に形成された単結晶半導体膜は、
窓部に於て単結晶半導体膜の段差を小さくするために、
絶縁膜の膜厚を小さくせねばならず、上記単結晶半導体
膜上に半導体装置を構成する場合に、単結晶半導体基板
と半導体装置との間に寄生する通気容量が小さくできず
、前記通気容量を小さくするために絶縁膜の厚さを厚く
すると、窓部の単結晶半導体膜の段差が大きくなり、単
結晶半導体膜に半導体装置を構成する場合に、前記段差
部上と5!:差するt極配線が段差部で段切れ断線を起
こす等の欠点がある。
However, the single crystal semiconductor film formed on the window-opened insulating film and the window portion on the single crystal semiconductor substrate using the above technique,
In order to reduce the step of the single crystal semiconductor film in the window area,
The thickness of the insulating film must be reduced, and when a semiconductor device is formed on the single crystal semiconductor film, the parasitic air capacitance between the single crystal semiconductor substrate and the semiconductor device cannot be reduced, and the air capacitance is reduced. If the thickness of the insulating film is increased in order to reduce the thickness of the insulating film, the step of the single crystal semiconductor film at the window portion becomes large, and when a semiconductor device is constructed using the single crystal semiconductor film, the difference between the step portion and the 5! : There is a drawback that the connecting T-pole wiring may break at the step and break.

本発明は上記欠点をなくし、単結晶半導体装置との寄生
容量の小さい高速の半導体装置を単結晶半導体膜に形成
する事およびtm配線の段差部での段切れ断線のない高
信頼度の半導体装n製作用半導体基板を提供すること全
目的とする。
The present invention eliminates the above-mentioned drawbacks, forms a high-speed semiconductor device with a small parasitic capacitance with a single-crystal semiconductor film in a single-crystal semiconductor film, and provides a highly reliable semiconductor device with no step breakage at the stepped portion of the TM wiring. The overall purpose is to provide a semiconductor substrate for manufacturing n.

上記目的を達成するための本発明の基本的構成は、単結
晶半導体基板表面には絶縁膜が窓開けして形成されて成
り、該窓部および絶縁膜上には単結晶半導体膜が形成さ
れた半導体基板に於て、上記絶縁膜の窓部に形成された
単結晶半導体膜の表面が周辺絶縁膜上の単結晶半導体膜
表面とほぼ平坦に形成されて成る事を%徴とする。
The basic structure of the present invention for achieving the above object is that an insulating film is formed on the surface of a single crystal semiconductor substrate with a window, and a single crystal semiconductor film is formed on the window and on the insulating film. In the semiconductor substrate, the surface of the single crystal semiconductor film formed in the window portion of the insulating film is substantially flat with the surface of the single crystal semiconductor film on the peripheral insulating film.

以下、本発明を実施例により詳述する。Hereinafter, the present invention will be explained in detail with reference to Examples.

第1図は本発明の半導体基板を製作する場合の裏作法を
示す実施例を半導体基板の断面図を工程順に示したもの
である。第1図では、まず単結晶半導体基板(81%)
110表面に熱酸化等により1ミクロン厚の絶縁膜(S
in、等)12を形成しホト・エツチングにより絶縁膜
の窓開けを行なう。次で窓部にエピタキシャル法により
第1の単結晶半導体膜13を埋込み形成し、その表面を
絶縁膜12の表面とほぼ平坦になるようにする。前記の
基板の表面にOVD法等により多結晶状またはアモルフ
ァス状のシリコン膜14i0.5ミクロン厚で形成し、
その表面から基板11’i1200℃程度に加熱しなが
ら熱線または光線を照射して前記シリコ/膜14を融解
し、冷却過程で再結晶化して第2の単結晶半導体膜15
を形成することにより、平坦な単結晶半導体膜15が形
成される。
FIG. 1 shows a cross-sectional view of a semiconductor substrate in order of steps in an embodiment showing a back-up method for manufacturing a semiconductor substrate of the present invention. In Figure 1, first, a single crystal semiconductor substrate (81%)
A 1 micron thick insulating film (S
(in, etc.) 12 is formed, and a window is opened in the insulating film by photo-etching. Next, a first single crystal semiconductor film 13 is buried in the window portion by an epitaxial method so that its surface is substantially flat with the surface of the insulating film 12. A polycrystalline or amorphous silicon film 14i with a thickness of 0.5 micron is formed on the surface of the substrate by an OVD method or the like,
The silico/film 14 is melted by irradiating heat rays or light rays while heating the substrate 11'i to about 1200° C. from its surface, and is recrystallized during the cooling process to form a second single crystal semiconductor film 15.
By forming , a flat single crystal semiconductor film 15 is formed.

この様に単結晶半導体基板表面に絶縁膜が窓開けして形
成され、該窓部および絶縁膜上に単結晶半導体膜か平坦
に形成された半導体基板を用いて上記単結晶半導体膜に
半導体装置を形成する場合に、絶縁膜の厚さが厚くでき
るので半導体装置と単結晶半導体基板との寄生容量が減
少し一層の高速性能力1得られると共に、単結晶半導体
膜に形成された半導体装置の′lt+lI!配線Inが
窓部の段差部で段切1れ断線することもなく、高歩留り
で且つ高信頼度の半導体装置が提供できる効果がある。
In this way, an insulating film is formed by opening a window on the surface of a single-crystal semiconductor substrate, and a semiconductor device is formed on the single-crystal semiconductor film by using a single-crystal semiconductor film or a flat semiconductor substrate on the window and the insulating film. When forming an insulating film, the thickness of the insulating film can be increased, which reduces the parasitic capacitance between the semiconductor device and the single crystal semiconductor substrate, resulting in further high-speed performance1. 'lt+lI! The wiring In is not broken or broken at the step portion of the window portion, and there is an effect that a semiconductor device with high yield and high reliability can be provided.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(a)は本発明を形成する為の1つの製
造工程を断面図で示したものである。 11・・・半導体基板 12・・・絶縁膜 13・・・第1の単結晶半導体膜 14・・・多結晶またはアモルファス半4体膜15・・
・第2の単結晶半導体膜 以   上 出願人 セイコーエプソン株式会社 (αン + φ  ↓ ↓ ↓ ↓ ↓ (dン 第1図
FIGS. 1(a) to 1(a) are cross-sectional views showing one manufacturing process for forming the present invention. 11... Semiconductor substrate 12... Insulating film 13... First single crystal semiconductor film 14... Polycrystalline or amorphous semi-quad film 15...
・Second single crystal semiconductor film or higher Applicant: Seiko Epson Corporation (α + φ ↓ ↓ ↓ ↓ ↓

Claims (1)

【特許請求の範囲】[Claims] 単結晶半導体基板、前記単結晶半導体基板上に絶縁膜を
形成する工程、前記絶縁膜にエッチングにより窓開けを
して窓部を形成する工程、前記窓部に第1の単結晶半導
体膜を前記絶縁膜とほぼ同じ高さまで埋込み形成する工
程、前記絶縁膜及び前記第1の単結晶半導体膜上に多結
晶状またはアモルフアス状の半導体膜を形成する工程、
熱線または光線を照射して前記多結晶状またはアモルフ
アス状の半導体膜を第2の単結晶半導体膜とする工程か
らなることを特徴とする半導体基板の製造方法。
a single-crystal semiconductor substrate, a step of forming an insulating film on the single-crystal semiconductor substrate, a step of forming a window by etching the insulating film, and a step of forming a first single-crystal semiconductor film in the window; a step of filling the insulating film to approximately the same height as the insulating film; a step of forming a polycrystalline or amorphous semiconductor film on the insulating film and the first single crystal semiconductor film;
A method for manufacturing a semiconductor substrate, comprising the step of irradiating the polycrystalline or amorphous semiconductor film with heat rays or light rays to form a second single-crystal semiconductor film.
JP323786A 1986-01-10 1986-01-10 Manufacture of semiconductor substrate Pending JPS62122120A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP323786A JPS62122120A (en) 1986-01-10 1986-01-10 Manufacture of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP323786A JPS62122120A (en) 1986-01-10 1986-01-10 Manufacture of semiconductor substrate

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP56104298A Division JPS586121A (en) 1981-07-02 1981-07-02 Semiconductor substrate

Publications (1)

Publication Number Publication Date
JPS62122120A true JPS62122120A (en) 1987-06-03

Family

ID=11551847

Family Applications (1)

Application Number Title Priority Date Filing Date
JP323786A Pending JPS62122120A (en) 1986-01-10 1986-01-10 Manufacture of semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS62122120A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS566444A (en) * 1979-06-28 1981-01-23 Chiyou Lsi Gijutsu Kenkyu Kumiai Production of semiconductor device
JPS5667923A (en) * 1979-11-07 1981-06-08 Toshiba Corp Preparation method of semiconductor system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS566444A (en) * 1979-06-28 1981-01-23 Chiyou Lsi Gijutsu Kenkyu Kumiai Production of semiconductor device
JPS5667923A (en) * 1979-11-07 1981-06-08 Toshiba Corp Preparation method of semiconductor system

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