JPS62121628U - - Google Patents

Info

Publication number
JPS62121628U
JPS62121628U JP19091486U JP19091486U JPS62121628U JP S62121628 U JPS62121628 U JP S62121628U JP 19091486 U JP19091486 U JP 19091486U JP 19091486 U JP19091486 U JP 19091486U JP S62121628 U JPS62121628 U JP S62121628U
Authority
JP
Japan
Prior art keywords
counter
micro program
carry
carry register
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19091486U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP19091486U priority Critical patent/JPS62121628U/ja
Publication of JPS62121628U publication Critical patent/JPS62121628U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のハードウエアによるタイマのブ
ロツク図、第2図は本考案の実施例を示すタイマ
装置のブロツク図、第3図は第2図の動作フロー
・チヤートである。 CTR:カウンタ、CLK:クロツク、INL
:初期値設定、CR:キヤリー、CR・RG:キ
ヤリー・レジスタ、RST:リセツト信号、ST
A:スタート、PST:プリセツト。
FIG. 1 is a block diagram of a conventional hardware timer, FIG. 2 is a block diagram of a timer device showing an embodiment of the present invention, and FIG. 3 is an operational flow chart of FIG. CTR: counter, CLK: clock, INL
: Initial value setting, CR: Carry, CR/RG: Carry register, RST: Reset signal, ST
A: Start, PST: Preset.

Claims (1)

【実用新案登録請求の範囲】 マイクロ・プログラムによりカウントの初期値
設定およびクロツクの変更をうけるフリーラン状
態のカウンタ、 該カウンタのキヤリー信号によりセツトされ、
マイクロ・プログラムによりリセツトされるキヤ
リー・レジスタ、 該キヤリー・レジスタのセツト出力をマイクロ
・プログラムにより計数するマイクロ・プログラ
ム・カウンタを設けたことを特徴とするタイマ装
置。
[Claim for Utility Model Registration] A counter in a free-running state whose initial value is set and whose clock is changed by a microprogram, which is set by a carry signal of the counter,
A timer device comprising: a carry register that is reset by a micro program; and a micro program counter that counts the set output of the carry register by the micro program.
JP19091486U 1986-12-11 1986-12-11 Pending JPS62121628U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19091486U JPS62121628U (en) 1986-12-11 1986-12-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19091486U JPS62121628U (en) 1986-12-11 1986-12-11

Publications (1)

Publication Number Publication Date
JPS62121628U true JPS62121628U (en) 1987-08-01

Family

ID=31144570

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19091486U Pending JPS62121628U (en) 1986-12-11 1986-12-11

Country Status (1)

Country Link
JP (1) JPS62121628U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52123145A (en) * 1976-04-09 1977-10-17 Fujitsu Ltd Time monitor system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52123145A (en) * 1976-04-09 1977-10-17 Fujitsu Ltd Time monitor system

Similar Documents

Publication Publication Date Title
JPS62121628U (en)
JPS60129748U (en) pulse width modulation circuit
JPH0449873U (en)
JPH02130130U (en)
JPS6264037U (en)
JPS6357523U (en)
JPH0398531U (en)
JPS60102690U (en) Radiation measuring instrument noise prevention circuit
JPS58124895U (en) Alarm signal holding circuit
JPS621237U (en)
JPS62203523U (en)
JPS61144495U (en)
JPH0163224U (en)
JPS61126347U (en)
JPS5857133U (en) Pulse width/code conversion circuit
JPS62203521U (en)
JPS60170834U (en) Reset circuit for microcomputer
JPS6183344U (en)
JPS6275597U (en)
JPH0458771U (en)
JPS62154540U (en)
JPS6330044U (en)
JPH02108438U (en)
JPH0174593U (en)
JPS5877943U (en) Multi-point sampling circuit