JPS62120079A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To highly integrate a semiconductor device while preventing a transistor from deteriorating in its characteristics by forming an element separating insulating film of MISFET in plural steps so that at least one of the steps does not include implanting of a channel cut high density impurity. CONSTITUTION:A silicon nitride film is grown on an SiO2 film 12 formed on a semiconductor substrate 11, with a mask 23 a nitride film pattern 13 is formed, and P-type impurity is implanted in high density for channel cut. Then, the impurity ions 14 are implanted only out of the pattern 13 (a). Then, with the second mask 24 the second nitride film pattern 13a is formed (b). Thereafter, when a field oxide film 15 is formed by thermally oxidizing, a channel cut layer 16 is formed thereunder, but this layer does not affect the other portion of the film 15. Accordingly, the same impurity density as the substrate is obtained over the entire width W (c), the pattern 13a, the oxide film 12 are then removed, a gate oxide film is newly formed, a gate electrode 17 is formed (d), an insulating film, a wiring layer are formed to complete a transistor (e).

Description

[Detailed Description of the Invention] [Summary] A method characterized in that an insulating film for element isolation of a former 5FET is formed through multiple steps, and at least one of these steps does not include the introduction of high-concentration impurities for channel cut. be.

[Industrial application field]

The present invention relates to a method for manufacturing a semiconductor device, and more specifically, to a method for manufacturing a MISFET that enables high integration while preventing deterioration of transistor characteristics.

[Conventional technology]

Selective oxidation method (LOGOS) is used in the manufacturing of semiconductor devices.
> forms an insulating film for element isolation on a semiconductor substrate. To explain the method with reference to Figure 3, first the (
As shown in FIG. 1, silicon dioxide (5.5%
iO2) film 32 is formed, and a silicon nitride film (5
iINa m+ (hereinafter simply referred to as a nitride film) is grown and patterned to form a nitride film pattern 33,
Next, impurities of the same conductivity type as the substrate for channel cathode are implanted at a high concentration by, for example, ion implantation. Note that in the figure, a point designated by the reference numeral 34 schematically indicates an implanted impurity ion.

Then, when oxidized, for example, by a thermal oxidation method, the result is shown in Fig. 3(b).
A SiO+ element isolation insulating film 35 shown in FIG. 1 is formed, and a channel cut layer 36 is formed thereunder. This insulating film is also called a field oxide film. After this thermal oxidation, impurities having a conductivity type opposite to that of the substrate are diffused to form source and drain regions (not shown).

Next, as shown in the same figure (C1), a gate electrode 37 made of polycrystalline silicon (polysilicon), for example, is grown, and an insulating film 38 made of a material such as phosphorus silicate glass (PSG) is formed thereon. Then, a wiring layer 39 of aluminum (8β), for example, is formed.

FIG. 4 is a plan view of the transistor in FIG. 3 (C1), and FIG. 3 (cl is a cross-sectional view taken along line III-I in FIG. , 41
and 42 are source and drain electrode windows. The illustrated pattern 43 is for forming an element isolation insulating film, in which elements are formed and a field oxide film is formed outside.

[Problem that the invention seeks to solve]

The width indicated by the symbol W in FIG. 3 (TC) and FIG. 4 is called the width in the channel direction of the transistor. The concentration of impurities in the substrate in the region indicated by W is one of the factors that determines the characteristics of the transistor, but impurities of the same conductivity type as the substrate are diffused at a high concentration under the field oxide film for channel cut. Therefore, in the region indicated by ΔW in FIG. 3(C), the concentration of impurities is higher than in the central portion of the substrate, and this region has an unfavorable or different influence on the characteristics of the transistor. Recently, transistors have become highly integrated, and W
is about 2.0 μm, so the effective part that determines the characteristics of the transistor is 2.0 μm − (
0,5+o,s) μm =1. It becomes small as OIIm.

This phenomenon is called the narrow channel effect, and it becomes larger as the degree of integration of transistors increases because the specific gravity of ΔW increases.

The present invention was created in view of these points, and
It is an object of the present invention to provide a method for preventing narrow channel effects in manufacturing FETs, thereby realizing high integration of transistors.

[Means for solving problems]

FIG. 1 is a sectional view of a main part of a semiconductor device in a step of carrying out the method of the present invention, and FIG. 2 is a plan view of a mask pattern for making the device of FIG.

In the illustrated embodiment, an initial oxide film 12 is formed on a semiconductor substrate 11, a silicon nitride film grown thereon is buttered to form a nitride film pattern 13, and an impurity of the same conductivity type as the substrate for channel cutting is formed. is implanted by ion implantation, then the nitride film pattern 13 is etched to form a smaller nitride film pattern 13a, and then a field oxide film 15 is formed by thermal oxidation.

[Effect]

In the method described above, the field oxide film is formed in multiple steps, and the final part of those steps (in each step, high-concentration impurity diffusion for channel cutting is not performed, so the field oxide film is formed in the central part of the substrate). Since the lower part of the end of the field oxide film towards which it is directed is no different from the part of the substrate into which impurities have not been introduced, a channel region is formed over the entire width of the W described above, and the narrow channel effect is prevented. It is.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

The method of the present invention will be explained by taking as an example a case where a field oxide film is formed in two steps.

In the present invention, the mask pattern shown in FIG. 2 is used,
In the figure, 23 and 24 are mask patterns for forming first and second field oxide films, 25 is a mask pattern for forming gate electrodes, and 26 is a mask pattern for forming contact windows.

First, referring to FIG. 1 (al), a semiconductor substrate (for example, p
5i called initial oxide film on 11 (type silicon substrate)
02 film 12 is formed, a silicon nitride film (hereinafter abbreviated as nitride film) is grown on it, and a nitride film pattern 13 is formed by patterning using the mask 23 in FIG. A high concentration of type impurities is implanted using ion implantation. Note that FIG. 1 is a cross-sectional view taken along line I--I in the figure when a device is formed using the mask pattern in FIG. 2.

The impurity ions implanted in FIG.
3 is not implanted, but is implanted only to the outside of the nitride film pattern 13 as shown.

Next, the nitride film pattern 13 is etched using the second mask 24 to form a second nitride film pattern 13a (FIG. 1(b)). In the figure, the nitride film removed by this patterning is indicated by a dotted line, but no impurity is introduced into the substrate portion below it.

Next, when the field oxide film 15 is formed by thermal oxidation, a channel cut layer 16 is formed under the field oxide film 15, as shown in FIG. Therefore, the same impurity concentration as the substrate is ensured over the entire width shown by W in FIG. 1(e), and the width of ΔW shown in FIG. 3(C) is No portions with different impurity concentrations are generated.

Thereafter, the nitride film pattern 13a is removed using a conventional technique, the initial oxide film 12 is removed, a new gate oxide film is formed, a gate electrode 17 is formed as shown in FIG. 1(d), and an insulating film, Wiring layers and the like are formed to complete the transistor shown in FIG. 1(fe). Note that the cutting direction of FIG. 22 is a cover film (PSG or nitride film).

〔Effect of the invention〕

As described above, according to the present invention, when a fine width in the channel direction is formed, reduction in the effective channel width due to channel cut diffusion is prevented, making it possible to form transistors with a high degree of integration. It has the effect of

[Brief explanation of drawings]

Figure 1 (fat to 1ll) is a cross-sectional view of an embodiment of the present invention, Figure 2 is a plan view of a mask pattern used in the process of Figure 1, Figure 3 (al to C) is a cross-sectional view of a conventional example, FIG. 4 is a plan view of the device of FIG. 3. 1 and 2, 11 is a semiconductor substrate, 12 is a SiO2 film, 13 and 13a are nitride film patterns, 14 is an impurity ion, 15 is a field oxide film, 16 is a channel cut layer, 17 is a gate electrode, 18 19 is a source region, 19 is a drain region, 20 is an insulating film, 21 is an i-wire, 22 is a cover pattern, 23 and 24 are mask patterns for forming a field oxide film, 25 is a mask pattern for forming a gate electrode, 26 is a contact window This is a mask pattern for formation. Rerogaga Yushi 1 Inventive material ゛j Lifeguard map G + @nzit + 4 To-1-z Suge tyv-yrt? 4
J2nd figure (A)

Claims (1)

[Claims] In manufacturing a metal insulator semiconductor field effect transistor (MISFET), a silicon dioxide film (12) is formed on a semiconductor substrate (11), a silicon nitride film is grown on the entire surface, and it is patterned. Silicon nitride film patterning to form a silicon nitride film pattern (13) to create an insulating film for element isolation is performed in multiple steps, and after each patterning of the silicon nitride film, a pattern is formed on the substrate (11) for channel cutting. A method for manufacturing a semiconductor device, characterized in that an impurity of the same conductivity type as that of a substrate is implanted, but the impurity is not implanted at least in the final patterning of a nitride film, and is then oxidized.