JPS62118390A - Driving of thin film transistor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a driving method for stably operating a thin film transistor (TPT) for a long period of time in a signal switch or transfer circuit using a thin film transistor (TPT).

2. Description of the Related Art Thin film transistors, in which the electrical conductivity of a semiconductor thin film is modulated by applying a voltage to the semiconductor thin film through an insulator layer formed on one surface of the semiconductor thin film, are easy to manufacture and have major advantages. Research and development has been promoted in recent years as a summer dynamic element for display devices using liquid crystals or electroluminescent elements because of its ability to increase the surface area.

The most important point in such thin film transistors is that they operate stably over a long period of time without fluctuations in device characteristics. FIG. 2 shows an example of the structure of a thin film transistor. Chromium having a predetermined width and length from several microns to several thousand microns on an insulating substrate 1 such as glass,
A gate electrode 2 made of metal such as gold or aluminum is provided, and a gate electrode 2 with a thickness of several 1,000 and 500 nm is provided to cover this electrode.
iC)2.

513N4. An insulating layer 3 made of A12O3 or the like is provided, and C is provided on the surface of the insulating layer 3 on the gate electrode 2.
A semiconductor layer 4 made of dS, CclSe, Si, etc. is provided, and a source electrode 6 and a drain electrode 6 are provided in contact with this semiconductor layer 4 with a predetermined interval of several microns to several tens of microns. An example of a method for driving this thin film transistor will be explained with reference to FIG. 3 using an inverter circuit. A drain voltage V is connected between the source terminal S and the drain terminal of the thin film transistor TFT1 via a load resistor RL.
A signal voltage VG is applied between D, S and the gate terminal G.

Usually used. Taking an n-channel enhancement mode thin film transistor having a threshold voltage vT of 1 to 3V as an example, VD and vG are set to positive potentials with S being a ground potential. As an example in FIG. 4, the pulse width t,
Pulse repetition time "Sec'eC" shows the output waveform of the voltage vOUT between D and RL for vG with voltage amplitude oV ~ 10v.ROff.

Ron is each TFT1O off resistance (VG=oV).

When on resistance (vG=10v), v1=Roff
vD/(Roff+RL)・v2=RonvD/
(Ron+RL).

Problems to be Solved by the Invention Thin film transistors have semiconductor layers and insulator layers formed by vacuum evaporation, CVD, or sputtering, but the film quality is polycrystalline or amorphous, and there are It includes a carrier trap level consisting of many defects and two-grain boundaries. Therefore, when a gate voltage with the same polarity is applied to an enhancement mode thin film transistor for a long time to form a channel, carriers (electrons or holes) gradually fill the trap level, and the current between S and D, drain current ID, There is a problem of reducing the

Means for Solving the Problems In order to solve the above problems, the present invention adds an element that applies a second voltage different from the signal voltage to the gate terminal of the thin film transistor, and connects the gate and source of the thin film transistor for a predetermined period of time. A voltage is applied to form a depletion layer between the two.

Function: According to the driving method of the present invention, the interface between the semiconductor and the insulating layer can be brought into a depletion state by applying the second gate voltage to the thin film transistor for a predetermined period of time. This allows the application of a signal voltage to a semiconductor.

Carriers trapped in the insulating layer and its interface can be released from the trap level, and variations in the electrical characteristics of the thin film transistor from their initial values can be extremely reduced.

Example Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an example in which the thin film transistor driving method according to the present invention is applied to an inverter circuit. In addition to the conventional circuit shown in FIG. 3, a second voltage vc is applied to the gate terminal G of the thin film transistor TFT1 together with the signal voltage vG, for example, via the second thin film transistor TPT2. At the gate of TPT2, VC is connected to TFT for a predetermined time.
The lock voltage φC required to apply to the gate terminal of l
is being applied. As an example, a voltage of vG+vc is applied to the gate terminal of TFTl in a time series as shown in FIG. In other words, the time when vG is at a low level (e.g. oV) (
During T-t), φC is set to high level for a period of t', and TPT2
is turned on and VC (for example, -sV) is applied to the gate of TFTl.

At this time, the low level v2' of vOUT' is exactly the same as v2 shown in the conventional example, but the high level v1' is higher than that in the conventional example when the off-resistance (VG=-sV) of TFT1 is higher than in the conventional example. 1' becomes a little higher than vl, but this is not a problem at all in practice. Also TFT
The sixth timing is the timing for applying vc to the gate terminal of l.
As shown in the figure, it is also possible to turn on φC and apply vc after the application of the signal voltage VG is finished or at a time when vG is not operating on the circuit.

Furthermore, there is a shift register as shown in FIG. 7 as a different embodiment of the present invention. CK1. From CK2 to v1 to v
After transferring the signal up to n, the transistor Q7 is turned on by the clock of CK3, and the potential Vc is supplied to the gate terminal of the thin film transistor Q. The signals at points A, B and 0 in FIG. 7 change as shown in FIG. As can be seen from Fig. 8, the 0 point is a predetermined potential vc for a certain period of time.
is set to vc is ■. Since the potential is lower than Q
The gate terminal of No. 4 has a lower potential than the source and drain terminals for a certain period of time (t'), and the interface between the semiconductor and the insulating layer becomes depleted, releasing the electrons trapped in the trap level and changing the transistor characteristics of TPT. can be restored to its initial state. Figure 9 shows the effect of the present invention investigated by the change over time in the drain current ID of a thin film transistor. In the thin film transistor having the structure shown in FIG. 2, the gate electrode 2 is SOO.
The insulator layer 3 is made of Al2O3 with a thickness of about 6,000 people, the semiconductor layer 4 is made of CdSe with a thickness of about 500 people, and the source/drain electrodes 5. As for No. 6, Al having a film thickness of about 2,000 layers was used, and they were formed using a vacuum evaporation method, a sputtering method, or the like. Patterning was performed by the well-known photoringraph method. FIG. 9 shows the time-dependent changes in drain current when two types of pulses were applied to the gate electrode of the CdSe thin film transistor described above. In the figure, (,) shows the experimental results when the pulse obtained by the present invention shown in FIG. 5 was applied to the gate electrode, and (b) the pulse obtained by the conventional example shown in FIG. 4 was applied to the gate electrode. The voltage between the source and drain was kept constant at 20V.

As you will see below, connect the source to the gate electrode.

It can be seen that if a pulse of opposite polarity is applied to the potential, the drain current hardly changes.

Effects of the Invention As is clear from the above explanation, according to the method for driving a thin film transistor of the present invention, the gate insulating layer.

Since the number of carriers trapped in the semiconductor layer and their interfaces can be reduced, the electrical characteristics and long-term stability of thin film transistors can be significantly improved, and the method can be widely used in various transistor circuits.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing the method for driving a thin film transistor of the present invention, FIG. 2 is a cross-sectional structural diagram of the thin film transistor,
Figure 3 is a circuit diagram showing a conventional thin film transistor driving method, Figure 4 is a diagram showing the gate voltage and output voltage applied to the conventional thin film transistor, and Figures 5 and 6 are diagrams showing the thin film transistor of the present invention. A diagram showing the applied gate voltage and output voltage, FIG. 7 is a circuit diagram showing an embodiment in which the thin film transistor driving method of the present invention is applied to a shift register, and FIG. 8 is a diagram showing the thin film transistor of the present invention applied to a shift register. FIG. 9 is a timing chart for the driving method of the thin film transistor, and FIG. 9 is a characteristic diagram showing the change over time of the drain current depending on the driving method of the thin film transistor. TFTl... Thin film transistor, VG...
...Gate voltage, φC...Second voltage. Name of agent Patent attorney Toshio Nakao and one other person Figure 2 Figure 3 Figure 4 (IIL) Vtr Figure 5 ((1, Vtr tVc Figure 6 (OL) Figure 7

Claims (2)

[Claims] (1) A second voltage different from the input signal voltage is applied via a switching element to the gate terminal of a thin film transistor consisting of a semiconductor layer having source and drain electrodes and a gate electrode in contact with each other via an insulating layer. period of,
A method for driving a thin film transistor, comprising maintaining an interface between the insulating layer and the semiconductor layer in a depleted state. (2) The method for driving a thin film transistor according to claim 1, characterized in that the second voltage is set to a voltage lower than either the voltage at the source terminal or the drain terminal of the thin film transistor.