JPS6211746B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an apparatus for analyzing dynamic characteristics of a program. What is the dynamic characteristic of a program?
In the execution of a program by a computer, it refers to the flow of control and changes in data values, and to analyze this, it is necessary to record the number of program executions, the number of data reference settings, and the set data values. A program dynamics analyzer is necessary and used to create the above-mentioned records during program execution.

The above-mentioned records have conventionally been created by a central processing unit (4 or below, abbreviated as CPU) of an electronic computer.
Since it is undesirable to place an excessive load on the CPU for this recording work, it is usually not possible to record many addresses at the same time.

Since a command statement or data is stored in one address, the above-mentioned record is either to investigate and record whether a command statement has been read from a predetermined address, or to check whether data has been read from a predetermined address and used. There are three types of address searches: checking and recording whether data has been written to a predetermined address, and checking and recording whether data has been written to a predetermined address. This address search type and the address to be searched (referred to as address search address)
is set in advance.

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Figure 1 is a flow diagram showing the conventional method.
1 is each program step. It is determined in steps 1, 4, and 7 whether the content of the instruction read by the CPU is "instruction fetch,""dataread," or "data write," and the content of the instruction is determined. Steps 2, 5, and 8 determine whether the address search type matches the preset address search type.
If they do not match, control is returned to normal processing. If the content of the read instruction matches the address search type (steps 2, 5,
8), from step 2, the program counter value is transferred to step 3 (this becomes the address of the instruction), from step 5, the data read address is transferred to step 6, and from step 8 to step 9. The transfer data write address is extracted and it is determined whether the address matches a preset address search address (step 10). If they do not match, control is returned to normal processing; if they match, a predetermined interrupt processing is performed in step 11, and then control is returned to normal processing. The interrupt processing in step 11 includes, for example, a circuit for generating an address that matches the address for address search, and in the case of an address search in data write mode, recording the data written at that time.

In the conventional method, all the work shown in Figure 1 is performed by the CPU.
As shown in Figure 1, addresses must be fetched and compared during program execution, and the program execution time becomes longer in order to control multiple addresses at the same time. There were flaws.

This invention was made in order to eliminate the drawbacks of the conventional ones as mentioned above, and apart from the CPU,
The purpose is to provide a program dynamic characteristic analysis device that collects information on a desired address in parallel with the operation of the CPU, and to collect information on a plurality of addresses simultaneously during program execution.

Embodiments of the invention will be described below with reference to the drawings. FIG. 2 is a block diagram showing an embodiment of the present invention, in which 12 is a CPU, 13 is a program dynamic characteristic analysis device provided separately from the CPU, 14 is an address table for address search, 15 is a recording table, and a is a A code indicating the type of address search, b represents an address, and c represents data when the address search type is data writing.

The tables 14 and 15 are provided in a predetermined area of the storage device, and the address table 14 for address search
are instruction fetch table, data read table,
It is classified into data write tables, and each table has the contents shown in FIG. The recording table 15 also includes a number recording table for recording the number of times each of instruction fetching, data reading, and data writing is performed, and an execution recording table for recording the address execution order. FIG. 4a shows the contents of one of the number of times record table, and FIG. 4b shows the contents of the execution record table. In Figure 4, 1
6 is no address, 17 is no count, 18 is no address recording, 19 is no type, and 20 is data recording.

Further, FIG. 5 is a flowchart showing the operation performed by the program dynamic characteristic analysis device 13 of FIG.
-31 represent each step.

Next, the operation of the apparatus shown in FIG. 2 will be explained. The CPU 12 only operates to input information a, b, and c to the program dynamic characteristic analysis device 13, and all other operations are performed by the analysis device 13. The analysis device 13 receives data a from the CPU 12,
After temporarily storing b and c, a is taken out in step 21, and the mode indicated by a is checked in steps 22, 26, and 29. Address table 14 for address search according to the mode indicated by a.
It is checked whether there is any address value in the corresponding table that matches the value of b. This is the operation of steps 23, 27, and 30. If there is no match, the operation of the analysis device 13 is terminated and the operation of step 21 is started for the next address.
If there is a match, a in the record table 15
The number of times recording table corresponding to the mode indicated by (4th
Add 1 to the value in the counter 17 of the address in Figure a). All the numerical values in the counter 17 are reset to 0 in the initial value setting.
This is the operation of steps 24, 28, and 31.

After this operation is completed, writing is performed to the execution record table (FIG. 4b) in the record table 15.
This is step 25, in which the address is recorded in the address record field 18, and if a indicates data writing, "1" is entered in the type field, otherwise 〓〓〓〓〓〓
Write "0" and write the value of c to the data recording register 20.

The data stored in the recording table 15 can be used to analyze the dynamic characteristics of the program.

As described above, according to the circuit shown in Figure 2, the CPU
After obtaining data a, b, c from 12, the CPU
The dynamic characteristic analysis of the program can be performed without interfering with the operation of the CPU 12 by operating completely separately from the program execution in the CPU 12.

Note that the record example of the record table 15 shown in FIG. It goes without saying that examples may exist.

As described above, according to the present invention, it is possible to perform dynamic characteristic analysis of a program separately from the execution of the program in the CPU, so it is possible to easily accumulate records without affecting the program execution speed. It has the advantage of being possible.

[Brief explanation of the drawing]

FIG. 1 is a flow diagram showing a conventional method, FIG. 2 is a block diagram showing an embodiment of the present invention, FIG. 3 is a diagram showing an example of a program table for program search in FIG. 2, and FIG. FIG. 2 is a diagram showing an example of the recording table, and FIG. 5 is a flowchart showing the operation of the circuit in FIG. 2. 12...CPU, 13...Program dynamic characteristic analysis device, 14...Program table for program search, 15...Record table. 〓〓〓〓〓

Claims (1)

[Scope of Claims] 1. In a program dynamic characteristic analysis device that analyzes the dynamic characteristics of a program executed by an electronic computer, in addition to a central processing unit that executes the program, a program dynamic characteristic attached to this central processing unit is provided. A characteristic analysis device is provided, and the program dynamic characteristic analysis device analyzes the instruction statement read by the central processing unit with data indicating whether the instruction statement is an instruction fetch, a data read, or a data write. A memory circuit that inputs and temporarily stores the type, the address of the instruction statement, and the data to be written when the type of the instruction statement is data writing from the central processing unit, and analyzes the program dynamic characteristics. an address table for address search, which stores addresses to be searched for by classifying them according to whether the stored content of the address is instruction fetching, data reading, or data writing; The address table for address search is investigated according to the memory contents of , and when an address matching the address of the memory contents exists in the address table for address search, the data necessary for analyzing the program dynamic characteristics is written to the recording table. A program dynamic characteristic analysis device characterized by comprising: means for inputting a program.