JPS6211218A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6211218A
JPS6211218A JP15106985A JP15106985A JPS6211218A JP S6211218 A JPS6211218 A JP S6211218A JP 15106985 A JP15106985 A JP 15106985A JP 15106985 A JP15106985 A JP 15106985A JP S6211218 A JPS6211218 A JP S6211218A
Authority
JP
Japan
Prior art keywords
substrate
single crystal
recrystallized
oxide film
onto
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15106985A
Other languages
Japanese (ja)
Inventor
Eiji Fujii
英治 藤井
Yoshimitsu Hiroshima
広島 義光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP15106985A priority Critical patent/JPS6211218A/en
Publication of JPS6211218A publication Critical patent/JPS6211218A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain recrystallized silicon having a large area and excellent crystallizability onto an insulating substrate by a method wherein a recessed section is formed to the surface of an insulating film shaped onto a single crystal semiconductor substrate, an opening section reaching the surface of the substrate from the bottom of the recessed section is formed, a semiconductor layer is shaped to the opening section and the surface of the insulating film and the semiconductor layer is recrystallized through heating. CONSTITUTION:An Si oxide film 12 is shaped onto a single crystal Si substrate 11, a resist pattern 15 with openings in regions as seed sections is formed onto the oxide film 12, and the silicon oxide film 12 is wet-etched. The film 12 is dry-etched in an anisotropic manner up to the surface of the substrate 11 to shape the species regions. The resist 15 is removed, and polysilicon is deposited and recrystallized through heating. Accordingly, since the areas of contact sections among polysilicon as species and the single crystal substrate 11 are reduced, heat flux in the direction of the substrate 11 can be minimized, and the temperature difference of the species sections and an SOI section can be lowered, thus generating no peeling, etc., then acquiring recrystallized Si having a large area and excellent crystallizability.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、絶縁性基板上に大面積で結晶性の高い単結晶
シリコンを得るための半導体装置の’II造方決方法す
るものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is directed to a 'II manufacturing method of a semiconductor device for obtaining a large area and highly crystalline single crystal silicon on an insulating substrate.

従来の技術 近年、絶縁性基板上に堆積したポリシリコンを、再結晶
化させる技術(以下rso [形成技術」と称す)は、
集積回路の高速化・三次元化という点で、非常に重要と
なってきた。
Conventional technology In recent years, a technology for recrystallizing polysilicon deposited on an insulating substrate (hereinafter referred to as RSO [formation technology]) has been developed.
It has become extremely important in terms of increasing the speed and making three-dimensional integrated circuits possible.

ところで、従来のSol形成技術は、絶縁性基板上に堆
積したポリシリコンに、レーザーや電子線などのエネル
ギービームを照射したり、ストリップヒーター等による
加熱を施したりして、ポリシリコンを溶解し、その固化
により単結晶化を図るものであった。しかし、再結晶化
されたシリコン上に集積回路を形成するためには、再結
晶化されたシリコンの大面積化及び結晶性のよさが必要
となる。そこで従来は、例えば第5図に示すように、単
結晶シリコン基板1上の絶縁性塞板2の一部を開口して
結晶成長の種領域を確保したのち、全面にポリシリコン
層3を堆積し、上からレーザー照射を行ない、前記種領
域を核として結晶成長させる方法(以下「ラテラルシー
ディングエピタキシー」と称ず)が多く採用されていた
。なお、4はキャップ層である。
By the way, conventional Sol formation technology melts polysilicon by irradiating the polysilicon deposited on an insulating substrate with an energy beam such as a laser or an electron beam, or heating it with a strip heater, etc. The aim was to achieve single crystallization through solidification. However, in order to form an integrated circuit on recrystallized silicon, the recrystallized silicon needs to have a large area and good crystallinity. Conventionally, for example, as shown in FIG. 5, a part of an insulating plug 2 on a single crystal silicon substrate 1 is opened to secure a seed area for crystal growth, and then a polysilicon layer 3 is deposited on the entire surface. However, a method in which laser irradiation is performed from above to grow crystals using the seed region as a nucleus (hereinafter referred to as "lateral seeding epitaxy") has been widely adopted. Note that 4 is a cap layer.

発明が解決しようとする問題点 しかしながら、上記従来の方法では、シリコンと絶縁性
基板2との熱伝導度の差が大きいため、加熱時に、種と
する部分と絶縁性基板2上のポリシリコン層3〈以下r
sor層」と称す)との間に温度差が生じて、801層
3のはくすなどの問題が発生し、大面積が結晶性のよい
再結晶シリコンを得ることは困難であった。
Problems to be Solved by the Invention However, in the conventional method described above, since there is a large difference in thermal conductivity between silicon and the insulating substrate 2, the polysilicon layer on the seed portion and the insulating substrate 2 is heated. 3〈hereinafter r
A temperature difference occurs between the 801 layer 3 and the 801 layer 3, which makes it difficult to obtain recrystallized silicon with good crystallinity over a large area.

本発明は上記従来の問題点を解消するもので、絶縁性基
板上に大面積で結晶性のよい再結晶シリコンを得ること
のできる半導体装置の製造方法を提供することを目的と
する。
The present invention solves the above-mentioned conventional problems, and aims to provide a method for manufacturing a semiconductor device that can obtain recrystallized silicon with good crystallinity over a large area on an insulating substrate.

問題点を解決するための手段 上記問題点を解決するため、本発明の半導体装置の製造
方法は、単結晶半導体基板上に絶縁膜を形成する工程と
、前記絶縁膜の表面に凹部を形成する工程と、前記凹部
の底部から前記単結晶半導体基板の表面に達する深さの
開孔部を前記絶縁膜に形成する工程と、前記開孔部およ
び前記絶縁膜の表面に多結晶または非晶質の半導体層を
形成する工程と、前記半導体層を加熱して再結晶化させ
る工程とを含むものである。
Means for Solving the Problems In order to solve the above problems, the method for manufacturing a semiconductor device of the present invention includes a step of forming an insulating film on a single crystal semiconductor substrate, and forming a recess on the surface of the insulating film. forming an opening in the insulating film with a depth reaching from the bottom of the recess to the surface of the single crystal semiconductor substrate; The method includes a step of forming a semiconductor layer, and a step of heating and recrystallizing the semiconductor layer.

作用 上記方法によれば、種領域の面積が小さくなり、単結晶
シリコン基板方向の熱フラツクスが減少し、反対に絶縁
性基板エツジ部への熱フラツクスが増加して、種部と8
01層との間の温度差が減少することとなる。その結果
、801層のはくすなどの問題は起こらず、大面積で結
晶性のよい再結晶シリコンを形成することができる。
Effect According to the above method, the area of the seed region is reduced, the heat flux in the direction of the single crystal silicon substrate is reduced, and on the contrary, the heat flux to the edge portion of the insulating substrate is increased, and the seed region and the
The temperature difference between the 01 layer and the 01 layer will be reduced. As a result, problems such as removal of the 801 layer do not occur, and recrystallized silicon with good crystallinity can be formed over a large area.

実施例 以下、本発明の一実施例を第1図〜第4図に基づいて説
明する。
EXAMPLE Hereinafter, an example of the present invention will be described based on FIGS. 1 to 4.

第1図は本発明の一実施例における半導体装置の製造方
法により得られた半導体装置の断面図で、11は単結晶
シリコン基板、12は厚さ1μm程度の熱的に酸化して
形成するかあるいはCVD法などで堆積したシリコン酸
化膜、13はCVD法で堆積した0、5μm程度の層厚
のポリシリコン層、14はキャップ層である。
FIG. 1 is a cross-sectional view of a semiconductor device obtained by a method for manufacturing a semiconductor device according to an embodiment of the present invention, in which 11 is a single crystal silicon substrate, and 12 is a single crystal silicon substrate formed by thermal oxidation to a thickness of about 1 μm. Alternatively, 13 is a silicon oxide film deposited by a CVD method, a polysilicon layer having a thickness of about 0.5 μm, and 14 is a cap layer.

上記半導体装置の製造に際しては、まず初めに、第2図
のように、単結晶シリコン基板11上に1μm程度のシ
リコン酸化膜12を形成し、その上に種部となる領域に
開孔を有するレジストパターン15を形成する次に第3
図のように、前記開孔部を通してバッフアートフッ酸な
どのエツチング液を使ってシリコン酸化膜12を6分は
どウェットエツチングを行なう。次に第4図のように、
単結晶シリコン基板11の表面まで、異方性ドライエツ
チングによってシリコン酸化膜12をエツチングし、種
領域を形成する。この後、レジスト15を除去した後、
ポリシリコンを堆積し、ラテラルシーディングエビタキ
シーによって再結晶化させる工程は、従来と同様である
In manufacturing the above semiconductor device, first, as shown in FIG. 2, a silicon oxide film 12 of about 1 μm is formed on a single crystal silicon substrate 11, and an opening is formed on the silicon oxide film 12 in a region that will become a seed portion. After forming the resist pattern 15, the third
As shown in the figure, the silicon oxide film 12 is wet-etched for 6 minutes using an etching solution such as buffered hydrofluoric acid through the opening. Next, as shown in Figure 4,
The silicon oxide film 12 is etched to the surface of the single crystal silicon substrate 11 by anisotropic dry etching to form a seed region. After this, after removing the resist 15,
The steps of depositing polysilicon and recrystallizing it by lateral seeding epitaxy are conventional.

種領域を上記のような構成にした場合、種となるポリシ
リコンと単結晶シリコン基板11との接している部分の
面積は小さいので、単結晶シリコン基板11方向の熱フ
ラツクスを減少させることができる。一方、酸化膜エツ
ジ部は、ウェットエツチングによって構成されているの
で、球面形状となり、その面積は大きくなる。従ってエ
ツジ部への熱フラツクスを増加させることができる。即
ち、種部と801層との温度差を減少させることができ
るから、801層のはくすなどの問題がおこらず、大面
積で結晶性のよい再結晶シリコンを得ることができる。
When the seed region is configured as described above, the area where the polysilicon serving as the seed and the single-crystal silicon substrate 11 are in contact is small, so that the heat flux in the direction of the single-crystal silicon substrate 11 can be reduced. . On the other hand, since the oxide film edge portion is formed by wet etching, it has a spherical shape and has a large area. Therefore, the heat flux to the edge portion can be increased. In other words, since the temperature difference between the seed portion and the 801 layer can be reduced, problems such as peeling of the 801 layer do not occur, and recrystallized silicon with a large area and good crystallinity can be obtained.

発明の効果 以上述べたごとく本発明によれば、きわめて簡単な方法
により、断面積で結晶性の高い再結晶シリコンを形成す
ることができ、その工業的利用価値はきわめて大である
Effects of the Invention As described above, according to the present invention, recrystallized silicon with high crystallinity in cross-sectional area can be formed by an extremely simple method, and its industrial utility value is extremely large.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例における半導体装置の製造方
法により得られた半導体装置の断面図、第2図〜第4図
は同半導体装置の製造方法の各工程における断面図、第
5図は従来のラテラルシーディングエビタキシーによっ
て形成されたSolの断面図である。 11・・・単結晶シリコン基板、12・・・シリコン酸
化膜、13・・・ポリシリコン層、14・・・キャップ
層代理人   森  本  義  弘 第1図 第4図 第Z図
FIG. 1 is a cross-sectional view of a semiconductor device obtained by a method for manufacturing a semiconductor device according to an embodiment of the present invention, FIGS. 2 to 4 are cross-sectional views at each step of the method for manufacturing the semiconductor device, and FIG. is a cross-sectional view of Sol formed by conventional lateral seeding epitaxy. 11... Single crystal silicon substrate, 12... Silicon oxide film, 13... Polysilicon layer, 14... Cap layer agent Yoshihiro Morimoto Figure 1 Figure 4 Figure Z

Claims (1)

【特許請求の範囲】[Claims] 1、単結晶半導体基板上に絶縁膜を形成する工程と、前
記絶縁膜の表面に凹部を形成する工程と、前記凹部の底
部から前記単結晶半導体基板の表面に達する深さの開孔
部を前記絶縁膜に形成する工程と、前記開孔部および前
記絶縁膜の表面に多結晶または非晶質の半導体層を形成
する工程と、前記半導体層を加熱して再結晶化させる工
程とを含む半導体装置の製造方法。
1. Forming an insulating film on a single crystal semiconductor substrate, forming a recess on the surface of the insulating film, and forming an opening with a depth reaching from the bottom of the recess to the surface of the single crystal semiconductor substrate. A step of forming a polycrystalline or amorphous semiconductor layer on the insulating film, a step of forming a polycrystalline or amorphous semiconductor layer on the opening and a surface of the insulating film, and a step of heating the semiconductor layer to recrystallize it. A method for manufacturing a semiconductor device.
JP15106985A 1985-07-08 1985-07-08 Manufacture of semiconductor device Pending JPS6211218A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15106985A JPS6211218A (en) 1985-07-08 1985-07-08 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15106985A JPS6211218A (en) 1985-07-08 1985-07-08 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6211218A true JPS6211218A (en) 1987-01-20

Family

ID=15510625

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15106985A Pending JPS6211218A (en) 1985-07-08 1985-07-08 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6211218A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5449985A (en) * 1992-08-26 1995-09-12 Ebara Corporation Zero-power control type vibration eliminating apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5449985A (en) * 1992-08-26 1995-09-12 Ebara Corporation Zero-power control type vibration eliminating apparatus

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