JPS62110854U - - Google Patents
Info
- Publication number
- JPS62110854U JPS62110854U JP1985204719U JP20471985U JPS62110854U JP S62110854 U JPS62110854 U JP S62110854U JP 1985204719 U JP1985204719 U JP 1985204719U JP 20471985 U JP20471985 U JP 20471985U JP S62110854 U JPS62110854 U JP S62110854U
- Authority
- JP
- Japan
- Prior art keywords
- polishing
- semiconductor substrate
- central axis
- polishing apparatus
- polishing surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005498 polishing Methods 0.000 claims description 19
- 239000004065 semiconductor Substances 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 11
- 238000010586 diagram Methods 0.000 description 1
Description
第１図は従来の半導体基板の研磨装置の研磨用
定盤の側面図、第２図は従来の半導体基板の研磨
装置による半導体基板の研磨状態を示す側面図、
第３図は本考案の半導体基板の研磨装置の一実施
例の研磨用定盤の側面図、第４図は本考案の半導
体基板の研磨装置の一実施例による半導体基板の
研磨状態を示す側面図である。
１ａ：研磨用定盤、２ａ：研磨用定盤の研磨面
、４ａ：半導体基板。
FIG. 1 is a side view of a polishing surface plate of a conventional semiconductor substrate polishing apparatus, and FIG. 2 is a side view showing the polishing state of a semiconductor substrate by the conventional semiconductor substrate polishing apparatus.
FIG. 3 is a side view of a polishing surface plate of an embodiment of the semiconductor substrate polishing apparatus of the present invention, and FIG. 4 is a side view showing the polishing state of a semiconductor substrate by the embodiment of the semiconductor substrate polishing apparatus of the present invention. It is a diagram. 1a: Polishing surface plate, 2a: Polishing surface of the polishing surface plate, 4a: Semiconductor substrate.
Claims (1)
体基板の研磨装置において、前記研磨用定盤の研
磨面が、その中心軸に垂直な面に対して中心軸か
ら両側に所定の傾斜角度をもつて形成されたもの
であることを特徴とする半導体基板の研磨装置。 In a semiconductor substrate polishing apparatus equipped with a polishing surface plate for polishing a semiconductor substrate, the polishing surface of the polishing surface has a predetermined inclination angle on both sides from the central axis with respect to a plane perpendicular to the central axis. 1. A polishing apparatus for a semiconductor substrate, characterized in that the polishing apparatus is formed by polishing a semiconductor substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985204719U JPS62110854U (en) | 1985-12-27 | 1985-12-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985204719U JPS62110854U (en) | 1985-12-27 | 1985-12-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62110854U true JPS62110854U (en) | 1987-07-15 |
Family
ID=31170716
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985204719U Pending JPS62110854U (en) | 1985-12-27 | 1985-12-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62110854U (en) |
-
1985
- 1985-12-27 JP JP1985204719U patent/JPS62110854U/ja active Pending
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