JPS62102328A - Disk controller - Google Patents

Abstract

PURPOSE:To eliminate a sector overrun by setting a command corresponding to a target sector at timing corresponding to a sector attention signal, and writing and reading data on the basis of the command. CONSTITUTION:A target sector address 113 from an address means 115 is sent to a disk device part 11, a generating means 119 generates a sector attention signal 117 according to the address 113, and a means 129 generates specific timing in response to the signal 117. Then, a next command 125 in a buffer 127 is set in a register 12 at the timing and data is written in or read out by the device part 111 with the next command 125.

Description

[Detailed Description of the Invention] [Summary] A disk control device that issues a command corresponding to a target sector at a timing corresponding to a sector attention signal generated in relation to a sector immediately before a target sector. is set, and data can be written and read accurately in the target sector based on the set command.

[Industrial application field]

The present invention relates to a disk control device, and more particularly to a disk control device that improves the control aspect of command settings for disk devices.

[Conventional technology]

For example, when data is to be written or read in a certain disk device, it is necessary to use the disk control device to search for the target sector in which data should be written or read. In that case, 1 of the target sector
It receives sector attention from the previous sector and quickly sets write, read, and read commands in the command register at the appropriate timing. Data is written and read based on the commands set in this way.

[Problem that the invention seeks to solve]

In such conventional devices, the disk device maintains a high disk spindle rotation speed in order to increase the data transfer rate. The search for the target sector in this case will be explained using FIG.

Assume that sector pulses are generated at the timing shown in FIG. 3(a), and that the second sector is the address of the target sector as shown in FIG. 3(b). Here, a sector attention signal is generated in the sector immediately before the target sector, as shown in FIG. 2 (C1).

Based on this sector attention signal, FIG. 3(d)
And a synchronization signal for synchronizing with the disk as shown in (e) is generated. At the signal timing shown in (d) of this figure,
Commands to write and read data are set.

Next, when the sector after the command is set, that is, the target sector, is detected by the generation of a sector pulse, data write and read operations are executed by the read/write signal shown in FIG. 3 (fl).Next A sector pulse for the sector is generated, and the target sector read/write operation is completed.At the same time, an interwoven request signal (see Figure 3 (gl)) is generated to enable the next interrupt. Ru.

However, due to other processes being performed, such as accessing other devices, it may not be possible to send a command within the specified time (for example, 696 bits) for the above-mentioned sector attention (see Figure 3 (hl)). and (1)).Then, as shown in the same figure (jl), the lead/
No write signal is generated, no data write or read operations are performed in the target sector, and a sector overrun signal (see FIG. 3 (kl)) is generated.

Additionally, an interwoven request signal is also generated as shown in the figure (phantom).

The present invention was created in view of these points, and an object of the present invention is to provide a disk control device that can reliably write and read data in a target sector.

[Failure to solve the problem]

FIG. 1 is a diagram showing the principle of the present invention.

In the figure, a disk device section 111 is capable of writing and reading data.

The address means 115 sends to the disk device section 111 a sector address 113 for a target sector in which data is to be written to or read from the disk device section 111 .

The attention signal generating means 119 generates a sector attention signal 117 related to the sector immediately before the target sector in accordance with the sector address 113.

The command register 123 is a register for setting commands.

Buffer 127 prepares the next command 125 corresponding to the target sector.

The command set timing means 129 creates timing for setting the next command 125 in the buffer 127 in the command register 123 in response to the sector attention signal.

Therefore, the system as a whole is configured so that data is written to and read from the target sector in response to the next command.

[Effect]

The next command is prepared in the buffer 127 to write and read data in the target sector.

Once the sector attention signal 117 is generated, it is timed by the command set timing means 129. Depending on its proper timing, the next command 125 from the buffer 127 is transferred to the command register 123.
is set to

The next command 125 set in this manner causes data to be written or read in the disk device section 111.

According to the present invention, data can be written to and read from the target sector at appropriate timing without causing sector overrun.

〔Example〕

FIG. 2 shows an embodiment of the present invention, in which a disk controller 2
00 is a CPU that connects memory via a bus (not shown)
300 and a plurality of disk devices DISI, DIS2.
...is connected to...

Here, the disk control device 200 includes a command setting control section 210. which receives control instructions from the CPU 300. L.S.
A control unit 220 and an oscillator (VF○) 23 formed by I
Consists of 0.

The command setting control unit 210 also controls a buffer 241. Disk device DI
Status section 2 where information from SL and DTS 2 is stored
43 and the status section 243, the VFO2
It consists of a counter 245 that counts the clock (100 nanosecond period) CLVFO from 30.

Furthermore, the control unit 220 includes a command register 251 in which commands are set.

Note that the disk control device 200 and the plurality of disk devices are connected to each other by a pass line BUS, and the CPU 30tl
Although other control devices are connected to the , they are omitted here.

The operation of the embodiment of the present invention having the above-described configuration will be described below. As an example of operation, Seek-Writ
The case e) will be explained.

Now, assume that you want to write data to the disk device DISL. To do this, first move the disk head to the desired address (destination cylinder or track sector).
In order to move to , the CPU 300 causes the disk controller 200 to cause the disk device DISL to perform a seek operation. Thereafter, the CPU 300 disconnects from the disk control device 200 and controls other devices.

When the disk device DISL detects a sector pulse (see FIG. 3(a)) immediately before the target sector, it supplies a sector attention signal (see FIG. 3(c)) SSAT to the command setting control unit 210.

In response to this signal 5SAT, the command setting control unit 210
The sector attention bit of the "0" bit in the status section 243 becomes "1". Due to this,
The status unit 243 supplies a counting command signal 5CNUP that instructs the counter 245 to perform addition counting.

The counter 245 is activated by the signal 5CNIJP and adds and counts the clock CLVFO from the VF○ 230. When the count value reaches a predetermined value (for example, 1600), the counter 245 outputs the command transfer signal SCMTR.
occurs.

Upon receiving the command transfer signal SCMTR, the buffer 241 transfers the write command set there to the command register 251 of the control unit 220 and sets it therein.

When the write command is set in the command register 251 in this way, the control unit 251 synchronizes with the rotation of the disk and then with the read data from the disk.
20 performs synchronous control (see Figure 3 td) and (e))
.

Then, when receiving the sector pulse of the target sector, the ID
After reading the field and confirming that it is the desired address, the data from memory is written into the data field (see Figure 3 fbl and (f)).

When data writing is completed and the next sector pulse of the target sector is received, the disk controller 200 turns on the interlaced request signal to signal the end of data transfer (see FIG. 3(g)). .

After the above operation is executed, the count of the counter is no longer necessary, so the sector pulse of the status section 2'43 is
The counter 245 is cleared by setting the bit to 1''.

With this configuration, even if the CPU 300 is controlling a device other than the disk device, the seek command (write command in this case) is sent to the buffer 241 as the next command, so that the seek command (in this case, the write command) can be sent within the specified time ( Clock CLVF after sector attention is generated
The command can be set in the register 251 at an appropriate timing (within 1864 bits counting O). Therefore, there is no possibility of sector overrun occurring.

Although the above-described embodiment deals with "writing", the same applies to "reading".

The only difference is the content of the commands.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to perform sufficient command setting control to accurately and stably write and read data to and from a disk device without causing sector overruns. can.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the principle of the disk control device of the present invention, Fig. 2 is a block diagram showing an embodiment of the present invention, and Fig. 3 is a diagram for explaining the operation of the conventional example and the embodiment of the present invention. FIG. 3 is a signal timing diagram. In FIG. 1, 111 is a disk unit, 123 is a command register, and 127 is a buffer. 129 is a command sent timing means. In FIG. 2, 200 is a disk control device, 241 is a buffer, 245 is a counter, 251 is a command register, and DIS1 and DIS2 are disk devices. one

Claims (1)

[Claims] A disk device unit that can write and read data (
address means (115) for sending a sector address (113) for a target sector in which data is to be written or read to the disk unit (111);
sector attention signal related to the previous sector (
attention signal generating means (119) for generating (117);
), a command register (123) for setting a command, a buffer (127) for preparing the next command (125) corresponding to the target sector, and a buffer (127) in response to the sector attention signal. command set timing means (12) that creates timing for setting the next command in the command register (123);
9), and is configured to write to and read from a target sector in response to the next command.