JPS62101222U - - Google Patents
Info
- Publication number
- JPS62101222U JPS62101222U JP19182685U JP19182685U JPS62101222U JP S62101222 U JPS62101222 U JP S62101222U JP 19182685 U JP19182685 U JP 19182685U JP 19182685 U JP19182685 U JP 19182685U JP S62101222 U JPS62101222 U JP S62101222U
- Authority
- JP
- Japan
- Prior art keywords
- cap portion
- chip
- shaped electronic
- opening
- cap
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000037431 insertion Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985191826U JPH0412665Y2 (de) | 1985-12-13 | 1985-12-13 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985191826U JPH0412665Y2 (de) | 1985-12-13 | 1985-12-13 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62101222U true JPS62101222U (de) | 1987-06-27 |
JPH0412665Y2 JPH0412665Y2 (de) | 1992-03-26 |
Family
ID=31146330
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1985191826U Expired JPH0412665Y2 (de) | 1985-12-13 | 1985-12-13 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0412665Y2 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2003084296A1 (ja) * | 2002-03-28 | 2005-08-11 | 富士通株式会社 | 回路の伝送特性補正方法、補正構造、及びこの補正構造に使用される保持具 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5655001A (en) * | 1979-10-11 | 1981-05-15 | Matsushita Electric Ind Co Ltd | Method of forming lead wire of chipplike part |
-
1985
- 1985-12-13 JP JP1985191826U patent/JPH0412665Y2/ja not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5655001A (en) * | 1979-10-11 | 1981-05-15 | Matsushita Electric Ind Co Ltd | Method of forming lead wire of chipplike part |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2003084296A1 (ja) * | 2002-03-28 | 2005-08-11 | 富士通株式会社 | 回路の伝送特性補正方法、補正構造、及びこの補正構造に使用される保持具 |
Also Published As
Publication number | Publication date |
---|---|
JPH0412665Y2 (de) | 1992-03-26 |
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