JPS6194994U - - Google Patents

Info

Publication number
JPS6194994U
JPS6194994U JP17658184U JP17658184U JPS6194994U JP S6194994 U JPS6194994 U JP S6194994U JP 17658184 U JP17658184 U JP 17658184U JP 17658184 U JP17658184 U JP 17658184U JP S6194994 U JPS6194994 U JP S6194994U
Authority
JP
Japan
Prior art keywords
operational amplifier
impedance
inverting input
impedances
feedback
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17658184U
Other languages
Japanese (ja)
Other versions
JPH0348713Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17658184U priority Critical patent/JPH0348713Y2/ja
Publication of JPS6194994U publication Critical patent/JPS6194994U/ja
Application granted granted Critical
Publication of JPH0348713Y2 publication Critical patent/JPH0348713Y2/ja
Expired legal-status Critical Current

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  • Arrangements For Transmission Of Measured Signals (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路図、第2
図は零調整法を説明するための図、第3図および
第4図はそれぞれ零調整用発光ダイオードの他の
接続例を示す回路図である。 11〜14……演算増幅器、15〜22……抵
抗、23,24……発光ダイオード、29……負
荷、31……零調整用つまみ、41……フイール
ド装置。
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a diagram for explaining the zero adjustment method, and FIGS. 3 and 4 are circuit diagrams showing other connection examples of the zero adjustment light emitting diodes, respectively. 11-14... operational amplifier, 15-22... resistor, 23, 24... light emitting diode, 29... load, 31... zero adjustment knob, 41... field device.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 第1の検出入力電圧を非反転入力とする第1の
帰還インピーダンスを備えた第1の演算増幅器と
、第2の検出入力電圧を非反転入力とする第2の
帰還インピーダンスを備えた第2の演算増幅器と
、これら第1および第2の演算増幅器の出力をそ
れぞれ非反転および反転入力とする第3の帰還イ
ンピーダンスを備えた第3の演算増幅器と、この
第3の演算増幅器の出力を非反転入力とするボル
テツジ・ホロワ接続の第4の演算増幅器と、第1
および第2の演算増幅器の反転入力端子間に接続
した第4のインピーダンスと、第1および第2の
演算増幅器の出力端子と第3の演算増幅器の両入
力端子間にそれぞれ接続した第5および第6のイ
ンピーダンスと、第3の演算増幅器の出力端子と
第4の演算増幅器の非反転入力端子間に接続した
第7のインピーダンスと、第3の演算増幅器の非
反転入力端子と第4の演算増幅器の出力端子間に
接続した第8のインピーダンスとを備え、第1と
第2の帰還インピーダンス、第5と第6のインピ
ーダンス、第7と第8のインピーダンスはそれぞ
れ相互にほぼ等しいインピーダンス値を有すると
ともに、第3の演算増幅器の出力により第4の演
算増幅器の非反転入力端子に接続された負荷に供
給される電流が正方向のときに所定の表示を行な
う第1の表示素子と、上記電流が負方向のときに
所定の表示を行なう第2の表示素子とを備えたこ
とを特徴とするフイールド装置。
A first operational amplifier includes a first feedback impedance that uses the first detection input voltage as a non-inverting input, and a second operational amplifier that includes a second feedback impedance that uses the second detection input voltage as a non-inverting input. an operational amplifier; a third operational amplifier having a third feedback impedance that uses the outputs of the first and second operational amplifiers as non-inverting inputs and non-inverting inputs; a fourth operational amplifier connected as an input voltage follower;
and a fourth impedance connected between the inverting input terminals of the second operational amplifier, and fifth and fifth impedances connected between the output terminals of the first and second operational amplifiers and both input terminals of the third operational amplifier, respectively. 6, a seventh impedance connected between the output terminal of the third operational amplifier and the non-inverting input terminal of the fourth operational amplifier, and the non-inverting input terminal of the third operational amplifier and the fourth operational amplifier. an eighth impedance connected between the output terminals of the feedback impedance, the first and second feedback impedances, the fifth and sixth impedances, and the seventh and eighth impedances each have substantially equal impedance values; , a first display element that performs a predetermined display when the current supplied to the load connected to the non-inverting input terminal of the fourth operational amplifier by the output of the third operational amplifier is in the positive direction; A field device comprising: a second display element that performs a predetermined display in a negative direction.
JP17658184U 1984-11-22 1984-11-22 Expired JPH0348713Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17658184U JPH0348713Y2 (en) 1984-11-22 1984-11-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17658184U JPH0348713Y2 (en) 1984-11-22 1984-11-22

Publications (2)

Publication Number Publication Date
JPS6194994U true JPS6194994U (en) 1986-06-19
JPH0348713Y2 JPH0348713Y2 (en) 1991-10-17

Family

ID=30734178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17658184U Expired JPH0348713Y2 (en) 1984-11-22 1984-11-22

Country Status (1)

Country Link
JP (1) JPH0348713Y2 (en)

Also Published As

Publication number Publication date
JPH0348713Y2 (en) 1991-10-17

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