JPS6112117U - DC stabilized power supply - Google Patents
DC stabilized power supplyInfo
- Publication number
- JPS6112117U JPS6112117U JP9344584U JP9344584U JPS6112117U JP S6112117 U JPS6112117 U JP S6112117U JP 9344584 U JP9344584 U JP 9344584U JP 9344584 U JP9344584 U JP 9344584U JP S6112117 U JPS6112117 U JP S6112117U
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- voltage
- stabilized power
- differential amplifier
- balanced differential
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Voltage And Current In General (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案による直流安定化電源装置の一実施例を
示す回路図、第２図〜第５図はいずれも第１図の平衡差
動増幅器Ａ部の動作を説明するためのもので第２図はア
ナログ信号入力電圧Ｅ，の負極が安定化出力端子の（＋
）に接続されている場合を示し、第３図はＥ，の正極が
同様に出力端子の（＋）に接続されている場合を示し、
第４図はＥ８の負極が出力端子の（一）に接続されてい
る場合を示し、第５図はＥ８の正極が同じく出力端子の
（一）に接続されている場合の図、第６図は本考案によ
る直流安定化電源装置の他の実施例を示す回路図、第７
図〜第１０図はいずれも第６図の平衡差動増幅器Ａ１部
の動作を説明するための（ので、第７図はアナログ信号
入力電圧Ｅ８の負極が安定化出力端子の（＋）に接続さ
れてぃる場を示し、第８図はＥｓの正極が同様に出力端
子の（＋）に接続されている場合を示し、第９図はＥｓ
の負極が出力端午の（一）に接続されている場合を示し
、第１０図はＥｓの正極が同じく出力端子の（−）に接
続されている場合の図である。
Ｅ・・・非安定主電源、Ｅ３・・・アナログ信号入力電
圧、Ａ・・・平衡差動増幅器、Ａ２・・・誤差増幅器、
Ｑ１・・・トランジスタ、Ｒ〜Ｒ７・・・抵抗、ＲＬ・
・・負荷。FIG. 1 is a circuit diagram showing one embodiment of the DC stabilized power supply according to the present invention, and FIGS. 2 to 5 are all for explaining the operation of the A section of the balanced differential amplifier in FIG. 1. Figure 2 shows that the negative pole of the analog signal input voltage E, is the (+) of the stabilized output terminal.
), and Figure 3 shows the case where the positive terminal of E, is similarly connected to the output terminal (+).
Figure 4 shows the case where the negative pole of E8 is connected to output terminal (1), Figure 5 shows the case where the positive pole of E8 is also connected to output terminal (1), and Figure 6 7 is a circuit diagram showing another embodiment of the DC stabilized power supply device according to the present invention.
Figures 1 to 10 are for explaining the operation of the balanced differential amplifier A1 section in Figure 6 (so, in Figure 7, the negative pole of the analog signal input voltage E8 is connected to the (+) of the stabilized output terminal. Figure 8 shows the case where the positive pole of Es is similarly connected to the output terminal (+), and Figure 9 shows the field where Es
10 shows a case where the negative electrode of Es is connected to (1) of the output terminal, and FIG. 10 shows a case where the positive electrode of Es is also connected to (-) of the output terminal. E...unstable main power supply, E3...analog signal input voltage, A...balanced differential amplifier, A2...error amplifier,
Q1...Transistor, R~R7...Resistor, RL・
··load.
Claims (1)
動増幅器の入力回路を接続し、この平衡差動増幅器の出
力端子を、出力電圧または出力電流を制御するための誤
差増幅器の入力回路に接続し、前記アナログ信号入力電
圧に比例して得られる値の前記平衡差動増幅器の出力電
圧を、前記誤差増幅器の基準電圧として利用し出力電圧
または出力電流を可変制御可能な直流安定化電源装置。Connect the input circuit of a balanced differential amplifier with high input resistance to the positive and negative terminals of the analog signal input voltage, and connect the output terminal of this balanced differential amplifier to the input circuit of an error amplifier for controlling the output voltage or output current. and a DC stabilized power supply device capable of variably controlling the output voltage or output current by using the output voltage of the balanced differential amplifier having a value obtained in proportion to the analog signal input voltage as a reference voltage of the error amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9344584U JPS6112117U (en) | 1984-06-22 | 1984-06-22 | DC stabilized power supply |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9344584U JPS6112117U (en) | 1984-06-22 | 1984-06-22 | DC stabilized power supply |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6112117U true JPS6112117U (en) | 1986-01-24 |
Family
ID=30651133
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9344584U Pending JPS6112117U (en) | 1984-06-22 | 1984-06-22 | DC stabilized power supply |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6112117U (en) |
-
1984
- 1984-06-22 JP JP9344584U patent/JPS6112117U/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6112117U (en) | DC stabilized power supply | |
| JPS5927612U (en) | AC amplifier | |
| JPS59103599U (en) | Output adjustment circuit for small DC motor | |
| JPS59178537U (en) | Combustion control circuit in water heater | |
| JPS61314U (en) | Voltage-current conversion circuit | |
| JPS6061824U (en) | operational amplifier | |
| JPS60158311U (en) | amplifier circuit | |
| JPS6117674U (en) | power detection circuit | |
| JPS6137632U (en) | switching output circuit | |
| JPS6017018U (en) | IC circuit | |
| JPS60116726U (en) | electronic volume | |
| JPS59155613U (en) | constant current power supply | |
| JPS60169800U (en) | Sample/hold circuit | |
| JPS5857980U (en) | resistance measurement circuit | |
| JPS58175415U (en) | sensor circuit | |
| JPS58189619U (en) | level shift circuit | |
| JPS59100353U (en) | absolute value circuit | |
| JPS59119622U (en) | amplifier | |
| JPS628727U (en) | ||
| JPS5828320U (en) | DC stabilized power supply circuit | |
| JPS60108021U (en) | amplifier | |
| JPS5956997U (en) | DC motor speed control circuit | |
| JPS5857978U (en) | resistance measurement circuit | |
| JPS6081669U (en) | Magnetoelectric conversion element circuit | |
| JPS6027511U (en) | current output amplifier |