JPS6191109U - - Google Patents
Info
- Publication number
- JPS6191109U JPS6191109U JP17600484U JP17600484U JPS6191109U JP S6191109 U JPS6191109 U JP S6191109U JP 17600484 U JP17600484 U JP 17600484U JP 17600484 U JP17600484 U JP 17600484U JP S6191109 U JPS6191109 U JP S6191109U
- Authority
- JP
- Japan
- Prior art keywords
- ceramic substrate
- laminated ceramic
- capacitance
- wiring pattern
- holder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 7
- 239000000523 sample Substances 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 2
- 238000007689 inspection Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 1
Landscapes
- Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
Description
第１図は積層セラミツク基板を示す図、および
第２図は本考案の一実施例を示す図である。
１……ＸＹテーブル、２……保持具、３……可
塑性物質、４……積層セラミツク基板、５……対
向電極、６……プローブピン、７……静電容量計
、８……測定データ、９……リードピン。
FIG. 1 is a diagram showing a laminated ceramic substrate, and FIG. 2 is a diagram showing an embodiment of the present invention. 1... XY table, 2... Holder, 3... Plastic material, 4... Laminated ceramic substrate, 5... Counter electrode, 6... Probe pin, 7... Capacitance meter, 8... Measurement data , 9...Lead pin.
Claims (1)
対向対向電極と、この電極と積層セラミツク基板
の配線パターン間の静電容量を測定するプローブ
ピン及び静電容量計と、積層セラミツク基板を固
定するために可塑性物質を装着した保持具と、こ
の保持具と共に積層セラミツク基板の位置決めを
行ないいまた前記プローブピンを積層セラミツク
基板の配線パターンに接触させるＸＹテーブルと
を備えたことを特徴とするパターン検査装置。 A counter electrode placed close to the top of the laminated ceramic substrate, a probe pin and a capacitance meter for measuring the capacitance between this electrode and the wiring pattern of the laminated ceramic substrate, and a capacitance meter for fixing the laminated ceramic substrate. A pattern inspection device comprising: a holder equipped with a plastic material; and an XY table that positions a laminated ceramic substrate together with the holder and brings the probe pins into contact with the wiring pattern of the laminated ceramic substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17600484U JPS6191109U (en) | 1984-11-20 | 1984-11-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17600484U JPS6191109U (en) | 1984-11-20 | 1984-11-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6191109U true JPS6191109U (en) | 1986-06-13 |
Family
ID=30733602
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17600484U Pending JPS6191109U (en) | 1984-11-20 | 1984-11-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6191109U (en) |
-
1984
- 1984-11-20 JP JP17600484U patent/JPS6191109U/ja active Pending
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