JPS618999U

JPS618999U - Dynamic lighting device

Info

Publication number: JPS618999U
Application number: JP1984094092U
Authority: JP
Inventors: 俊郎梶間
Original assignee: 日新電機株式会社
Priority date: 1984-06-22
Filing date: 1984-06-22
Publication date: 1986-01-20

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は一般のダイナミック点灯の説明図、第２図は第
１図における動作説明用のタイミングチャート、第３図
は従来のダイナミック点灯装置のブロック図、第４図以
下の図面はこの考案のダイ−ナミック点灯装置の１実施
例を示し、第４図はブロック，図、第５図はＲＡＭにお
ける点消灯制御データのアドレス割り付けを示す説明図
である。１１〜ｌｍｎ・・・表示器、１０・・・時分割カウンタ
、１２・・・時分割信号ドライブ回路、１６・・・デー
タ転送カウンタ、１８・・・アドレス加算回路、２０・
・・ＲＡＭ，２ｌ・・・データ記憶回路、２２・・・点
消灯制御信号ドライブ回路、ａ・・・時分割用クロツク
信号、ｂ・・・データ転送用クロツク信号、ｐ〜ｐｍ・
・・時分割信号、Ｓ，〜ｓｎ・・・点消灯制御信号。Fig. 1 is an explanatory diagram of general dynamic lighting, Fig. 2 is a timing chart for explaining the operation in Fig. 1, Fig. 3 is a block diagram of a conventional dynamic lighting device, and Fig. 4 and subsequent drawings are of this invention. One embodiment of the dynamic lighting device is shown, FIG. 4 is a block diagram, and FIG. 5 is an explanatory diagram showing address assignment of lighting/extinguishing control data in the RAM. 11-lmn...Display device, 10...Time division counter, 12...Time division signal drive circuit, 16...Data transfer counter, 18...Address addition circuit, 20.
...RAM, 2l...data storage circuit, 22...turn-on/off control signal drive circuit, a...clock signal for time division, b...clock signal for data transfer, p~pm...
...Time division signal, S, ~sn...Light-on/off control signal.

Claims

[Scope of utility model registration request]

In a dynamic lighting device that controls turning on and off of each of a plurality of indicators using a time-sharing signal and a turning-on/off control signal, there is a time-sharing counter that counts a time-sharing clock signal, and a time-sharing counter that counts a time-sharing clock signal, and a time-sharing counter that controls turning on and off of each of a plurality of indicators according to the count value of an approximate counter. A time division signal drive circuit that outputs the time division signal of each display, a digital transfer counter that counts the clock signal for data transfer, and an address that adds the respective count values of both counters and outputs the data read address. an adder circuit; a RAM in which control data for turning on and off each of the indicators is stored in advance and outputs the control data according to an address from the adder circuit; a storage circuit that temporarily stores the control data from the RAM; A dynamic lighting device comprising: a lighting/extinguishing control signal drive circuit that outputs a lighting/extinguishing control signal for each of the indicators based on control data from a storage circuit.