JPS6130891U

JPS6130891U - Watch correction device

Info

Publication number: JPS6130891U
Application number: JP1984115848U
Authority: JP
Inventors: 浩司尾身
Original assignee: リズム時計工業株式会社
Priority date: 1984-07-26
Filing date: 1984-07-26
Publication date: 1986-02-24

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は本考案の一実施例に係る時計のＡ−Ａ線断面図
。第２図は本考案の一実施例に係るアナログ表示時計の斜
視図。第３図は第２図に示すアナログ表示時計の正面図。第４図・第５図及び第８図は本考案の一実施例に係る修
正操作の形態を示す図。第６図は本考案の一実施例に係るアナログ表示時計のブ
ロック回路図。第７図は第６図のタイムチャート。第９図は本考案の他の実施例に係るデジタル表示時計の
正面図。第１０図は本考案の他の実施例に係るデジタル表示時計
のブロック回路図。第１１図〜第１４図は本考案の他の実施例に係る修正操
作の形態を示す図。２６ａ・２６ｂ・２６ｃ・・・修正スイッチ、４２・１
０６・・・時刻表示部、４４・・・時計回路、６８・１
１２・・・複数操作検出回路、７０・１２２・・・修正
禁止回路、８８・９８・・・修正回路。FIG. 1 is a sectional view taken along line A-A of a watch according to an embodiment of the present invention. FIG. 2 is a perspective view of an analog display timepiece according to an embodiment of the present invention. FIG. 3 is a front view of the analog display clock shown in FIG. 2. FIG. 4, FIG. 5, and FIG. 8 are diagrams showing forms of correction operations according to an embodiment of the present invention. FIG. 6 is a block circuit diagram of an analog display timepiece according to an embodiment of the present invention. Figure 7 is the time chart of Figure 6. FIG. 9 is a front view of a digital display timepiece according to another embodiment of the present invention. FIG. 10 is a block circuit diagram of a digital display timepiece according to another embodiment of the present invention. FIGS. 11 to 14 are diagrams showing forms of correction operations according to other embodiments of the present invention. 26a/26b/26c...correction switch, 42/1
06... Time display section, 44... Clock circuit, 68.1
12...Multiple operation detection circuit, 70/122...Modification prohibition circuit, 88/98...Modification circuit.

Claims

[Scope of utility model registration request]

A clock circuit that generates a time signal, a timetable system that displays the time based on the time signal, and a plurality of correction switches that are individually disposed on multiple surfaces of the clock exterior and that select different time adjustment operations by external operation. , a correction circuit that performs a time correction operation corresponding to the selection operation of the correction switch among the times displayed on the time display section by the operation of the correction switch;
The present invention further includes: a multiple operation detection circuit that outputs a detection signal when a plurality of the correction switches are operated at the same time; and a modification prohibition circuit that prohibits the correction operation of the correction circuit based on the detection signal from the multiple operation detection circuit. Features a watch correction device.