JPS59154973U - Digital XTV image processing device - Google Patents
Digital XTV image processing deviceInfo
- Publication number
- JPS59154973U JPS59154973U JP1983048975U JP4897583U JPS59154973U JP S59154973 U JPS59154973 U JP S59154973U JP 1983048975 U JP1983048975 U JP 1983048975U JP 4897583 U JP4897583 U JP 4897583U JP S59154973 U JPS59154973 U JP S59154973U
- Authority
- JP
- Japan
- Prior art keywords
- image
- image processing
- xtv
- digital
- output data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Picture Signal Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案によるディジタルＸＴＶ画像処理装置の
一実施例の要部を示すブロック図、第２図は同上装置の
動作を説明するための信号波形図、第３図は本考案装置
の他の実施例の要部を示すブロック図である。
１・・・演算処理回路、２・・・レジスタ（一時記憶回
路）、３・・・タイミング回路、Ｔ□・・・画像表示期
間、Ｔ２・・・ブランキング期間。FIG. 1 is a block diagram showing the main parts of an embodiment of the digital XTV image processing device according to the present invention, FIG. 2 is a signal waveform diagram for explaining the operation of the same device, and FIG. 3 is a diagram showing other parts of the device according to the present invention. FIG. 2 is a block diagram showing main parts of an embodiment of the present invention. 1... Arithmetic processing circuit, 2... Register (temporary storage circuit), 3... Timing circuit, T□... Image display period, T2... Blanking period.
Claims (1)
について画像処理内容を設定するための出力データを１
画像毎の複数種の制御データに基づきインタブリートし
て作成する演算処理回路と、この演算処理回路で作成さ
れた出力データを一時記憶する一時記憶回路と、この一
時記憶回路に記憶された出力データを前記１の画像表示
期間に後続するビデオ信号中のブランキング期間内で出
力させるタイミング回路とを具備し、画像表示期間単位
で後続する画像についての画像処理内容を任意に設定可
能にしたことを特徴とするディジタルＸＴＶ画像処理装
置。Within one image display period in the video signal, output data for setting the image processing content for the subsequent image is
An arithmetic processing circuit that is interleaved and created based on multiple types of control data for each image, a temporary storage circuit that temporarily stores output data created by this arithmetic processing circuit, and output data stored in this temporary storage circuit. and a timing circuit for outputting the image within a blanking period in a video signal following the first image display period, and image processing contents for subsequent images can be arbitrarily set in units of image display periods. Features: Digital XTV image processing device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983048975U JPS59154973U (en) | 1983-04-04 | 1983-04-04 | Digital XTV image processing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983048975U JPS59154973U (en) | 1983-04-04 | 1983-04-04 | Digital XTV image processing device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59154973U true JPS59154973U (en) | 1984-10-17 |
Family
ID=30179492
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1983048975U Pending JPS59154973U (en) | 1983-04-04 | 1983-04-04 | Digital XTV image processing device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59154973U (en) |
-
1983
- 1983-04-04 JP JP1983048975U patent/JPS59154973U/en active Pending
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