JPS6188441U - - Google Patents
Info
- Publication number
- JPS6188441U JPS6188441U JP17114084U JP17114084U JPS6188441U JP S6188441 U JPS6188441 U JP S6188441U JP 17114084 U JP17114084 U JP 17114084U JP 17114084 U JP17114084 U JP 17114084U JP S6188441 U JPS6188441 U JP S6188441U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- charge
- value
- power supply
- discharge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 230000007423 decrease Effects 0.000 claims 2
- 238000007599 discharging Methods 0.000 claims 1
- 230000014759 maintenance of location Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Description
第１図は本考案に係る装置の一例を示す構成ブ
ロツク図、第２図はその動作波形図、第３図は従
来装置の構成ブロツク図である。
１…電源、２…保持時間測定装置、３…整流回
路、４，５…充放電回路、６…尖頭値検出回路、
８…カウンタ、９…Ａ／Ｄ変換器、１０…演算回
路。
FIG. 1 is a block diagram showing an example of a device according to the present invention, FIG. 2 is a waveform diagram of its operation, and FIG. 3 is a block diagram of a conventional device. DESCRIPTION OF SYMBOLS 1... Power supply, 2... Holding time measuring device, 3... Rectifier circuit, 4, 5... Charge/discharge circuit, 6... Peak value detection circuit,
8... Counter, 9... A/D converter, 10... Arithmetic circuit.
Claims (1)
流回路と、この整流回路の出力を充放電する充放
電回路と、充放電回路からの充放電電圧を入力し
その尖頭値を検出する尖頭値検出回路と、前記被
測定電源からの直流出力の値が所定の設定値まで
減少した時点でクロツクを計数し始め前記充放電
回路からの充放電電圧が所定の設定値まで減少し
た時点で計数を停止するカウンタと、このカウン
タの計数値と前記尖頭値検出回路で検出された尖
頭値に関連するデイジタル信号とを入力し所定の
演算を行なつて前記電源の保持時間を求める演算
回路とを具備した電源の保持時間測定装置。 A rectifier circuit that rectifies the AC signal input to the power supply under test, a charge/discharge circuit that charges and discharges the output of this rectifier circuit, and a peak circuit that inputs the charge/discharge voltage from the charge/discharge circuit and detects its peak value. When the value of the DC output from the value detection circuit and the power supply under test decreases to a predetermined set value, clocks are counted. When the charging/discharging voltage from the charge/discharge circuit decreases to a predetermined set value, counting begins. an arithmetic circuit that calculates the holding time of the power supply by inputting the counted value of the counter and a digital signal related to the peak value detected by the peak value detection circuit and performing a predetermined arithmetic operation; A power supply retention time measuring device comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17114084U JPS6188441U (en) | 1984-11-12 | 1984-11-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17114084U JPS6188441U (en) | 1984-11-12 | 1984-11-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6188441U true JPS6188441U (en) | 1986-06-09 |
Family
ID=30728836
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17114084U Pending JPS6188441U (en) | 1984-11-12 | 1984-11-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6188441U (en) |
-
1984
- 1984-11-12 JP JP17114084U patent/JPS6188441U/ja active Pending
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