JPS6188381U - - Google Patents

Info

Publication number
JPS6188381U
JPS6188381U JP1984172019U JP17201984U JPS6188381U JP S6188381 U JPS6188381 U JP S6188381U JP 1984172019 U JP1984172019 U JP 1984172019U JP 17201984 U JP17201984 U JP 17201984U JP S6188381 U JPS6188381 U JP S6188381U
Authority
JP
Japan
Prior art keywords
stereo
signal
demodulator
output terminal
sub
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1984172019U
Other languages
Japanese (ja)
Other versions
JPH021987Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984172019U priority Critical patent/JPH021987Y2/ja
Publication of JPS6188381U publication Critical patent/JPS6188381U/ja
Application granted granted Critical
Publication of JPH021987Y2 publication Critical patent/JPH021987Y2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Television Receiver Circuits (AREA)
  • Stereo-Broadcasting Methods (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路図及び第
2図は従来の受信装置を示す回路図である。 主な図番の説明、24…ステレオマルチプレツ
クス回路、25,32,33,34…スイツチ回
路、27…FM検波回路、30,31…減算回路
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional receiving device. Explanation of main figure numbers, 24... Stereo multiplex circuit, 25, 32, 33, 34... Switch circuit, 27... FM detection circuit, 30, 31... Subtraction circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] FMステレオ信号とテレビ音声多重信号とを受
信し得る受信装置において、FMステレオ信号か
ら左右ステレオ信号を分離するとともに、テレビ
音声多重信号の主チヤンネル信号を通過させるス
テレオ復調部と、前記テレビ音声多重信号の副チ
ヤンネル信号を復調する副チヤンネル信号復調部
と、前記ステレオ復調部の第1出力端子に接続さ
れる第1演算回路と、前記ステレオ復調部の第2
出力端子に接続される第2演算回路と、前記ステ
レオ復調部の入力端子に接続される第1スイツチ
回路と、前記副チヤンネル信号復調部の反転出力
端子と前記第1演算回路との間に接続される第2
スイツチ回路と、前記副チヤンネル信号復調部の
出力端子と前記第2演算回路との間に接続される
第3スイツチ回路と、前記ステレオ復調部の第2
出力端子と前記第2演算回路との間に接続される
第4スイツチ回路と、前記第1乃至第4スイツチ
回路を制御する手動切換スイツチとを備え、前記
手動切換スイツチを切換えることにより前記第1
乃至第4スイツチ回路を選択的に導通させ、ステ
レオ位置、主チヤンネル位置、副チヤンネル位置
及び混合チヤンネル位置で、左右出力端子からそ
れぞれ左右ステレオ信号、第1音声信号のみ、第
2音声信号のみ及び第1、第2音声信号を発生さ
せる様にしたことを特徴とする受信装置。
A receiving device capable of receiving an FM stereo signal and a television audio multiplexed signal, comprising a stereo demodulator that separates left and right stereo signals from the FM stereo signal and passes a main channel signal of the television audio multiplexed signal, and the television audio multiplexed signal. a sub-channel signal demodulation section that demodulates a sub-channel signal of the stereo demodulation section; a first arithmetic circuit connected to a first output terminal of the stereo demodulation section;
a second arithmetic circuit connected to the output terminal; a first switch circuit connected to the input terminal of the stereo demodulator; and a connection between the inverting output terminal of the sub-channel signal demodulator and the first arithmetic circuit. second to be done
a third switch circuit connected between the output terminal of the sub-channel signal demodulator and the second arithmetic circuit; a second switch circuit of the stereo demodulator;
a fourth switch circuit connected between an output terminal and the second arithmetic circuit; and a manual changeover switch for controlling the first to fourth switch circuits;
The fourth switch circuit is selectively made conductive, and the left and right stereo signals, only the first audio signal, only the second audio signal, and only the second audio signal are output from the left and right output terminals at the stereo position, main channel position, subchannel position, and mixed channel position, respectively. 1. A receiving device characterized in that it generates a second audio signal.
JP1984172019U 1984-11-13 1984-11-13 Expired JPH021987Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984172019U JPH021987Y2 (en) 1984-11-13 1984-11-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984172019U JPH021987Y2 (en) 1984-11-13 1984-11-13

Publications (2)

Publication Number Publication Date
JPS6188381U true JPS6188381U (en) 1986-06-09
JPH021987Y2 JPH021987Y2 (en) 1990-01-18

Family

ID=30729692

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984172019U Expired JPH021987Y2 (en) 1984-11-13 1984-11-13

Country Status (1)

Country Link
JP (1) JPH021987Y2 (en)

Also Published As

Publication number Publication date
JPH021987Y2 (en) 1990-01-18

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