JPS6454473U - - Google Patents

Info

Publication number
JPS6454473U
JPS6454473U JP14807387U JP14807387U JPS6454473U JP S6454473 U JPS6454473 U JP S6454473U JP 14807387 U JP14807387 U JP 14807387U JP 14807387 U JP14807387 U JP 14807387U JP S6454473 U JPS6454473 U JP S6454473U
Authority
JP
Japan
Prior art keywords
control signal
audio
circuit
demodulator
turns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14807387U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14807387U priority Critical patent/JPS6454473U/ja
Publication of JPS6454473U publication Critical patent/JPS6454473U/ja
Pending legal-status Critical Current

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  • Television Receiver Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案のTV音声多重復調回路の実
施例を示すブロツク図である。第2図は従来例を
示すブロツク図である。 主要部分の符号の説明、1:TV音声多重復調
IC、2:デイエンフアシス回路、3:スイツチ
回路。
FIG. 1 is a block diagram showing an embodiment of the TV audio multiplexing and demodulating circuit of this invention. FIG. 2 is a block diagram showing a conventional example. Explanation of the symbols of the main parts: 1: TV audio multiplexing and demodulating IC, 2: De-emphasis circuit, 3: Switch circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] TV音声多重復調器と、このTV音声多重復調
器へ並列に接続されたデイエンフアシス回路と、
TV音声多重放送受信の有無を検出し制御信号を
生成出力する制御信号出力回路と、この制御信号
出力回路の制御信号によりTV音声多重放送受信
時はTV音声多重復調器の出力線路をオンし、ま
たTVモノラル放送受時はデイエンフアシス回路
の出力線路をオンとするスイツチ回路とを備えた
ことを特徴とするTV音声多重復調回路。
a TV audio multiplexing demodulator; a de-emphasis circuit connected in parallel to the TV audio multiplexing demodulator;
a control signal output circuit that detects the presence or absence of TV audio multiplex broadcast reception and generates and outputs a control signal; a control signal of the control signal output circuit turns on the output line of the TV audio multiplex demodulator when receiving TV audio multiplex broadcast; The TV audio multiplexing and demodulation circuit is also characterized by comprising a switch circuit that turns on the output line of the de-emphasis circuit when receiving TV monaural broadcasting.
JP14807387U 1987-09-30 1987-09-30 Pending JPS6454473U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14807387U JPS6454473U (en) 1987-09-30 1987-09-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14807387U JPS6454473U (en) 1987-09-30 1987-09-30

Publications (1)

Publication Number Publication Date
JPS6454473U true JPS6454473U (en) 1989-04-04

Family

ID=31419058

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14807387U Pending JPS6454473U (en) 1987-09-30 1987-09-30

Country Status (1)

Country Link
JP (1) JPS6454473U (en)

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