JPS6184185A - Character/graphic display device - Google Patents

Abstract

PURPOSE: To prevent securely overlapped writing and erroneous writing by constituting such that character/graphic information displayed on a scope is erased with use of a screen erase period which has the same width as a screen display period and comes to the final terms in the practically end term of a vertical scan period. CONSTITUTION:A character/graphic display device 21 is provided with an erasing row address counter 22 independent of a row address counter 17, and counters 17 and 22 are connected to a diplay memory circuit 11 through a switching circuit 23 so that said counters 17 and 22 can be switched at the time of writing and erasing character and graphic information. The scope erase signal from a reception control circuit 10 switches the circuit 23, which supplies the row address signal from the counter 22 to the circuit 11. The character and graphic information which the circuit 10 has read out from the circuit 11 is erased with use of the scope erase period which has the same width as a scope display period and comes to the final terms in the practically end term of a vertical scan period, while the erase signal is read out form the circuit 11.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a character/figure display device that allows characters, figures, etc. displayed on a screen to be reliably erased.

[Conventional technology]

Teletext broadcasting uses time gaps in television waves to transmit patterns consisting of letters and figures.By repeatedly broadcasting the latest information in letters and figures, it provides timeliness and selectivity on the receiving side. be able to. In the character/graphic display device 1 shown in FIG. 2, a channel selection circuit 3 and a detection circuit 4 selectively detect a video signal of a desired channel from radio waves captured by an antenna 2, and a video circuit 5 and an output switching circuit 6 The character signal separated from the vertical blanking period of the video signal is displayed on the picture tube 7 through the character signal processing circuit 8.
is constructed so that it can be projected onto the picture tube 7.

The character signal processing circuit 8 includes a data extraction circuit 9 that extracts character data from the video signal detected by the detection circuit 4.
The output of is stored in a predetermined location of the display memory circuit 110 via the reception control circuit 10t, and the signals necessary for controlling the operation of the display memory circuit 11 and the output switching circuit 6 are
The configuration is obtained from a synchronization separation circuit 12 and a clock generation circuit 13. The synchronization separation circuit 12 separates horizontal and vertical synchronization signals from the video signal detected by the detection circuit 4, and transmits the horizontal synchronization signals and the horizontal and vertical synchronization signals to the horizontal position counter 14 and the vertical position counter 15, respectively. supply the signal. The clock generation circuit 13 forms a clock signal from the data extracted by the data extraction circuit 9, and supplies the generated clock signal to the horizontal position counter 14.

The horizontal position counter 14 and the vertical position counter 15 count the display position of characters and figures displayed on the screen by dividing them into the horizontal position and vertical position. Row address counter 1
7. The column address counter 16 and the row address counter 17 determine a screen display period that is 9 times smaller than the screen frame by specifying address positions in the horizontal and vertical directions, and their respective count outputs are stored in the display memory circuit. 11.

The output switching circuit 6 is switched by the outputs of the horizontal position counter 14 and the vertical position counter 15, and the reception control circuit 1 is used to select character information desired to be received.
A keyboard device 18 connected to 0 is used.

[Problem that the invention seeks to solve]

In the conventional character/graphics display device 1 described above, a data packet containing 296 bits of pixel information and various control information constituting a character/graphic pattern is transmitted at 16H or 21H during the vertical retrace period.
H (however, H indicates between horizontal scanners), and the screen display period is 4 times from the vertical synchronizing signal.
Since it is set to 204 lines from 0H to 243H, the period during which the reception control circuit 10 can access is limited to a very short period between the superimposition position of the data packet and the start position of the screen display period. Become.

For this reason, the signal processing of the reception control circuit 10 must be quick, and a high-speed calculation type with a short clock cycle is required. Since the period coincides with the screen display period, erasing the screen by reading the erasing signal from the display memory circuit 11 and reading new data tend to overlap, and the reception control circuit 10 does not complete its operation within a predetermined time. , damage etc. are likely to occur, especially in the reception control circuit 10.
This type of inconvenience is likely to occur during scrolling display, which increases the amount of work.

[Means to solve all problems]

This invention solves the above problem, and a reception control circuit receives the character/graphic information superimposed during the vertical blanking period and stores it in a memory circuit, and the reception control circuit specifies an address. A character/graphic display device that displays character/graphic information read from a memory circuit on a screen using a fixed screen display period narrower than a vertical scanning period; The memory circuit f is configured such that a signal for erasing information is read out using a screen erasing period that has the same width as the screen display period and ends at approximately the end of the vertical scanning period.
! ii: The purpose of chivalry is to have a configuration that controls I.

[Effect]

In the present invention, a reception control circuit that receives character and graphic information superimposed during a vertical blanking period can control characters and figures displayed on a screen.
Graphic information is erased using a screen erasing period that has the same width as the screen display period and ends almost at the end of the vertical scanning period.

〔Example〕

Hereinafter, embodiments of the present invention will be described with reference to FIG. FIG. 1 is a circuit diagram showing an embodiment of the character/graphic display device of the present invention.

In FIG. 1, the same components as in FIG. 2 are given the same reference numerals.

In FIG. 1, the character/graphics display device 21 is provided with a row address counter 22 for erasing separately from the row address counter 17, and the row address counter 17 and the row address counter 22 for erasing are used for writing and erasing character/graphic information. The double-fold address counter 17.22 is connected to the display memory circuit 11 via a switching circuit 23 so that the row address counter 22 can be switched.

The switching circuit 23 is switched by the screen erasing signal from the reception control circuit 10, and the erasing row address counter 22
A row address signal from the display memory circuit 11 is supplied to the display memory circuit 11. In this embodiment, the screen blanking period is set to a period of 58H to 261H from the vertical synchronization signal by making the most of the screen frame, instead of the conventional screen display period of 40H to 243H from the vertical synchronization signal. .

Therefore, the signal processing period allowed for the reception control circuit 10 when erasing the screen can be increased by 18H compared to the conventional method. Therefore, even if the work load of the reception control circuit 10 is large and the reception control circuit 10 cannot complete the control operation within 40H from the vertical synchronization signal,
Since it only needs to be completed within H, the screen will not be erased incompletely, and inconveniences such as double writing can be reliably prevented.

In this way, the character/graphic display device 21 allows the reception control circuit 10, which receives the character/graphic information superimposed during the vertical blanking period, to read out the character/graphic information from the display memory circuit 11 and display it on the screen. , while reading out the erasing signal from the display memory circuit 11, the screen erasing period is erased during the entire screen erasing period which has the same width as the screen display period and ends almost at the end of the vertical/plane scanning period. As in the conventional character/graphic display device 1, which has the same period as the screen display period, the signal processing period of the reception control circuit 10 is extremely short between the superimposition position of the character/graphic information and the start position of the screen display period. The reception control circuit 10 is not limited by the period, and even when the workload is large, the reception control circuit 10 can process the signal with plenty of time. The amount of work can be increased or the clock period for the same amount of work can be lengthened.

〔Effect of the invention〕

As explained above, according to the present invention, the reception control circuit that receives the text/graphic information superimposed on the vertical blanking period receives the text/graphic information displayed on the screen with the same width as the screen display period. , and because it is configured to erase using the screen erase period that ends almost at the end of the vertical scanning period, the reception control is similar to conventional character/graphic display devices in which the screen erase period is the same period as the screen display period. The signal processing period of the circuit is not limited to the very short period between the superimposition position of character/graphic information and the start position of the screen display period, and even when the workload is large, the reception control circuit can process the signal with plenty of time. This reliably prevents double writing and write errors, while also providing excellent effects such as increasing the workload of the reception control circuit or lengthening the clock cycle for the same workload. play.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the character/graphics display device of the present invention, and FIG. 2 is a circuit diagram showing an example of a conventional character/graphics display device. 8...Character signal processing circuit, 10...Reception control circuit,
DESCRIPTION OF SYMBOLS 11... Display memory circuit, 21... Character/graphic display device, 22... Address counter for erasing.

Claims (1)

[Claims] A reception control circuit receives the character/graphic information superimposed during the vertical blanking period and stores it in a memory circuit, and vertically scans the character/graphic information read out from the memory circuit by specifying an address by the reception control circuit. The character/figure display device displays characters on the screen using a fixed screen display period that is narrower than the screen display period, and the reception control circuit controls the characters/figures displayed on the screen.
The memory circuit is controlled so that a signal for erasing graphic information is read out using a screen erasing period that has the same width as the screen display period and ends at approximately the end of the vertical scanning period. Character/graphic display device.