JPS6182449A - Plastic molded semiconductor device - Google Patents

Plastic molded semiconductor device

Info

Publication number
JPS6182449A
JPS6182449A JP59205005A JP20500584A JPS6182449A JP S6182449 A JPS6182449 A JP S6182449A JP 59205005 A JP59205005 A JP 59205005A JP 20500584 A JP20500584 A JP 20500584A JP S6182449 A JPS6182449 A JP S6182449A
Authority
JP
Japan
Prior art keywords
plastic
glass
metal ring
ultraviolet
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59205005A
Other languages
Japanese (ja)
Inventor
Sadamu Matsuda
定 松田
Kunihito Sakai
酒井 国人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59205005A priority Critical patent/JPS6182449A/en
Publication of JPS6182449A publication Critical patent/JPS6182449A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0203Containers; Encapsulations, e.g. encapsulation of photodiodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating

Abstract

PURPOSE:To prevent a window glass material from cracking by securing a roughened metal ring on the periphery of an ultraviolet ray transmission glass in case of molding with plastic a semiconductor element by transfer molding, thereby eliminating a gap of a junction between the plastic and the window glass. CONSTITUTION:A metal ring 19 is engaged with the periphery of an ultraviolet ray transmission glass. The engaged aluminum ring 19 is chemically or mechanically treated to be roughened on the surface. A semiconductor element is molded with plastic by the ring 19 engaged with the periphery of the glass 8 to form a semiconductor device. Thus, the total sum of the thermal expansion coefficient of the glass and the plastic package can be provided to endure a heat shock tester or a pressure crack test.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明はプラスチックモールド型半導体装置に関し、
たとえばEPROMのようにプラスチックパッケージに
紫外線透過ガラスを嵌め込んだようなプラスチックモー
ルド型半導体装置の改良に関する。
[Detailed Description of the Invention] [Industrial Application Field] This invention relates to a plastic molded semiconductor device,
The present invention relates to improvements in plastic molded semiconductor devices, such as EPROMs, in which ultraviolet-transmissive glass is fitted into a plastic package.

[従来の技術] EFROMは、情報を一度記憶すると、電源を遮断して
もその記憶内容が消えることがなく、紫外線を照射する
と記憶内容が簡単に消えるメモリであり、紫外線を透過
する窓ガラスを備えている。
[Prior Art] EFROM is a type of memory that, once information is stored, does not disappear even if the power is cut off, and the stored contents easily disappear when exposed to ultraviolet rays. We are prepared.

窓ガラスの材料としては、石英ガラスやサファイヤガラ
スが使用されている。ところが、この窓ガラス材料とパ
ッケージ材料の温度変化に対する接合が困難であり、従
来はセラミックによるパッケージが行なわれていた。
Quartz glass and sapphire glass are used as window glass materials. However, it is difficult to bond the window glass material and the package material against temperature changes, and conventionally ceramic packages have been used.

第4図は従来のセラミックパッケージで形成された半導
体iaiの断面図である。まず、第4図を参照して、従
来のセラミックパッケージの半導体VR@の構成につい
て説明する。セラミックベース1には、低鵬点ガラス2
により銀めっき板3が接着され、ざらにその上にチップ
4がはんだ付けされている。チップ4は金115によっ
てリードフレーム6にワイヤポンディングされる。そし
て、セラミック蓋7が低融点ガラス2により封着されて
いる。チップ4の上部には、セラミック蓋7に紫外線透
過用の窓ガラス8が取付けられている。
FIG. 4 is a cross-sectional view of a semiconductor iai formed with a conventional ceramic package. First, with reference to FIG. 4, the configuration of a semiconductor VR@ of a conventional ceramic package will be described. Ceramic base 1 contains low-temperature glass 2
A silver plated plate 3 is adhered to the plate, and a chip 4 is roughly soldered thereon. Chip 4 is wire bonded to lead frame 6 with gold 115. A ceramic lid 7 is sealed with low melting point glass 2. At the top of the chip 4, a window glass 8 for transmitting ultraviolet rays is attached to a ceramic lid 7.

従来のセラミックパッケージ型EPRO¥は上述のごと
く構成されているが、一般にセラミック樹脂は価格が高
く、生産性が悪いという欠点があった。そこで、最近で
は、相対的に価格の安いプラスチックパッケージ型にす
ることが考えられている。
The conventional ceramic package type EPRO has the structure described above, but ceramic resins generally have the drawbacks of being expensive and having poor productivity. Therefore, recently, consideration has been given to using a relatively inexpensive plastic package type.

第5図および第6図はプラスチックパッケージ型EFR
OMの製造方法を説明するための図である。次に、第5
図および第6図を参照して、プラスチックパッケージ型
EFROMの製造方法について説明する。まず、第5図
に示すように、下型9に紫外線透過ガラス8と、逆にし
たリードフレーム6をセットし、ニッケル箔1oとサン
ドイッチしたプリプレグ樹脂11を高温において溶胆す
る。下型9にはマグネット14が組み込まれていて、こ
のマグネット14によりニッケル箔10が吸引される。
Figures 5 and 6 are plastic package type EFR.
It is a figure for explaining the manufacturing method of OM. Next, the fifth
A method of manufacturing a plastic package type EFROM will be described with reference to the drawings and FIG. First, as shown in FIG. 5, the ultraviolet-transmitting glass 8 and the inverted lead frame 6 are set in the lower mold 9, and the prepreg resin 11 sandwiched with the nickel foil 1o is melted at a high temperature. A magnet 14 is incorporated in the lower die 9, and the nickel foil 10 is attracted by the magnet 14.

そのために、溶融した樹脂11はリードフレーム6の間
隙13から流れ込んで凝固し、空洞15が作成される。
For this purpose, the molten resin 11 flows into the gap 13 of the lead frame 6 and solidifies, creating a cavity 15.

次に、上型16により、リードフレーム6を締め込んで
、トランスファ成型によりプラスチック17をパッケー
ジする。このようにして成型したEPROM、よ第6図
、示すよう1、チップ部が空洞になる。
Next, the lead frame 6 is tightened using the upper die 16, and the plastic 17 is packaged by transfer molding. As shown in FIG. 6, the EPROM thus molded has a hollow chip portion.

[発明が解決しようとする問題点] 上述の製造方法で製造されたプラスチックパッケージ型
EPROMは、樹脂11と紫外I透過ガラス8との熱膨
張計数が異なるため、ヒートショック試論により、紫外
線透過ガラス8に割れ12を生じたり、紫外線透過ガラ
ス8とモールドしたプラスチック17との界面18にす
き間が生じるという問題点があった。
[Problems to be Solved by the Invention] In the plastic package type EPROM manufactured by the above manufacturing method, since the resin 11 and the ultraviolet I transmitting glass 8 have different thermal expansion coefficients, the ultraviolet I transmitting glass 8 There are problems in that cracks 12 occur in the glass and gaps are created at the interface 18 between the ultraviolet-transmitting glass 8 and the molded plastic 17.

それゆえに、この発明の主たる目的は、上述の問題点を
除去するためになされたものであり、プラスチックと窓
ガラスとの接合部にすき間を生じたり窓ガラス材料が割
れたりすることのないようなプラスチックモールド型半
導体装置を提供することである。
Therefore, the main object of the present invention is to eliminate the above-mentioned problems, and to provide a method that prevents gaps from forming at the joint between the plastic and the window glass and from causing the window glass material to break. An object of the present invention is to provide a plastic molded semiconductor device.

[問題点を解決するための手段] この発明は、トランスファ成型により半導体素子をプラ
スチックモールドする際に、紫外線透過ガラスの周囲に
粗面化した金属リングを固着したものである。
[Means for Solving the Problems] According to the present invention, a roughened metal ring is fixed around an ultraviolet transmitting glass when plastic molding a semiconductor element by transfer molding.

[作用] この発明では、紫外線透過用窓ガラス材の周囲に金属リ
ングを嵌め゛込み、化学的処理または機械的処理を施す
ことにより、プラスチックと窓ガラス材料との熱膨張係
数のa1]を図ることができ、ざらにプラスチックと金
属リングとの接着強度を向上することができる。
[Function] In this invention, a metal ring is fitted around the window glass material for transmitting ultraviolet rays, and the thermal expansion coefficient a1 between the plastic and the window glass material is achieved by applying chemical or mechanical treatment. It can roughly improve the adhesive strength between the plastic and metal ring.

[実施例] 第1図はこの発明の一実施例の断面図であり、第2因は
紫外線透過ガラスの周囲に金属リングを嵌め込んだ状態
を示す図であり、第3図は紫外線透過ガラスとそれに嵌
め込まれた金属リングの要部拡大図である。
[Example] Fig. 1 is a cross-sectional view of an embodiment of the present invention, the second factor is a diagram showing a state in which a metal ring is fitted around the ultraviolet-transparent glass, and Fig. 3 is a cross-sectional view of an example of the ultraviolet-transparent glass. and an enlarged view of the main parts of the metal ring fitted therein.

第1図において、この発明の一実施例では、紫外線透過
ガラス8の周囲に金属リング19を嵌め込む。すなわち
、−例として嵌め合い公差に縛り嵌めを用いた場合、ま
ず紫外線透過ガラス8の外9としてアルミニウムを用い
、その内径を8.00に加工する。この状態では、紫外
線透過ガラス8はアルミリング19に入らないため、ア
ルミリング19を400℃に加熱する。すると、アルミ
リ線透過ガラス8を嵌め込む。そして、紫外線透過ガラ
ス8とアルミリング19は常温に戻るときの線膨張差に
よって気密シールされる。
In FIG. 1, in one embodiment of the invention, a metal ring 19 is fitted around the ultraviolet-transmissive glass 8. As shown in FIG. That is, as an example, in the case where a tight fitting is used for the fitting tolerance, aluminum is first used as the outer part 9 of the ultraviolet transmitting glass 8, and its inner diameter is processed to 8.00 mm. In this state, the ultraviolet transmitting glass 8 does not enter the aluminum ring 19, so the aluminum ring 19 is heated to 400°C. Then, the aluminum wire transmitting glass 8 is fitted. The ultraviolet transmitting glass 8 and the aluminum ring 19 are hermetically sealed due to the difference in linear expansion when the temperature returns to room temperature.

次に、嵌め込みを行なったアルミリング19に化学的処
理または機械的処理を施し、第5図に示すようにその表
面を粗面化する。このように紫外線透過ガラス8の周囲
に金属リング19を嵌め込んだものを用いて、前述の第
5図および第6図を説明した製造方法により、半導体素
子をプラスチックモールドする。それによって、第1図
に示すように、プラスチックモールドされた半導体装置
を構成できる。
Next, the fitted aluminum ring 19 is subjected to chemical or mechanical treatment to roughen its surface as shown in FIG. Using the ultraviolet transmitting glass 8 with the metal ring 19 fitted around it, a semiconductor element is molded into plastic by the manufacturing method described above with reference to FIGS. 5 and 6. Thereby, a plastic molded semiconductor device can be constructed as shown in FIG.

なお、上述の化学的処理または機械的処理された金属リ
ング19はプラスチック17と強い接着力を有する。
Note that the chemically or mechanically treated metal ring 19 has strong adhesion to the plastic 17.

また、この発明の一実施例における紫外I!透過ガラス
8としては、石英ガラス、サファイヤガラス、8珪酸ガ
ラスなどが用いられるが、中でも熱膨張係数の大きな硼
珪酸ガラスを用いるのが最も好ましい。また、金属リン
グ19としては、銅。
In addition, ultraviolet I! in one embodiment of the present invention! As the transparent glass 8, quartz glass, sapphire glass, 8-silicate glass, etc. can be used, but among them, it is most preferable to use borosilicate glass, which has a large coefficient of thermal expansion. Further, the metal ring 19 is made of copper.

アルミニウム、クロムなどの金属が掲げられるが、中で
もアルミニウムはプラスチック12との接着強度が大き
いので好ましい。また、金属リング19の化学的処理と
しては、ケミカルエツチングなどの薬品処理を用い、機
械的処理としてはショツトブラストなどを用いるのがよ
い。
Metals such as aluminum and chromium are listed, and among them, aluminum is preferable because it has a high adhesive strength with the plastic 12. Further, as the chemical treatment for the metal ring 19, it is preferable to use a chemical treatment such as chemical etching, and as the mechanical treatment, it is preferable to use shot blasting or the like.

[発明の効果] 以上のように、この発明によれば、紫外線透過ガラスの
周囲に金属リングを固着してトランスファ成型により半
導体素子をプラスチックモールドするようにしたので、
紫外S透過ガラスとプラスチックパッケージとの熱膨張
係数の総和を図ることができ、さらに化学的処理または
機械的処理によりプラスチックとの強い接着力が得られ
る。したがって、ヒートショック試験またはプレッシャ
ークツカー試験に対して耐えられる安価なプラスチック
モールド型半導体装置を得ることができる。
[Effects of the Invention] As described above, according to the present invention, a metal ring is fixed around the ultraviolet-transmitting glass and a semiconductor element is molded into plastic by transfer molding.
It is possible to achieve a total thermal expansion coefficient between the ultraviolet S-transmitting glass and the plastic package, and furthermore, a strong adhesive force with the plastic can be obtained by chemical treatment or mechanical treatment. Therefore, it is possible to obtain an inexpensive plastic molded semiconductor device that can withstand a heat shock test or a pressure stress test.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例の縦断面図である。 第2図は紫外線透過ガラスに金属リングを嵌め込んだ状
態を示す図である。第3図は紫外線透過ガラスとそれに
嵌め込まれた金属リングの要部拡大図である。第4図は
この発明の背景となるEPROMの断面図である。第5
図および第6図は従来のEPROMの製造方法を示す図
である。 図において、1はセラミックベース、4はチップ、5は
金線ワイヤ、6はリードフレーム、8は紫外線透過用窓
ガラス、10はニッケル箔、11はプリプレグ[1,1
5は空洞、17はプラスチック、19は金属リングを示
す。 代  理  人     大  岩  増  雄冥1 
図 冥2図 第3図 第4図 第6図 手続補正書(自発) 868160年1 .47  日 1、事件の表示   特願昭59−205005号2、
発明の名称 プラスチックモー〃ド聾半導体装置 3、補正をする者 5、補正の対象 明細書の発明の詳細な説明の欄 6、補正の内容 (1) 明細書第5頁第10行、第7頁第20行の「総
和」を「緩和」に訂正する。 (2) 明細書第6頁第13行の「第5図」を「第3図
」に訂正する。 以上
FIG. 1 is a longitudinal sectional view of an embodiment of the present invention. FIG. 2 is a diagram showing a state in which a metal ring is fitted into the ultraviolet-transmitting glass. FIG. 3 is an enlarged view of the essential parts of the ultraviolet transmitting glass and the metal ring fitted therein. FIG. 4 is a sectional view of an EPROM which is the background of this invention. Fifth
FIG. 6 and FIG. 6 are diagrams showing a conventional EPROM manufacturing method. In the figure, 1 is a ceramic base, 4 is a chip, 5 is a gold wire, 6 is a lead frame, 8 is a window glass for ultraviolet transmission, 10 is a nickel foil, 11 is a prepreg [1, 1
5 is a cavity, 17 is plastic, and 19 is a metal ring. Agent Masu Oiwa Yumei 1
Figure 2 Figure 3 Figure 6 Figure 6 Procedural amendment (voluntary) 868160 1. 47th Day 1, Incident Display Patent Application No. 59-205005 2,
Title of the invention: Plastic mode deaf semiconductor device 3, Person making the amendment 5, Detailed description of the invention in the specification subject to amendment 6, Contents of the amendment (1) Page 5, line 10, 7 of the specification Correct "sum" in line 20 of the page to "relaxation". (2) "Figure 5" on page 6, line 13 of the specification is corrected to "Figure 3."that's all

Claims (2)

【特許請求の範囲】[Claims] (1)プラスチックパッケージに紫外線透過ガラスを嵌
め込んだプラスチックモールド型半導体装置において、 トランスファ成型により半導体素子をプラスチックモー
ルドする際に、前記紫外線透過ガラスの周囲に粗面化し
た金属リングを固着したことを特徴とする、プラスチッ
クモールド型半導体装置。
(1) In a plastic molded semiconductor device in which an ultraviolet transmitting glass is fitted into a plastic package, a roughened metal ring is fixed around the ultraviolet transmitting glass when the semiconductor element is molded in plastic by transfer molding. Characteristics of plastic molded semiconductor devices.
(2)前記金属リングはアルミニウムである、特許請求
の範囲第1項記載のプラスチックモールド型半導体装置
(2) The plastic molded semiconductor device according to claim 1, wherein the metal ring is made of aluminum.
JP59205005A 1984-09-28 1984-09-28 Plastic molded semiconductor device Pending JPS6182449A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59205005A JPS6182449A (en) 1984-09-28 1984-09-28 Plastic molded semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59205005A JPS6182449A (en) 1984-09-28 1984-09-28 Plastic molded semiconductor device

Publications (1)

Publication Number Publication Date
JPS6182449A true JPS6182449A (en) 1986-04-26

Family

ID=16499872

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59205005A Pending JPS6182449A (en) 1984-09-28 1984-09-28 Plastic molded semiconductor device

Country Status (1)

Country Link
JP (1) JPS6182449A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150127046A (en) * 2013-01-18 2015-11-16 예일 유니버시티 Methods for making a superconducting device with at least one enclosure
KR20150127045A (en) * 2013-01-18 2015-11-16 예일 유니버시티 Superconducting device with at least one enclosure
US10468740B2 (en) 2015-02-27 2019-11-05 Yale University Techniques for coupling planar qubits to non-planar resonators and related systems and methods
US11223355B2 (en) 2018-12-12 2022-01-11 Yale University Inductively-shunted transmon qubit for superconducting circuits

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150127046A (en) * 2013-01-18 2015-11-16 예일 유니버시티 Methods for making a superconducting device with at least one enclosure
KR20150127045A (en) * 2013-01-18 2015-11-16 예일 유니버시티 Superconducting device with at least one enclosure
JP2016511534A (en) * 2013-01-18 2016-04-14 イェール ユニバーシティーYale University Method for manufacturing a superconducting device having at least one enclosure
US10424711B2 (en) 2013-01-18 2019-09-24 Yale University Superconducting device with at least one enclosure
US10424712B2 (en) 2013-01-18 2019-09-24 Yale University Methods for making a superconducting device with at least one enclosure
US10468740B2 (en) 2015-02-27 2019-11-05 Yale University Techniques for coupling planar qubits to non-planar resonators and related systems and methods
US11223355B2 (en) 2018-12-12 2022-01-11 Yale University Inductively-shunted transmon qubit for superconducting circuits

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