JPS6181692U - - Google Patents
Info
- Publication number
- JPS6181692U JPS6181692U JP16757284U JP16757284U JPS6181692U JP S6181692 U JPS6181692 U JP S6181692U JP 16757284 U JP16757284 U JP 16757284U JP 16757284 U JP16757284 U JP 16757284U JP S6181692 U JPS6181692 U JP S6181692U
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- circuit
- outputs
- same level
- drive circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004973 liquid crystal related substance Substances 0.000 claims description 17
- 238000010586 diagram Methods 0.000 description 1
Description
第１図は本考案の一実施例のブロツク図である
。
１……制御部、２……液晶駆動用クロツク選択
信号、３……クロツク選択回路、４……クロツク
発生回路、５……クロツク発生回路、６……液晶
駆動用クロツク信号、７……スタンバイ信号、８
……フリツプフロツプ、９……フリツプフロツプ
出力信号、１０……同一レベル出力可能な液晶駆
動回路、１１……液晶駆動用電圧入力、１２……
液晶駆動用電圧入力、１３……液晶駆動用電圧入
力、１４……液晶駆動用電圧入力、１５……液晶
駆動用出力端子。
FIG. 1 is a block diagram of one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Control unit, 2... Clock selection signal for driving liquid crystal, 3... Clock selection circuit, 4... Clock generation circuit, 5... Clock generation circuit, 6... Clock signal for driving liquid crystal, 7... Standby signal, 8
...Flip-flop, 9...Flip-flop output signal, 10...Liquid crystal drive circuit capable of outputting the same level, 11...Voltage input for driving liquid crystal, 12...
Voltage input for driving liquid crystal, 13... Voltage input for driving liquid crystal, 14... Voltage input for driving liquid crystal, 15... Output terminal for driving liquid crystal.
Claims (1)
記液晶駆動回路の出力を強制的に同一レベルにす
る制御部とクロツク発生回路とを有する液晶駆動
回路内蔵集積回路において、クロツク信号と前記
液晶駆動回路の出力を強制的に同一レベルにする
信号の両方を前記液晶駆動回路に供給できるよう
に前記液晶駆動回路と前記制御部との間に接続さ
れ、かつ前記クロツク信号が供給されているとき
は前記液晶駆動回路の出力を強制的には同一レベ
ルにせず前記クロツク信号が供給されていないと
きは前記液晶駆動回路の出力を強制的に同一レベ
ルにするラツチ回路を設けたことを特徴とする液
晶駆動回路内蔵集積回路。 In an integrated circuit with a built-in liquid crystal driving circuit, the integrated circuit has a liquid crystal driving circuit, a control section that outputs a standby signal to force the output of the liquid crystal driving circuit to the same level, and a clock generation circuit. The liquid crystal drive circuit is connected between the liquid crystal drive circuit and the control section so that both signals that force the outputs to the same level can be supplied to the liquid crystal drive circuit, and when the clock signal is supplied, the liquid crystal display A liquid crystal drive circuit characterized in that a latch circuit is provided that does not force the outputs of the drive circuits to be at the same level, but forces the outputs of the liquid crystal drive circuit to be at the same level when the clock signal is not supplied. Built-in integrated circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16757284U JPS6181692U (en) | 1984-11-05 | 1984-11-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16757284U JPS6181692U (en) | 1984-11-05 | 1984-11-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6181692U true JPS6181692U (en) | 1986-05-30 |
Family
ID=30725362
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16757284U Pending JPS6181692U (en) | 1984-11-05 | 1984-11-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6181692U (en) |
-
1984
- 1984-11-05 JP JP16757284U patent/JPS6181692U/ja active Pending
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