JPS6181235A - Car control device - Google Patents

Abstract

PURPOSE:To reduce the memory capacity by arranging a memory device, in which codes representing each program are classified into groups based on the priority in their execution and are stored, enabling each program to be activated in order for the period of every 2<n> times of the activation requirement. CONSTITUTION:This device includes a memory system and a memory device: the memory system 401 divides the specified control program to control various car devices into numbers of programs (hereafter they are called tasks) and stores them, and the memory device 402 stores information related to the activation period and order of each task as a task table. The above-mentioned task table is classified and arranged by the priority in its execution. To allow the task table to be activated at an interval of a constant time, the activation device 403 permits a task which belongs to a task level n of the task table, to be activated every 2<n> times of an activation signal in accordance with the signal from the activation requirement initiation device 404. This signal allows a control output to be initiated by the operation device 405 based on the required task called from the memory system 401.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a vehicle control device, and more specifically:
The present invention relates to a vehicle control device that uses a microcomputer to control various vehicle devices including an internal combustion engine device.

Conventional Technology Microcombinators have been used to control internal combustion engine vehicles for a long time, but the control content has become more and more complex year by year, and has become increasingly expensive. It has become necessary to control the degree of Therefore, as the number of control items executed by the micro combinator increases, the number of input/output items increases, and the burden on the microcomputer tends to increase, creating a demand for faster control. In order to meet these demands, a high-performance microcomputer can be used, but such a microcombinator is expensive and becomes a factor that increases the cost of manufacturing the device.

Therefore, various methods have been proposed to efficiently use inexpensive microcomputers. For example, one of them is to divide a program into small programs called tasks, which are started by a soft timer, and executed as engine control. It has been proposed that a RAM is provided with as many soft timer tables as the number of tasks classified based on their control functions, and tasks are stopped by clearing the contents of the soft timer tables (Japanese Patent Application Laid-Open No. Showa 56-3
(See Publication No. 8541). This method starts each task according to the value of a soft timer provided for each task, and each task has its own priority.
If a request to start a task with a high priority is issued while a task is being executed, the information of the currently executing task is stored in RAM.
Temporarily evacuate inside. After the execution of the task with higher priority is completed, the information stored in the RAM is retrieved and the execution of the suspended task is resumed.

Problems to be Solved by the Invention However, in the above-mentioned method, it is necessary to provide a save area in memory according to the number of priorities of tasks, which requires a large amount of memory, and also because of the number of tasks. When the number of times increases, there is a problem in that the burden on the ice cream and armchair becomes large, such as setting timers and searching for activation requests. Furthermore, since tasks are prioritized and tasks with higher priority are prioritized than interrupts,
Not only is there a lot of wasted time, making it difficult to increase efficiency, but low-priority tasks take a long time to complete, and in some cases, low-priority tasks are often not activated. There is a risk.

The purpose of the present invention is to perform each task according to a predetermined priority order.
To provide a vehicle control device which can be reliably executed at a required startup cycle and can greatly reduce the overhead time of a microcomputer.

Means for Solving the Problems The configuration of the present invention is such that a control program for controlling a vehicle device is divided into a plurality of programs based on its control function, and each program is divided into a plurality of programs based on the control function, and each program is divided into a plurality of programs according to a startup request generated for each nologram. In a vehicle control device configured to control a vehicle by being selectively executed, a memory in which codes indicating each program are stored and classified into groups based on the execution priority of each program. means for issuing a program startup request at predetermined time intervals; startup request generating means for issuing a program startup request at predetermined time intervals; and startup request generating means for issuing a program startup request at predetermined time intervals; It is characterized in that it is equipped with a means for performing the same.

Operation According to the above configuration, each program grouped in terms of startup priority is 2" (n=1°2,...
・) Since each program is started sequentially in response to each start request, each program is executed in a predetermined order according to the contents stored in the memory means.
It is reliably executed at a predetermined activation cycle. Therefore, since the next program is started after the execution of one program is finished, there is less wasted time in calculations, and the memory capacity is also smaller than before, which is economical.

Embodiment FIG. 1 shows a schematic configuration diagram showing the basic concept of the present invention. The vehicle control device 400 is a device for controlling required vehicle devices according to a predetermined control program. A predetermined control program is divided in advance into a plurality of nologograms (hereinafter referred to as tasks) and stored in an appropriate storage device 401. - Information regarding the power, activation period and activation order of each task is stored in the memory means 402 as a task table. As shown in FIG. 1, the task table stored in the memory means 402 is a table that is classified into task levels 1 to n based on their execution priority, and generally belongs to task level k. Tasks T , T ,...
is displayed.

kl k2 The activation means 403 operates in response to the activation signal SS output from the activation request generation means 404 in order to activate the task at a predetermined constant time interval, and activates the task belonging to the task level n of the task table using the activation signal SS. Activation control is performed to activate the device every 2n times. The activation information obtained by this activation control operation is input to the calculation means 405, and a required task is called from the storage device 401 according to the activation information. In the calculation means 405, the data input to the calculation means 405 is used if necessary, the task is executed, and the required control output is sent to the calculation means 405.
obtained from.

In this manner, each task is sequentially executed in a desired activation cycle and activation order, thereby appropriately and efficiently controlling the vehicle.

The above-mentioned control device can be realized using a microcomputer which is a stored program type digital computer, and the present invention will be described in detail below with reference to specific embodiments.

FIG. 2 shows an overall configuration diagram of a control system of an embodiment of a vehicle control device in which the present invention is applied to a control device for a diesel locomotive with an auto-cruise function. The vehicle control device 1 is a device for controlling a vehicle (not verbally transmitted) driven by a diesel engine 3 supplied with fuel from a fuel injection pump 2, and includes first and second microcontrollers 4. , 5.

The first microconbeater 4 mainly performs control calculations for controlling the injection amount of the fuel injection pump 2, controlling the injection timing of the fuel injection pump 2, and controlling the vehicle speed.
The microconbeater 5 is the first microconbeater 4
The configuration is such that it mainly performs various arithmetic processing necessary for the control calculations executed in the . The first and second micro converters 4 and 5 each have a built-in ROM, and
External random access memory (RAM)
) 6, the RAM 6 is connected to the RAM 6 via a pass line 22 that can selectively connect the RAM 6 to either one of the first and second microcomputers 4.5 as will be described later. It is configured so that it can be accessed by the first or second microcomputer 4.5, respectively.

An analog/digital converter (A/T) is connected to the first micro converter 4 via a pass line 7.
is connected. A/1) 8 has diesel engine 3
A water temperature sensor 9 for outputting a water temperature signal TW indicating the cooling water temperature, an intake temperature sensor 10 for outputting an intake temperature signal TA indicating the intake air temperature, and a fuel temperature signal TF indicating the fuel temperature.
A fuel temperature sensor 11 for outputting the intake pressure and an intake pressure sensor 12 for outputting the intake pressure signal PI indicating the intake pressure are connected, and the above-mentioned signals from these sensors are converted into digital The signal is converted into a signal and input to the first microcomputer 4 via the path line 7.

The angle sensor 13 attached to the output shaft of the diesel engine 3 sends an AC signal A having timing information when each cylinder binuton in the diesel engine 3 reaches top dead center.
C is output, and this alternating current signal AC is sent to the waveform processing circuit 14.
, it is converted into a top dead center/main pulse signal TN consisting of a timing pulse indicating the top dead center timing of the diesel engine 3, and is input to the first microcombeater 4. Further, in order to detect the timing of fuel injection into the diesel engine 3, a needle valve lift sensor 1 is attached to the fuel injection valve 15.
The lift signal LS from 6 is waveform-shaped in a waveform shaping circuit 17 and inputted to the first microconbeater 4 as an injection timing pulse TNL indicating the actual fuel injection timing in a predetermined reference cylinder.

The accelerator sensor 18 outputs an access signal APP according to the amount of operation of the accelerator pedal 19, and the access signal APP is inputted to the first microcomputer 4.

On the other hand, the second microcomputer 5 receives vehicle speed data TUSP output from the vehicle speed sensor 23 for detecting the vehicle speed and indicates the vehicle speed at the time, and also inputs the cruise switch 20 for auto cruise control. It is connected to the input port of the microcomputer 5, and is configured to perform constant speed driving control in accordance with the operation of the cruise switch 20.

Note that the nutart switch 21 supplies a starting signal ST to the first microcombeater 4 when the diesel engine 3 is started.

The information stored in the first microcomputer 4 is once transferred to the RAM 6 via the pass line 22, and then
The contents of the data transferred to M'6 are the same as those of the pass line 22.
can be further transferred into the second microconbeater 5 via. Note that switching of the connection of the pass line 22 for data transfer is performed within each microcomputer 4.5.

The injection amount control calculation result in the first microconbeater 4 is transferred to the digital/analog converter (I/A) 26
A signal for controlling the position of the control rack 27 of the fuel injection pump 2 is input to the circuit 28 via the circuit 28, so that the optimum injection amount is supplied to the diesel engine 3 according to the engine operating conditions at the time. control rack 2
7 position is controlled. Reference numeral 29 indicates an alarm lamp that lights up when an abnormality occurs in the control or the like.

The second microconbeater 5 is given the calculation result for the injection timing control of the fuel injection pump 2 executed in the first microconbeater 4, and according to this calculation result, the timing control signal TC8 is sent to the second microconbeater 5. The signal is output from the computer 5 and supplied to the timer 31 via the amplifier 30, thereby performing optimal timing control.

FIG. 3 shows a program configuration diagram of the first microcomputer 4 shown in FIG.

As already mentioned, the first microcomputer 4 is programmed to mainly execute control calculations for the injection amount and injection timing, and first, the initialization process 41 is performed in response to turning on the power. done, here,
The contents of the RAM 6 and each register are cleared, each input information is read, and if there is no other interrupt processing, background job processing 42 is executed. The pack ground job is executed between tasks and other processes executed by interrupts, which will be described later. In the illustrated embodiment, the calculation of the rotational speed and the driving frequency of the timer 31 are performed. .

When the second microcomputer 5 outputs a path request when accessing the RAM 6, an interrupt NMI is applied, and the pass line 22, which is normally connected to the first microcomputer 4, is freed by the path free processing 43. , RAM by the second microconbeater 5
When the access of 6 is completed, the pass line 22 is connected to the first microcomputer 4 again.

When an interrupt TIM is generated by a signal generated by an external timer, an alarm lamp drive process 44 for driving the alarm lamp 29 0N10FF is executed.

An interrupt MON is generated by a monitor signal that is output when the value of the free running counter reaches a predetermined value.
is multiplied. This monitor signal causes the first interrupt processing 45
is executed, and the free running counter is set so that the monitor signal is output again after a certain period of time Δ. Next, a synchronization process 46 (described later) is executed, and then a monitor process 47 for determining which task is to be executed is executed. Here, the term "task" refers to one independent program that divides the control calculations to be executed in the first microcomputer 4, and each task further includes one or more programs included in the control subroutine program group 48. It consists of multiple control subroutine programs.

The execution time of each task is within the time Δ,
In addition, it is determined with consideration given to minimizing variations as much as possible. Therefore, when the interrupt MON is applied, the processing of each task performed in the task processing 49 is always completed within the given interrupt processing time.

The execution order of the tasks determined in the monitor process 47 is determined in relation to the priority of each task, and tasks with higher priorities are determined to be executed more frequently. The order of execution of the tasks is determined according to the contents of the task table stored in the ROM in the first microcombinator 4. As will be described later, the task table is a table in which codes indicating each task are arranged in a matrix in consideration of the activation cycle and activation order of each task.

In general, the startup cycle and startup order of each task differ depending on the operating state of the engine. Therefore, in this example, as will be described in detail in the section on Three tables are prepared for 1) and high speed rotation (mode 2).

Note that how each task is activated according to these tables will be described later.

When the execution of the task process 49 is completed, the pack ground job process 42 is executed until the next interrupt occurs. When the next monitor signal is output, in monitor processing 47, processing of the next task determined according to the above-mentioned task table is performed in task processing 49.

Injection timing i4 Due to the occurrence of TNL, interrupt NL
is executed, and the third interrupt process 51 is executed.

The third interrupt process 51 activates a soft counter for detecting the injection advance angle based on the generation timing of the injection timing pulse TNL. Then, the interrupt TDC is executed by the generation of the top dead center pulse signal TN, and the counting operation of the soft counter is stopped by the second interrupt processing 50 by the top dead center pulse signal TN corresponding to the injection timing pulse TNL. Then, data tNL related to the injection advance value is calculated from the counting result (see FIGS. 4(a) and (b)). In the second interrupt process 50, data tN related to the time interval between two consecutive pulses of the top dead center pulse signal TN is also calculated (see FIG. 4(a)).

Next, referring to FIG. 5, the second microcomputer 5
The following describes the program structure.

When the power is turned on or when the first microconbeater 4 resets the second microconbeater 5, an initialization process 61 is executed, and a monitor process 62 and a task process 63 are executed. Then, one required calculation task associated with the control calculation of the first microconbeater 4 is executed.

The content of this arithmetic processing will be described in detail later.

When there is an arithmetic request from the first microcomputer 4, an interrupt NMI is generated, and a flag for the arithmetic request is set in flag setting processing 64.

An interrupt TIM is applied in response to an external timer signal, and the fourth
In interrupt processing 65, the period of the driving pulse signal of the timer 31 and its duty ratio data are read from R, AM6, and time data tDTY related to the duty ratio is created. Then, a switch process 66 is executed to read the state of the cruise switch 20 and store it in the RAM 6.

In response to the vehicle speed data TUSP being output from the vehicle speed sensor 23 in relation to the vehicle speed, an interrupt vsp is applied and the generation cycle of the signal TUSP is detected (period reading process 67).

When the value of the free running counter reaches a predetermined value, an interrupt TCV is applied, and the drive signal of the timer 31 is inverted, and at the same time, the required time until the next timing at which the drive signal should be inverted is set. Reversal process 68
is executed. This allows the desired data to be read at the desired period.
A drive signal with a tee ratio will be output.

Below, synchronous processing 46 executed by monitor interrupt
, the monitor process 47, and the task process 49 will be explained in detail, but before that, the control executed by the first microcomputer 4 will be explained with reference to FIG.

FIG. 6 shows a fuel injection amount control system 70 and an injection timing control system 90 that are executed by the first microconbeater 4. The control system 70 will be explained first.

The control system 70 has six types of injection amount calculation sections indicated by symbols 71 to 76. The accelerator Q calculation section 71 calculates the injection amount according to the operation of the accelerator pedal 19, and outputs the result as data QAPP. Idol Q
The calculation unit 72 calculates the injection amount required during idling operation, and outputs the result as data QIDL. The cruise Q calculating section 73 calculates the injection amount necessary for traveling at a constant speed, and outputs the result as data QCR. Full Qm
The calculation unit 74 calculates data QF indicating a predetermined maximum injection amount characteristic in which the maximum value of the injection amount is determined as a function of engine speed.
Compute and output UL. The smoke Q calculating section 75 calculates and outputs data Q8MK indicating the injection amount according to a predetermined smoke limit, and the start Q calculating section 76 calculates and outputs the injection amount data Q8T indicating the starting boost.

Data QAPP and QIDL are added in an adder 77, and the added output data and data Q. R is input to a maximum value selection unit (MAX) 78, and the larger data is output. The selected data from the data QFtlL I qsMK and the maximum value selection section 78 is the minimum value selection section (MIN).
79, and the data with the smallest value is taken out as target injection amount data. This target injection amount data is applied at times other than when the engine is started, and when the engine is started, the data QaT becomes the target injection amount data. The switch 80 is controlled by the start signal ST output in response to the operation of the start switch 21, and when the start signal ST is output, selects the r-taper Q8T, and otherwise selects the output from the MIN79. Operates to select data.

The data selected by the switch 80 is stored in the fuel temperature correction section 8.
1, the target injection amount data is multiplied by a predetermined correction coefficient according to the fuel temperature at that time, thereby correcting the target injection amount data so that even if the fuel temperature changes, the amount of fuel according to the target injection amount data is obtained. It will be done. The data corrected in the fuel temperature correction section 81 is input to the pump characteristic calculation section 82, and after a pump characteristic calculation process is performed to convert the input injection amount data into position data according to the pump characteristics, the data is output. The final target position amount data P is sent from section 83. ut is output, and this data P. As shown in FIG. 2, ut is input to the circuit 28 via the D/A 26.

The injection timing control system 90 calculates a target injection timing according to the operating state of the engine and calculates data TL indicating the result.
A low P timer characteristic calculation section 91 for outputting D, and a water temperature correction value calculation unit for calculating correction data for correcting the injection timing according to the engine cooling water temperature and outputting data TTV indicating the result. part 92, and data TTW that calculates the water temperature correction data at the time of starting and shows the result.
The data TLD has a starting water temperature correction value calculation unit 93 for outputting the data TTw and the data TTw.
ll and is added in an adder 94. That is, the data TTV and TTwB are switched by the switch 9 which is controlled by the start #h signal ST indicating whether or not the engine is in the starting state.
Data T'IW8 is selected and added to data TLD at the time of startup, and data T'IW8 is selected and added to data TLD at the time of startup.
Tw is selected and added to data TLD.

The addition result from the addition unit 94 is input as target injection timing data to an error calculation unit 96 into which a signal indicating the actual injection timing is input, and here the difference between the target value and the actual value of the injection timing (time) is input. The difference is calculated, and the error data TE representing the result is input to the PID calculation section 97, and after data processing necessary for PID control is performed, the data representing the result is sent to the width modulation section ( PWM
)98.

The pulse width modulation unit 98 is supplied with calculation data from a drive frequency calculation unit 99 that calculates the frequency of the pulse signal that drives the timer 31. A drive signal for driving the timer 31 is outputted at a frequency according to the data supplied from the section 99 and whose duty ratio changes according to the output data from the PID calculation section 9. This drive pulse signal is applied as a timing control signal TC8 to a control pulse (not shown) in a timer 31 via an amplifier 30 (see FIG. 2).

Since each calculation for the control shown in Fig. 6 is executed by the micro combinator, the calculations necessary for these controls are as follows.
It is compiled as a control subroutine program,
FIG. 7 shows these control subroutine programs in correspondence with FIG. 6. In FIG. 7, the calculation contents are shown in the upper part of each block, and the name of the control routine is shown in the lower part. These control routine programs are stored in the ROM of the first microcomputer 4 as a series routine group.

Table 1 shows a list of each control subroutine program.

Table 1 The execution times of these control subroutine programs vary, and the frequency of execution required for control purposes also differs. In order to efficiently execute such a subroutine program, multiple tasks consisting of one or more of these control subroutine programs are defined, and a predetermined task is assigned to each task in consideration of the execution priority of the task. The configuration is such that the program launches occur at time intervals.

The task activation time interval is determined based on the task table, but because some tasks may not require activation depending on the operating conditions, it is desirable to change the execution nine turns depending on the engine operating conditions. . For this reason,
As mentioned above, this device divides the operating conditions of the engine into three types: when starting (Mode O), when operating in a low rotation range (Mode 1), and when operating in a high rotation range (Mode 2). A dedicated task table is prepared for each mode.

Task tables for each mode are shown in Tables 2 through 4.

The execution order of the tasks listed in these task tables will be explained using mode 0 as an example.

Each task is divided into task levels 0 to 8 in consideration of the required execution frequency, and each task level is also arranged from the left in descending order of execution priority.

The activation and execution of each task arranged in this way is performed as shown below.

(b) Only one task shall be started for each monitor interrupt that occurs at regular time intervals, and its execution shall be completed by the time the next monitor interrupt occurs. Interrupt processing for this task is not performed.

(b) The order of tasks executed by monitor interrupts is
Each task at task level O is executed every 21 monitor interrupts, and each task at task level 1 is executed every 22 monitor interrupts.
Generally, each task at the task level is performed every 2+1 monitor interrupts.

(c) Tasks within the same task level are activated in order from those arranged on the left every time it is their turn to activate at that task level.

Therefore, the task table indicates the order in which tasks are executed, and which task should be placed where in the task table should be determined appropriately by taking into consideration the execution frequency and execution priority required for that task. can be determined.

FIG. 8 shows a detailed flowchart of a monitor interrupt program executed in the first microcontroller 4 to sequentially execute each task based on the task tables shown in Tables 2 to 4. ing. When execution of a monitor interrupt starts, first, as a process to generate a monitor interrupt at a period of time Δt, the value Y of the free running counter plus Δt is set to X (
Step 110). Since the free running counter is configured to issue a monitor interrupt when the current value Y reaches a predetermined value ,
A monitor interrupt is applied to Δ every time.

Next, in step 111, a check is made to see if the activations of tasks overlap. If they overlap, the task currently being executed continues to be executed. On the other hand, if there is no overlap, the process advances to step 112. It should be noted that the determination as to whether or not there is an overlap 7' is made by a flag 02, which will be described later.

In step 112, an external event has occurred;
It is determined whether or not there is a need for synchronization processing, and if there is a synchronization processing request, the synchronization processing is performed in step 113, and the process proceeds to step 114. If the determination result in step 1120 is NO, step 113 is not executed and step 112 is performed.

Proceed to f114.

In step 114, the flag OL indicating that the task is currently being executed is set to 11'', and the soft counter TCT
Increase the value of R by 1. In subsequent steps, each task is executed in a predetermined order with reference to the task table described above according to the contents of the soft counter TCTR.

The soft counter TCTR has a binary 8-bit output, and has eight outputs from the 2° digit to the 27th digit. Steps 115-0 to 115-7i: This is a step of determining whether the value of each bit of the counter TCTR is "0" or not, and in these steps fl15-0 to fl15-7, each bit is Determination as to whether it is "0" or not is performed sequentially from the lowest digit to the highest digit. The determination result in step 115-0 becomes YES every two monitor interrupts, and generally becomes YES in step 115-n every 2n+1 times. Also, step 1
The determination results from 15-0 to 115-7 are all No, in other words, each bit of the counter TCTR is all set to "1" every 29 times.

In steps 115-0 to 115-7, it is determined which level of the task in each task table should be selected, and as can be seen from the above description, task levels 0, 1, 0, 2, and 1,0.3. ... will be selected in sequence.

In this way, after the task level selection operation is executed, the column of the task table is selected, but before explaining this, the address of the task shown in each task table is stored in the RAM 6 and the microcontroller. How it is stored and managed in the beater's ROM will be explained.

FIG. 9 shows the memory structure in ROM and 1<AM. In the ROM of the first microcombinator, the address of the task shown in the second f, < is stored as data in the address area from address A (100 to A099) as shown in Figure 1.

What is shown in the first row of each +tN in the second column is the number of the task, and in FIG. 9, this number is used to identify the task. The tasks shown in Tables 3 and 4 are similarly stored in address areas A100 to A199 and A200 to A299 in the ROM, respectively.

In order to manage these addresses, variables PTRO to PTR8 are provided in the RAM 6, and any j column in Tables 2 to 4 is managed using these variables.

Furthermore, to manage task table selection, RAM
A variable TBLPTR is provided in 6, and TBL
If PTR is TBLTOP O, select the mode O table shown in Table 2, and if TBLPTR is TBLT
In the case of OP 1, the mode 1 table shown in Table 3 is selected, and when TBLPTR is TBLTOP 2, the mode 2 table shown in Table 4 is selected. Further, in order to manage any one row of each table, a variable TCTR is provided in the RAM 6, and one row is specified according to the value of TCTR.

The explanation will be given by returning to FIG. 8 again. It has already been explained that one row of the task table is sequentially specified in steps 115-0 to 115-7 based on the value of the counter TCTH. Therefore, the selection operation for one column when i=1 is selected will now be explained. Which of the three task tables mentioned above is selected depends on the contents of TBLPTH determined by the mode determination task. Assuming that it is currently operating in mode O, TB
LPTR= TBLTOP O and PTRI= O
Then, the value of A becomes Aolo from m)9 (step 116-1).

The contents of address (An 10+2) are T(')04'l
Since the address is different from 0000H (step 117-1), the operation PTR←+2 is executed (step 118-1). If the content of address A+2 is 00 ('IOH), the process proceeds to step 119-1 and PTR1←0 is set.

Once the contents of address A have been determined in this way, the program moves to the next address in Stella f120 (step 120). Therefore, in the above example, a jump is made to the address of TOOO40, and task T (+0040 is activated and executed (step 121). After that, the flag OL is set to "0" (step 122), and a monitor interrupt is issued. In the above, the case where the amount = 1 has been described, but since the operation is the same in cases where the amount is other than 1, only the reference numerals are given to the other steps, and the explanation is omitted.

In the above-mentioned monitor interrupt operation, Δ is multiplied by time, and each time a required task is activated and executed according to what is defined in the required task table.

As can be seen from the above explanation, if E tasks are placed in a certain task level k, the tasks at this level will be activated every +1·E time to Δt·2, and the task activation period is unique. It will be determined as follows.

For example, in mode O of the embodiment, the injection amount signal output task is T.
Since there are two, OOO20 and TOOO26, the activation cycle of the injection amount signal output is Δt×21×8/2=Δt·8, and is performed every Δt·8. Therefore, the same effect can be obtained as if each task at each task level is individually provided with a soft timer and its activation cycle is managed.

The monitor interrupt program of the first microcomputer 4 has been described above. Next, the activation of tasks in the second microcomputer 5 will be described with reference to FIGS. 10 and 11.

The second microcomputer 5 stores arithmetic subroutine programs, and each of these programs is started and executed by a command from the first microcomputer 5. In the illustrated embodiment, four subroutine programs shown in Table 5 are prepared as calculation subroutine programs, and the calculation processing necessary when the subroutine program controlled by the first microcomputer 4 is executed is prepared. , is executed by the second microconbeater 5.

When a task is being executed in the first microcomputer 4, first, calculation data necessary for executing the task is searched for (step 200). Next, in step f201, it is determined whether the command code buffer in RAM 6 is empty or not. If there are many empty buffers, the counter TCTR is decremented by one.
2), Finish the task. Therefore, the same task is activated again at the next monitor interrupt. In this way, it will wait until the buffer area becomes free.

If the determination result in step 201 is YES, the command code is transferred to the RAM 6, and the start address ETOP of the block where no data is stored is updated (step 2
03). Before the data is transferred in step 203, it is determined in step 204 whether all the buffers are empty (therefore, in the current state, only one buffer stores data). If the determination result is YES, since the second microcomputer 5 is kept in an idle state, a computation start signal is sent to the second microcomputer 5, and an interrupt NMI is applied to the second microcomputer 5 (step 205).

If the determination result in step 204 is No, Stella 7
'Terminate the processing of the task without executing 205. The second micro converter 5 sets the empty flag to 0, which indicates that the buffer is empty, by executing the interrupt
to indicate that there is data in the buffer (step 3
01).

If all buffers are empty, the second microcomputer remains in an idle state, and in response to the empty flag becoming 0 due to an interrupt NMI (step 302),
An interrupt NMI is applied to the first microcomputer 4 to issue a path request, and the common memory RAM 6 is connected to the second microcomputer 5 via the path (step 303). That is, the first microcomputer 4 disconnects the pass line 22 due to the interrupt NMI, and the second microcomputer 5 disconnects the R via the pass line 22.
Connected to AM6. Note that during this time, the first microconbeater 4 is in a waiting state. After that, the address BUF in RAM 6 where the required data is transferred
Data is read from i and BTOP O is updated (step 304). That is, when data of a block of BUFi is read, BTOP←BUF(1+1). However, as can be seen from Fig. 11, four fabric blocks are linked in a ring shape, so i+1
If =4, then BTOP←BUFO.

In this way, as a result of reading the data, it is determined whether or not the buffer is completely empty (step 30).
5) If the determination result is YES, set the empty flag to “1”.
'' (Step 306), the pass line 22 is cut off (Stella f 307).

In this case, the system waits for an interrupt NMI to be issued again. On the other hand, if the determination result in step 305 is NO, Stella f306 is not executed, and the process proceeds to step 307, where only the path line 22 is separated.

Next, in step 7D308, the solution of the arithmetic code read in the buffer is calculated, and according to the result, division processing (step 309) and two-dimensional interpolation processing (step 7'3) are carried out.
10), 3D interpolation processing (Stella f311) or PT
One of the operations in the D process (step 7'312) is executed.

When the required calculation is completed, an interrupt NMI is applied to the first microcombinator 4 again to request a pass (step 313), and the calculation result is stored in the data block BUF 4 in RAM a. 314),
The process returns to step 302 and waits for the first microcomputer 4 to issue an interrupt NMI.

As described above, each task is sequentially activated in a predetermined activation cycle and activation order based on the task table that matches the driving state of the vehicle at that time, and the required control subroutine program that constitutes each task is activated. is executed by the first microcomputer 4, and a subroutine for calculations required at that time is executed by the second microcomputer 5. By sequentially executing each task as described above, desired vehicle control is achieved.

Effects According to the present invention, the activation cycle and activation order of each program (task) are determined according to which task level of the table stored in the memory means it is arranged. Then, task level k (k=1.2...
) tasks are executed every second startup, so by arranging each task at an appropriate task level according to its execution priority, each task will be executed reliably in the predetermined order and startup cycle. be done. In this case, each task at each task level can obtain the same effect as if a soft timer is individually provided and its activation cycle is managed, and the wasted time of calculation time is reduced compared to the conventional method. Since there is no need to make major changes to the monitor program due to an increase or decrease in the number of tasks, an excellent effect is achieved in that extremely efficient control can be easily executed.

[Brief explanation of drawings]

FIG. 1 is a schematic configuration diagram showing the basic concept of the present invention, FIG. 2 is an overall configuration diagram of a control system of an embodiment of a vehicle control device according to the present invention, and FIG. Microcombeater program configuration diagram, Figure 4 (,) and Figure 4
Figure (b) is a waveform diagram of the device shown in Figure 2, Figure 5 is a program configuration diagram of the second microcomputer shown in Figure 2, and Figure 6 is a diagram of the control executed by the first microcomputer. FIG. 7 is a control system diagram to show the contents, and FIG. 8 is an explanatory diagram of the control subroutine program that shows the control subroutine program that performs control calculations for each part of the control system shown in FIG. 6 in comparison with FIG. 6. is a detailed flowchart of the monitor interrupt program shown in FIG. 3, FIG. 9 is a diagram showing the memory structure in each memory of the device shown in FIG. 2, and FIG. 10 is a diagram showing the operation of the second microconbeater. FIG. 11 is a flowchart of the first and @2 microcomputers to explain the operation of the first and second microcomputers. 1.400... Vehicle control device, 4... First microcomputer, 5... Second microcomputer,
6...Random accessor memory (RAM), 4
01...Storage device. 402...Memory means, 403
... Starting means, 404 ... Starting request generating means, 40
5... Calculation means.

Claims (1)

[Claims] 1. A control program for controlling a vehicle device is divided into multiple programs based on its control function, and each program is selectively executed according to a startup request generated for each program, thereby controlling the vehicle. In the vehicle control device configured to execute the program, a memory means stores codes indicating each program classified into groups based on the execution priority of each program;
startup request generation means for issuing a program startup request at predetermined time intervals; and responsive to the output of the startup request, startup of the nth group of programs according to the memory contents of the memory means every 2^n startup requests. 1. A vehicle control device characterized by comprising means for controlling the vehicle.