JPS6181233A - Car control device - Google Patents

Abstract

PURPOSE:To reduce the memory capacity by arranging an activation requirement initiation device which initiates an activation requirement at an interval of the specified time based on a memory device that stores information related to the preset activation period and order in programs, and on the content of the memory. CONSTITUTION:This device includes a memory system and a memory device: the memory system 401 divides the specified control program to control various car devices into numbers of programs (hereafter they are called tasks) and stores them, and the memory device 402 stores information related to an activation period and order of the activation of each task. Activation requirements are initiated by an activation requirement initiation device 403 so that the task which is determined in accordance with the memory in the memory device 402, is initiated at an interval of the specified time. Then, the task required is called from the memory system 401 in accordance with the activation requirement, and is performed by an operation device 404 by use of, if necessary, data stored in the operation device 404.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a vehicle control device, and more specifically, the present invention relates to a vehicle control device.
The present invention relates to a vehicle control device that uses a microcomputer to control various vehicle devices including an internal combustion engine device.

BACKGROUND OF THE INVENTION Microcomputers have traditionally been used to control internal combustion engine vehicles, but the content of the control has become more complex year by year, and more precise control has been required. Therefore, as the number of control items executed by the microcomputer increases, the number of input/output items increases, and the burden on the microcomputer tends to increase, and there is a demand for faster control. In order to meet these demands, a microcomputer with higher performance may be used, but such a microcomputer is expensive and increases the manufacturing cost of the device.

Therefore, various methods have been proposed to efficiently use inexpensive microcomputers. For example, one of them is to divide a program into small programmable programs called tasks, which are started by a soft timer and based on engine control functions. It has been proposed that a soft timer table as many as the number of tasks classified as such is provided in all RAM, and tasks are stopped by clearing the contents of the soft timer table (@Kaisho 56-38541
(see publication). In this method, each task is started according to the value of a soft timer set for each task, and each task has its own priority. When a request to start the ψ task is issued, the information i4 of the task currently being executed is moved to the RAM. After the execution of the higher priority task is completed, the information stored in the RAM is retrieved and the execution of the suspended task is completely resumed.

Problems to be Solved by the Invention However, in the above-mentioned method, it is necessary to create a save area in the memory according to the number of priorities of the tasks. When the number of is large, the timer is set and the timer is activated! gl] Request search, etc.
The problem is that the 9th holder of Dis/Mother Tsucha becomes larger. Furthermore, since tasks are prioritized and tasks with higher priority are prioritized by interrupts, tasks with lower priority may take a longer time to complete, and in some cases , there is a risk that a task with a low priority will not be activated. Another problem is that the number of timers required is equal to the number of tasks, and if the number of tasks is large, the required memory capacity increases significantly.

SUMMARY OF THE INVENTION An object of the present invention is to provide a vehicle control device that requires less memory capacity, significantly improves the usage efficiency of a microcomputer, and improves control performance.

Means for Solving the Problems The present invention has a configuration in which control programs for controlling a vehicle device are classified into counting programs based on their control functions, and the program is divided into counting programs according to a start request generated for each program. In a vehicle control device configured to control a vehicle by selectively executing each program, a memory means storage unit stores information regarding a predetermined activation period and activation order of each zologram. ,
The feature is that it is provided with a startup request generating means that issues a program startup request at regular intervals based on the stored contents of the memory means. According to the above-described configuration, each program is executed sequentially at fixed time intervals, and the activation cycle and activation order of the executed programs follow the contents of the memo IJ of the memory means. Therefore, there is no need to provide a soft timer to determine the startup interval for each program, and one program is not interrupted by another program during execution, so each program can This is reliably executed at a predetermined period. In addition, since each program is not interrupted during execution, there is no need to save intermediate results of calculations in RAM, resulting in wasted calculation time and the amount of ψ memory that must be reserved to save calculation results. The control program is executed with high efficiency.

Embodiment FIG. 1 shows a schematic configuration diagram showing the basic concept of the present invention. The vehicle control device 400 is a device that controls required vehicle devices according to a predetermined control program. A predetermined control program is divided in advance into a plurality of programs (hereinafter referred to as tasks) and stored in an appropriate storage device 401. On the other hand, information regarding the activation cycle and activation order of each task is stored in the memory means 402. The activation request generation means 403 is a means for generating activation requests for starting tasks at predetermined fixed time intervals, and which task is requested to be activated is determined according to the memory contents in the memory means 402. determined.

The activation request from the activation request generation means 403 is sent to the calculation means 4.
04, and in accordance with the activation request, a required task is called from the storage device 401, and the task is executed in the calculation means 404, if necessary, using the data input to the calculation means 404.

In this way, the vehicle is controlled by sequentially executing each task at constant time intervals according to a predetermined activation cycle and activation order.

The dual control device can be realized using a microcomputer which is a stored program type digital computer, and the present invention will be described in detail below with reference to a specific embodiment.

FIG. 2 shows an overall configuration diagram of a control system of an embodiment of a vehicle control device in which the present invention is applied to a control device for a diesel locomotive with an auto-cruise function. The vehicle control device 1 is a device for controlling a vehicle (not shown) that is driven by a diesel engine 3 that receives fuel from a fuel injection pump 2 and a fuel injection pump 1.
and second microcomputers 4 and 5.

The first microcomputer 4 mainly performs control calculations for controlling the injection amount of the fuel injection pump 2, controlling the injection timing of the fuel injection pump 2, and controlling the vehicle speed.
The microcomputer 5 is the first microcomputer 4
The configuration is such that it mainly performs various arithmetic processing necessary for the control calculations executed in the . The first and second microcomputers have 4 and 5 pcs, each with built-in ROM,
External random access memory (RAM)
) 6, and the RAM 6 is connected to the RAM 6 via a pass line 22 that can selectively connect the RAM 6 to one of the first and second microcomputers 4 and 5, as will be described later. , the first or second microcomputers 4 and 5, respectively.

An analog/digital converter (input/D) 8 is connected to the first microcomputer 4 via a pass line 7 . A water temperature sensor 9. for outputting a water temperature signal TW indicating the cooling water temperature of the diesel engine 3 is connected to the input/DB. An intake air temperature sensor 10 for outputting an intake air temperature signal TA indicating the intake air temperature. A fuel temperature sensor 11 for outputting a fuel temperature signal TF indicating fuel temperature, an intake pressure signal PI'1r indicating intake pressure, and an intake pressure sensor 12 for outputting are connected, and the above-mentioned information from each of these sensors is connected. signal A/D
8, the signal is converted into a digital signal and input to the first microcomputer 4 via a path line 7.

The angle sensor 13 attached to the output shaft of the diesel engine 3 sends an AC signal A having timing information when each cylinder piston in the diesel engine 3 reaches the top dead center.
C is output, and this alternating current signal AC is sent to the waveform processing circuit 14.
The signal is converted into a top dead center/earth signal TN consisting of a timing signal indicating the top dead center timing of the diesel engine 3, and is input to the first microcomputer 4. Furthermore, in order to detect the fuel injection timing to the diesel engine 3, the lift signal LS of the needle valve lift sensor 16 attached to the fuel injection valve 15 is waveform-shaped in a waveform shaping circuit 17, and the waveform of the lift signal LS of the needle valve lift sensor 16 attached to the fuel injection valve 15 is waveform-shaped to match the actual The injection timing signal TNL is inputted to the first microcomputer 4 as an injection timing signal TNL indicating the fuel injection timing.

The accelerator sensor 18 outputs an accelerator signal APP according to the operation amount of the dial 19 to the accelerator 1 to 1, and an accelerator signal A
PP is input to the first microcomputer 4.

On the other hand, the second microcomputer 5 receives vehicle speed data TUSP outputted from a vehicle speed sensor 23 for detecting the vehicle speed and indicating the vehicle speed at the time, and also inputs the cruise switch 20 for auto cruise control. It is connected to the second microcomputer 50 input port,
The configuration is such that constant speed driving control can be performed in accordance with the operation of the cruise switch 20.

Note that the start switch 21 supplies a starting signal ST to the first microcomputer 4 when starting the diesel engine 3 ◎ Information taken into the first microcomputer 4 is transferred to the RAM 6 via the pass line 22 . Once transferred to RA
The contents of the data transferred to M6 can also be further transferred into the second microcomputer 5 via the pass line 22. Note that path line 2 for this data transfer
The switching of the two connections is performed within each microcomputer 4.5.

The injection book allocation calculation result in the first microcomputer 4 is input to the circuit 28 for controlling the position of the control rack 270 of the fuel injection pump 2 via the digital/analog converter (D/A) 26'. , the control rack 27 is designed to supply the diesel engine 3 with the optimum injection amount that matches the engine operating conditions at the time.
The position of is controlled. Reference numeral 29 indicates an alarm lamp that lights up when an abnormality occurs in the control or the like.

The second microcomputer 5 is given the calculation result for the injection timing control of the fuel injection cylinder f2 executed in the first microcomputer 4, and according to this calculation result, the timing control signal TC8 is output from the second microcomputer 5. is supplied to the timer 31 via the amplifier 30, thereby performing optimal timing control.

FIG. 3 shows a program configuration diagram of the first microcomputer 4 shown in FIG.

As already mentioned, the first microcomputer 4 is programmed to mainly execute control calculations for the injection amount and injection timing, and first, the initialization process 41 is performed in response to turning on the power. done, here,
The contents of the RAM 6 and each register are cleared, each input information is read, and if there is no other interrupt processing, background job processing 42 is executed. The pack ground job is executed between processes such as tasks executed by interrupts, which will be described later, and in the illustrated embodiment, calculations of the rotational speed and the driving frequency of the timer 31 are performed.

When the second microcomputer 5 accesses the RAM 6k, an interrupt NMI is generated when the second microcomputer 5 accesses the RAM 6k, and an interrupt NMI is applied. becomes free, and the RA by the second microcomputer 5
When the access of M6 is completed, the pass line 22 is connected to the first microcomputer 4 again.

When an interrupt TIM is generated by a signal generated from an external timer, this causes an alarm ramp of 0N10FF of ``29''.
An alarm lamp drive process 44 for driving is executed.

An interrupt MON is generated by a monitor signal that is output when the value of the free running counter reaches a predetermined value.
is multiplied. This monitor signal causes the first interrupt processing 45
is executed, and the free running counter is set so that the monitor signal is output again after a certain period of time Δ. Next, a synchronization process 46 (described later) is executed, and after that, a monitor process 47 for determining which task is to be executed is executed. Here, the task is the first
Each task is an independent program divided into control operations to be executed in the microcomputer 4, and each task is further comprised of one or more control subroutine programs included in the control subroutine program group 48. There is.

The execution time of each task is within the time Δ,
In addition, it is determined with consideration given to minimizing variations as much as possible. Therefore, when the interrupt MON is applied, the processing of each task performed in the task processing 49 is always completed within the given interrupt processing time.

The execution order of the tasks determined in the monitor process 47 is determined in relation to the priority of each task, and tasks with higher priorities are determined to be executed more frequently. The order of execution of tasks is determined according to the contents of a task table stored in the ROM within the first microcomputer 4. As will be described later, the task table is a table in which codes indicating each task are arranged in a matrix in consideration of the activation cycle and activation order of each task.

In general, the startup cycle and startup order of each task differ depending on the operating state of the engine. Therefore, in this embodiment, as will be described in detail later, the startup cycle and startup order of each task are set at startup (mode O) and at low speed rotation (mode 1). and three tables for high-speed rotation (mode 2).

Note that the force 1 for starting each task according to these tables will be described later.

When the execution of the task process 49 is completed, the pack ground process 42 is executed until the next interrupt occurs. When the next monitor signal is output, monitor processing 47
In this step, processing of the next task determined according to the above-described task table is performed in task processing 49.

Due to the generation of injection timing pulse TNL, interrupt N L
is executed, and the third interrupt process 51 is executed.

In the third interrupt process 51, a soft counter for detecting the injection advance angle is activated based on the injection timing and the generation timing of the gusset TNL. Then, the interrupt TDC is executed by the generation of the top dead center/zero signal TN, and the second interrupt processing 50 causes the above-mentioned soft counter to be activated by the top dead center/zerus signal TN corresponding to the injection timing/mother pulse TNL. The counting operation is stopped, and data tNL related to the injection advance angle value is calculated from the counting result (see Fig. 4 (&) #
(see (b)). In the second interrupt processing 50, the top dead center
Data tN related to the time interval between two consecutive pulses of the arm pulse signal TN is calculated (see FIG. 4(a)).

Next, referring to FIG. 5, the second microcomputer 5
The following describes the program structure.

When the power is turned on or when the first microcomputer 4 resets the second microcomputer 5, an initialization process 61 is executed, and a monitor process 62 and a task process 63 are executed. Necessary arithmetic processing tasks associated with control arithmetic by the microcomputer 4 are executed.

The content of this arithmetic processing will be described in detail later.

When there is an arithmetic request from the first microcomputer 4, the interrupt NMI is cleared by 1, and the flag set processing 64
A computation request flag is set in .

The interrupt TIM is triggered in response to the external timer signal, and in the fourth interrupt processing 65, the period of the drive pulse signal of the timer 31, its duty ratio data, all read, and the duty ratio are stored in the RAM 6. The related time data tDTY is created. And the shape of the cruise switch 20 is Bk.
A switch process 66 for storing in the read RAM 6 is executed.

In response to the vehicle speed sensor 237b outputting vehicle speed data TUSP related to the vehicle speed, an interrupt vs.
p is cleared, and the generation cycle of the signal TUSP is detected (cycle reading process 67).

When the value of the free running counter reaches a predetermined value, an interrupt TCV is applied, and the drive signal of the timer 31 is inverted, and at the same time, the required time until the next timing at which the drive signal should be inverted is set. Reversal process 68
is executed. As a result, a drive signal with a desired duty ratio is output at a desired period.

Below, synchronous processing 46 executed by monitor interrupt
．． Each process of the monitor process 47 and the task process 49 will be explained in more detail, but before that, the control executed by the first microcomputer 4 will be explained with reference to the 61st part 1.

FIG. 6 shows a fuel injection amount control system 70 and an injection timing control system 90 that are executed by the first microcomputer 4. First, the fuel injection amount control system 70 will be explained. .

The control system 70 has six types of injection amount calculation sections indicated by symbols 71 to 76. The accelerator Q calculation section 71 calculates the injection amount according to the operation of the accelerator pedal 19, and outputs the result as data QAPP. Idol Q
The calculation unit 72 calculates the injection amount required during idling operation, and outputs the result as data QIDL. The cruise Q calculation unit 73 calculates the injection amount necessary for driving at a constant speed,
The result is output as data QcR. The full Q calculation unit 74 calculates data QFUL indicating a predetermined maximum injection amount characteristic in which the maximum value of the injection amount is determined as a function of engine speed.
'e Calculation output. The smoke Q calculation section 75 calculates and outputs data Q8MK indicating the injection amount according to a predetermined smoke limit, and the start Q calculation section 76Ii, injection amount data Q6T'! indicating the starting increase it! Output f calculation.

Data QAPP and QIDL are modified by a modifying section 77, and the added output data and data QCR are inputted to a maximum value selection section (MAX) 78, and the larger data is output. The selection data from the r-data QFUL e Q process and the maximum value selection section 78 is sent to the minimum value selection section (MIN).
79, and the data with the smallest value is taken out as target injection wisdom data. This target injection amount data is
This is applied to cases other than when starting the engine, and when starting the engine, data Q8T becomes the target injection amount data. The starting signal ST is controlled by the starting signal ST IC output in response to the operation of the start switch 21 of 80 switches.
When Q8T is output, the data Q8T is selected, and in other cases, the 1u data of MIN 79 A- is selected.

The data selected by the switch 80 is stored in the fuel temperature correction section 8.
1, a predetermined correction coefficient is assembled according to the fuel temperature at that time, and thereby the target injection signal data is corrected so that the amount of fuel according to the target injection amount data can be obtained even if the fuel temperature changes. will be carried out. The data corrected in the fuel temperature correction section 81 is input to the Pong characteristic calculation section 82, where Bonn f characteristic calculation processing is performed to convert the input injection amount data into position data according to the pre-temperature characteristics. After that, the final target position data P is output from the output section 83, and this data P. ut is connected to the servo circuit 28 via the D/A 26'e as shown in FIG.
is input.

The injection timing control system 90 calculates a target injection timing according to the operating state of the engine and calculates data TL indicating the result.
A load timer characteristic calculation unit 91 for outputting D and data TTwf for calculating correction data for correcting injection timing according to engine cooling water temperature and showing the result.
: A water temperature correction value calculation unit 92 for output, and data TT that calculates water temperature correction data at the time of startup and displays the results.
It has a starting water temperature correction value calculating section 93 for outputting to the SV8, and the data TLD is r-ta TTW or TT.
ws and is added in the adding section 94. Namely, data.

TTV and TTV8 check whether the engine is in the starting state.
A switch 95 whose switching is controlled by a starting signal ST indicating
The configuration is such that either one of them is supplied to the adder 94 via the .
W is selected and added to data TLD.

The addition result from the addition section 94 is input as target injection timing data to an error calculation section 96 in which a signal indicating the actual injection timing is manually input, and here the difference between the target value and the actual value of the injection timing is calculated. The difference is calculated, and the error data T6 representing the result is input to the PTr calculation unit 97, where data processing necessary for P■D control is performed. Modulation section (PW
M) Enter 98 to become pregnant.

The pulse width modulation unit 98 is supplied with operation data from a drive frequency calculation unit 99 that calculates the entire frequency of the pulse signal that drives the timer 31, and the pulse width modulation unit 98
From , a driving/9 pulse signal for driving the timer 31 whose duty ratio changes according to the output data from the PID calculating section 9 at a frequency according to the data supplied from the driving frequency calculating section 99 is output. be done. This drive/gurune signal is applied to the Ill ff1 l valve (not shown) in the timer 31 via the timing control candy 1 signal TC8 and the amplifier 30 (see FIG. 2).

Since each calculation for control shown in Fig. 6 is executed by a microcomputer, the calculations necessary for these controls are as follows.
It is organized as a control subroutine program,
FIG. 7 shows these control subroutine programs corresponding to FIG. 6. In FIG. 7, the calculation contents are shown in the upper part of each block, and the control subroutine names are shown in the lower part. These control subroutine programs are stored in the ROM of the first microcomputer 4 as a subroutine group.

Table 1 shows a list of each control subroutine program.Table 1 The execution time of these control subroutine programs varies, and the required execution granularity also differs. . In order to efficiently execute such subroutine programs, multiple tasks consisting of one or more of these control subroutine programs are defined, and tasks are executed at predetermined time intervals for each task, taking into consideration the execution priority of the task. The configuration is such that the program is started.

The task start time interval is determined based on the task table, but since some tasks may not need to be started depending on the operating conditions, it is desirable to change the execution/mother turn depending on the engine operating conditions. . For this reason,
As mentioned above, this device divides the operating conditions of the engine into three types: when starting (Mode 0), when operating in a low rotation range (Mode 1), and when operating in a high rotation range (Mode 2). A dedicated task table is prepared for each mode.

Task tables for each mode are shown in Tables 2 through 4.

The execution order of the tasks listed in these task tables will be explained using mode O as an example.

Each task is created by considering the required execution frequency.
At each task level, they are arranged on the left in descending order of execution priority. The activation and execution of each task arranged in this way is performed as shown below.

(b) Only one task shall be started for each monitor interrupt that occurs at regular time intervals, and its execution shall be completed by the time the next monitor interrupt occurs. Interrupt processing for this task is not performed.

(b) The order of tasks executed by a monitor interrupt is that each task at task level O is executed every two monitor interrupts, each task at task level 1 is executed every two monitor interrupts, and Generally, each task at the task level is performed every 2+1 monitor interrupts.

(c) For tasks within the same task level, each time the task level comes to be activated, the tasks arranged on the left are activated primarily.

Therefore, the task table indicates the order in which tasks are executed, and which task should be placed where in the task table should be determined appropriately by considering the execution frequency and execution priority required for that task. I can do it.

FIG. 8 shows a detailed flowchart of a monitor interrupt program executed in the first microcomputer 4 to sequentially execute each task based on the task tables shown in Tables 2 to 4. There is. When execution of the monitor interrupt is started, first, as a process for generating a monitor interrupt at a period of time Δt, the value Y of the free running counter plus Δt is set to X (step 110). The free running counter is configured to issue a monitor interrupt when the current value Y reaches a predetermined value Thereafter, a monitor interrupt will be applied every Δtr\F.

Next, in Stella f111, a check is made to see if the tasks are started in parallel or not, and if they overlap, the task currently being executed continues to be executed. On the other hand, if there is no overlap, the process proceeds to Stella 7°112. Note that whether or not there is an overlap is determined by a flag OL, which will be described later.

In step 112, if an external event has occurred,
It is determined whether or not there is a need for synchronous processing, and if there is a synchronous processing request, synchronous processing is performed in step 113, and the process proceeds to step 114. If the determination result in step 112 is No, the process proceeds to Stella f114 without executing Stella 7'113.

In step 114, the flag OLf indicating that the task is currently being executed is set to "1", and the soft counter TC is set to "1".
Increase the value of TR by 1. In subsequent steps, each task is executed in a predetermined order with reference to the task table described above according to the contents of the soft counter TCTR.

Soft counter TCTRld has a binary 8-bit output, and has eight outputs from 2° digit to 27 digit. Stella f 115-0 to 115-7 are steps for determining whether the value of each bit of the husband counter TCTR is "o", and these steps 115-0
In steps 115-'7 to 115-'7, it is determined whether each bit is rOJ or not in order from the least significant digit to the most significant digit.

The determination result in step 115-0 becomes YES every time the monitor interrupt is performed twice, and generally Stella fl15-
YES tonal every 2n+1 times for n. Mata, all discrimination results from step 115-0 to 115-7 trench are N.
In other words, each bit of the counter TCTR becomes "1" every 29 times.

In the STETSUNO 115-0 to 115-7, it is determined which level of the task should be selected in each task table, and as can be seen from the explanation of -F, task levels 0, 1, 0.2, 0,1.0,3. . . . are selected one after another.

In this way, after the task level selection operation is executed, the columns of the task table are selected, but before explaining this, it is important to note that the address 9 address of the task shown in each task table is stored in RAM 6 and How it is stored and managed in the ROM of the microcomputer will be explained.

FIG. 9 shows the memory structure within the ROM and RAM. In the ROM of the first microcomputer, the addresses of the tasks shown in Table 2 are stored as data in the address area from addresses A000 to A099 as shown in the figure. Shown at the top of each column in Table 2 is the number of the task, and in FIG. 9, this number is used to identify the task. Similarly, for the tasks shown in Tables 3 and 4,
Address area A100 to A1'99 in ROM falls A
200 to A299, respectively.

In order to manage these addresses, variables PTRO to PTR8 are provided in the RAM 6, and any one column in Tables 2 to 4 is managed using these variables.

Furthermore, to manage task table selection, RAM
6 is provided with a variable TBLPTR.
If PTR is TBLTOP O, select the mode O table shown in Table 2, and if TBLPTR is TBI,
If TOP1, the mode 1 table shown in Table 3 is selected, and if TBLPTR is TBLTOP 2, the mode 2 table shown in Table 4 is selected. Further, in order to manage arbitrary i rows of each table, a variable TCTR is provided in the RAM 6, and the i row is specified according to the value of TCTR.

The explanation will be given by returning to FIG. 8 again. Counter TCTR (
7) Based on the value 2, one row of the task table is specified sequentially in steps 115-0 to 115-7. The selection operation will be explained. 3 above
Which of the two task tables is selected depends on the contents of TBLPTR determined by the mode determination task. Assuming that it is currently operating in mode O,
TBLPTR=TBLTOP O and PTR1=
If it is O, the value of A will be Aolo from FIG. 9 (Stella 7'116-1).

The content of the address (AO10+2) is the address of T0041, so it is different from 0000H (step 117).
-1), therefore, the operation PTRI←+2 is executed (Stella 7'1.18-1). If the content of address A+2 is 0000H, the process proceeds to step 7°119-1 and PTRI←0 is set.

Once the contents of address A have been determined in this way, a jump is made to that address (step 120). Therefore, in the above example, a jump is made to the address of TQOO40, and task TOOO40 is activated and executed (step 121). After that, the flag OL is set to "0" (step 122L monitor interrupt ends). In the above, the case where i=1 was explained (although the operation is the same in cases other than i=l). Therefore, only the reference numerals are given to the other steps and the explanation thereof will be omitted.

The monitor interrupt operation described above is calculated by subtracting Δ by 1 per time,
Each time, the required task is activated and executed h1 according to what is determined in the required task table.

The monitor interrupt program of the first microcomputer 4 has been described above. Next, the activation of tasks in the second microcomputer 5 will be described with reference to FIGS. 10 and 11.

The second microcomputer 5 stores calculation subroutine programs, and each of these programs is started and executed by a command from the first microcomputer 5. In the illustrated embodiment, four calculation subroutine programs shown in Table 5 are prepared, and the calculation processing necessary when the control subroutine program is executed by the first microcomputer 4 is carried out by the second microcomputer 4. Executed by beater 5.

When a task is being executed in the first microcomputer 4 of Table 5, first, calculation data necessary for executing the task is searched for (step 200). Next, in step 201, it is determined whether the RAM 60 command code buffer is empty or not. If there is no empty buffer, the counter TCTRe is decremented by one.
02), end the task. Therefore, the same task is activated again at the next monitor interrupt. In this way, it will wait until the buffer area becomes free.

If the determination result in step 201 is YES, the command code i is transferred to RAM 6, and the start address ETopffi of the block where no data is stored is updated (step 203). Whether or not the buffers were all empty before the data transfer in step 203 (therefore,
In the current state, it is determined in step 204 whether or not only one buffer stores data. If the determination result is YES, since the second microcomputer 5 is in an idle state, a computation start signal is sent to the second microcomputer 5, and an interrupt NMI f: is applied to the second microcomputer 5 (step 205).

If the determination result in step 2040 is NO, Stella f
205, the processing of the task is ended without being executed. The second microcomputer 5 sets the empty flag indicating that the buffer is empty by executing the interrupt NMI.
to indicate that there is data in the buffer (step 3
01).

If all the buffers are empty, the second microcomputer remains in an idle state, and in response to the empty flag being set to 0 by the interrupt NMI (Stetsuno 302),
An interrupt NMI i is applied to the first microcomputer 4 to issue a path request, and the common memory RAM 6 is connected to the second microcomputer 5 via the path (step 3o3). That is, the first microcomputer 4 disconnects the pass line 22 due to the interrupt NMI, and thereby the second microcomputer 5 is connected to the RAM 6 via the line 22. Note that during this time, the first microcomputer 4 is in a waiting state. After doing so,
Data is read from address BUFi in RAM 6 to which the required data has been transferred, and BTOP O is updated (Stella 7'304). That is, when reading the data of the block of BUF1, BTOP4-BUF(1
+1). However, as can be seen from FIG. 11, four buffer blocks are linked in a ring shape, so if i+1=4, then BTOP 4-BUFO.

As a result of reading the data in this way, it is difficult to determine whether the buffer is completely empty or not.
305), if the determination result is YES, set the empty flag to "1".Step 306), pass line 22
(step 307). In this case, the system waits for an interrupt NMI to be issued again. On the other hand, if the determination result in step 305 is No, Stella f3
06 is not executed, and the process proceeds to step 307, in which only the path line 22 is separated.

Next, in step 308, the operation code read from buffer address 1 is decoded, and according to the result, division processing (step 309) and two-dimensional complementation processing (step 3) are performed.
10), three-dimensional interpolation processing (step 311) or PID
Any operation in the process (step 312) is performed.

When the required calculation is completed, an interrupt NMI is issued to the first microcomputer 4 again to request a pass (step 313), and the calculation result is stored in the data block BUF 4 in the RAM 6 (Stella 7'314).
, the process returns to step 302 and the first microcomputer 4
It will wait for the interrupt NMI from power 1 to be issued.

As described above, each task is sequentially started based on the task table, the required control subroutine program constituting each task is executed in the first microcomputer 4, and the subroutine for calculations required at that time is executed in the second microcomputer 4.
It will be executed by the microcomputer 5. By sequentially executing each task as described above,
The desired vehicle control will be achieved.

Effects According to the present invention, each program is executed sequentially at regular time intervals, and the activation cycle and activation order of the executed programs follow the memory contents of the memory means. Therefore, each professional? Since there is no need to provide a soft timer to determine the startup interval for the program, and since one program is not interrupted by another program while it is running, each program ultimately It is reliably executed at a predetermined period. In addition, since each program is not interrupted during execution, the intermediate result of the operation 'iR
There is no need to save it in the AM, and the memory capacity that must be reserved to avoid wasting calculation time and saving calculation results41) is greatly reduced, and the control program can be executed with high efficiency. It has excellent effects.

[Brief explanation of drawings]

FIG. 1 is a schematic configuration diagram showing the basic concept of the present invention, FIG. 2 is an overall configuration diagram of a control system of an embodiment of a vehicle control device according to the present invention, and FIG. Microcombeater program configuration diagram, Figure 4 (,) and Figure 4
Figure (b) is a waveform diagram of the device shown in Figure 2, Figure 5 is a program configuration diagram of the second microcomputer shown in Figure 2, and Figure 6 is a diagram of the control executed by the first microcomputer. Fig. 7 is a control system diagram showing the contents, and Fig. 8 is an explanatory diagram of the control subroutine program that shows the control subroutine program that performs control calculations for each part of the control system shown in Fig. 6 in comparison with Fig. 6. The figure is a detailed flowchart of the monitor interrupt program shown in Fig. 3, Fig. 9 is a diagram showing the memory structure in each memory of the device shown in Fig. 4, and Fig. 10 explains the operation of the second microcomputer. FIG. 11 is a diagram showing a memory structure for explaining the operation of the first and second microcomputers. 0 1.400...Vehicle control device; 4... first microcomputer, 5... second microcomputer,
6...Random access memory (RAM),
401...Storage device, 402...Memory means, 40
3... Startup request generation means, 404... Calculation means. Patent applicant: Diesel Kiki Co., Ltd. Agent: Patent attorney: Masatoshi Takano Figure 1

Claims (1)

[Claims] 1. Control programs for controlling vehicle equipment are classified into multiple programs based on their control functions, and each program is selectively executed according to a startup request generated for each program, thereby controlling the vehicle. In a vehicle control device configured to perform control, there is provided a memory means in which information regarding a predetermined starting cycle and starting order of each program is stored, and starting of the program based on the stored contents of the memory means. 1. A vehicle control device comprising: activation request generation means for issuing a request at regular intervals.