JPS6177406A - Automatic level control circuit - Google Patents

Automatic level control circuit

Info

Publication number
JPS6177406A
JPS6177406A JP19903984A JP19903984A JPS6177406A JP S6177406 A JPS6177406 A JP S6177406A JP 19903984 A JP19903984 A JP 19903984A JP 19903984 A JP19903984 A JP 19903984A JP S6177406 A JPS6177406 A JP S6177406A
Authority
JP
Japan
Prior art keywords
circuit
voltage
level
alc
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19903984A
Other languages
Japanese (ja)
Other versions
JPH0326925B2 (en
Inventor
Masanori Fujisawa
雅憲 藤沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP19903984A priority Critical patent/JPS6177406A/en
Publication of JPS6177406A publication Critical patent/JPS6177406A/en
Publication of JPH0326925B2 publication Critical patent/JPH0326925B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G1/00Details of arrangements for controlling amplification
    • H03G1/04Modifications of control circuit to reduce distortion caused by control

Landscapes

  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To prevent deterioration in the distortion factor at power supply reduction by changing an offeset voltage of a level detection circuit of an ALC circuit in response to the decrease in the power supply voltage. CONSTITUTION:An output signal level of a sound recording amplifier 9 is detected by a level detection circuit 17. The offset voltage of the level detection circuit 17 is set by an offset voltage set circuit 20. On the other hand, an operation current supply circuit 34 whose output current is decreased in response to the reduction in the power supply voltage is provided. This output current is fed to the offset voltage set circuit 20. Thus, the offset voltage of the level detection circuit of the ALC circuit, that is, the ALC level is varied in response to the reduction in the power supply voltage. Thus, the deterioration in the distortion factor at the power supply voltage drop is prevented.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は、自動レベル制#(ALC)回路の改良に関す
るもので、特に電源電圧の低下時(減電圧時)における
歪率の悪化を防止し得るALC回路に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field The present invention relates to an improvement in automatic level control (ALC) circuits, and particularly to improvements in the distortion rate when the power supply voltage drops (voltage reduction). This invention relates to an ALC circuit that can be prevented.

(ロ) 従来の技術 特開昭57−44312号公報、特開昭57−1355
11号公報等に見られる如く、テープレコーダの録音回
路圧は、ALC回路が設けられているう前記ALC回路
は、過大入力信号による歪発生を防止する為、磁気ヘッ
ドに印加される被録音信号のレベル、すなわち録音増幅
器の出力信号レベルを一定にするもので、例えば第2図
の如き構成と成されるものである。第2図において、入
力端子(1)に印加される被録音信号は、増幅器(2)
で増幅された後出力端子(31から磁気ヘッド(図示せ
ず)に印加され、磁気テープに録音される。その時、出
力端子(3)に得られる出力信号は、ダイオード(4)
で整流され、コンデンサ(5)で平滑されて前記出力信
号のレベルに対応する直流信号に変換される。そして、
前記直流信号のレベルが所定値に達すると、第1及び第
2トランジスタ(6)及び(7)が導通し、前記増幅器
(2)の入力信号が前記第2トランジスタ(7)のコレ
クタ・エミツタ路により側路される為、出力端子で3)
に得られる出力信号のレベルは、所定値(ALCレベル
)K保たれる。しかして、第2図の場合、ALC動作の
開始レベル■。は、■。:2V、、+V、    ・・
印・・・・・山・・・・・・・・(1)で設定され、■
□=■。中0.6Vとすれば、増幅器(2)の出力電圧
が略1.8VになったときALC動作が開始され、前記
出力底圧は略V。の値に保たれる。その為、過大な入力
信号が入力端子(1)に印加されたとしても、増幅器(
2)から磁気ヘッドに印加される信号は大とならず、歪
の生じない録音を行うことが出来る。
(b) Conventional technology Japanese Patent Application Laid-open No. 57-44312, Japanese Patent Application Laid-open No. 57-1355
As seen in Publication No. 11, etc., the recording circuit pressure of a tape recorder is provided with an ALC circuit. , that is, the output signal level of the recording amplifier, is made constant, and has a configuration as shown in FIG. 2, for example. In Figure 2, the recorded signal applied to the input terminal (1) is connected to the amplifier (2).
After being amplified by the output terminal (31), it is applied to a magnetic head (not shown) and recorded on a magnetic tape.At that time, the output signal obtained at the output terminal (3) is
The signal is rectified by a capacitor (5), smoothed by a capacitor (5), and converted into a DC signal corresponding to the level of the output signal. and,
When the level of the DC signal reaches a predetermined value, the first and second transistors (6) and (7) become conductive, and the input signal of the amplifier (2) is transferred to the collector-emitter path of the second transistor (7). 3) at the output terminal because it is bypassed by
The level of the output signal obtained is maintained at a predetermined value (ALC level) K. Therefore, in the case of FIG. 2, the ALC operation starting level ■. ■. :2V,,+V,...
Mark... Mountain... Set in (1), ■
□=■. If the voltage is 0.6V, the ALC operation is started when the output voltage of the amplifier (2) reaches approximately 1.8V, and the output bottom pressure is approximately V. is kept at the value of Therefore, even if an excessive input signal is applied to the input terminal (1), the amplifier (
The signal applied to the magnetic head from 2) does not become large, allowing recording without distortion.

H発明が解決しようとする問題点 しかしながら、第2図の回路の場合、電源電圧が低下す
ると、それに応じて増幅器(2)の出力電圧が取り得る
最大出力゛電圧が低下し、前記第(1)式で示される開
始レベル■。に達しなくなり、ALC動作が行なわれな
くなる。その為、歪率が大巾に悪化し、適正な録音が出
来な(なるという欠点があった。
Problem to be Solved by the Invention H However, in the case of the circuit shown in FIG. ) The starting level shown by the formula ■. is no longer reached, and ALC operation is no longer performed. As a result, the distortion rate deteriorated significantly, making it impossible to record properly.

に)問題点を解決するための手段 本発明は、上述の点に;@A成されたもので、増幅器の
出力信号レベルを検出するレベル検出手段と、該レベル
検出手段のオフセット電圧を定めるオフセット電圧設定
手段と、該オフセット電圧設定手段に電源電圧に応じた
動作電流を供給する動作電流供給手段と?備える点を特
徴とする。
B) Means for Solving the Problems The present invention has been made to solve the above problems, and includes a level detection means for detecting the output signal level of an amplifier, and an offset for determining an offset voltage of the level detection means. A voltage setting means, and an operating current supply means for supplying an operating current according to the power supply voltage to the offset voltage setting means? It is characterized by the following:

(ホ)作用 本発明に依れば、減電圧時に低下した電源電圧に応じた
電流をオフセット電圧設足手段九供給し、レベル検出手
段のオフセラ)!圧を自動的に変更することが出来るの
で、ALCレベルの自動可変を行うことが出来る。
(E) Function According to the present invention, the offset voltage setting means 9 supplies a current corresponding to the power supply voltage that has dropped during voltage reduction, and the offset voltage setting means 9 supplies the current corresponding to the power supply voltage that has decreased during the voltage reduction. Since the pressure can be changed automatically, the ALC level can be automatically varied.

(へ)実施例 第1図は、本発明の一実施例を示すもので、(8)は被
録音信号を発生する信号源、(辺はペースに該信号源(
8)が接続された入力トランジスタ曲と、一対ノトラン
ジスタ0D及び(12)を含む差動増幅回路りと、プツ
シニブル接続された一対のトランジスタ圓及び(151
を含む5EPP(シングルエンデツド・ジノ/ニブル)
増幅回路響とによって構成される録音増幅器、Oは差動
接続された第1及び第2トランジスタα秒及び■から成
るレベル検出回路、■は第3、第4及び第5トランジス
タ(2fl、(221及び(ハ)と抵抗&41、(25
1及び+2blとダイオード(3)とから成るオフセy
)電圧設定回路、c!ICは前記レベル検出回路(L!
+の出力信号を整流する整流トランジスタ、轡は該整流
トランジスタ困の出力信号を平滑する抵抗C30+及び
コンデンサ3+1から成る平滑回路、c33は該平滑回
路りの出力′電圧に応じて動作する駆動トランジスタ、
(よ臂まン;亥1枢動トランジスタc3zにより駆動さ
れ、前記録汗増幅器(印の入力信号を減衰する酸膜トラ
ンジスタ、及び(沖は第6、第7及び第8トランジスタ
田、L8及びU37)と、抵抗關及び(至)と、ダイオ
ード(・II及び(41)から成り、Mi前記オフセッ
ト成圧設定回路轡の動作電流を供給する動作電流供給回
路である1゜ 次に動作を説明する。電源(+vcc)を投入すると、
動作電流供給回路−の第6トランジスタ(至)のベース
がダイオードF40及び+411と抵抗時とによってバ
イアスされるので、前記第6トランジスタ□□□が導通
し、そのコレクタ電流11が 11=−・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・+2>となる。そして、前記第6ト
ランジスタ(至)のコレクタ電流工、は、第7及び第8
トランジスタ(至)及びC371から成る電流反転回路
で反転され、オフセット電圧設定回路■に動作電流とし
て供給される。
(v) Embodiment FIG. 1 shows an embodiment of the present invention, in which (8) is a signal source that generates a recorded signal;
8) is connected to the input transistor, a differential amplifier circuit including a pair of transistors 0D and (12), and a pair of push-connected transistors 0D and (151).
5EPP (single-ended gino/nibble) including
O is a level detection circuit consisting of differentially connected first and second transistors α seconds and ■, ■ is the third, fourth and fifth transistors (2fl, (221 and (c) and resistance &41, (25
1 and +2bl and a diode (3)
) voltage setting circuit, c! The IC is the level detection circuit (L!
A rectifier transistor that rectifies the output signal of +, C33 is a smoothing circuit consisting of a resistor C30+ and a capacitor 3+1 that smoothes the output signal of the rectifier transistor, and C33 is a drive transistor that operates according to the output voltage of the smoothing circuit.
(Oki is the 6th, 7th and 8th transistor field, L8 and U37 ), a resistor (to), and a diode (II and (41)), and is an operating current supply circuit that supplies the operating current of the offset voltage setting circuit.The operation will be explained next. .When the power (+vcc) is turned on,
Since the base of the sixth transistor (to) of the operating current supply circuit is biased by the diodes F40 and +411 and the resistor, the sixth transistor becomes conductive, and its collector current 11 becomes 11=-...・・・・・・・・・・・・・・・・・・・・・
......+2>. The collector current of the sixth transistor (to) is the seventh and eighth transistor.
It is inverted by a current inverting circuit consisting of a transistor (to) and C371, and is supplied as an operating current to an offset voltage setting circuit (2).

前記第8トランジスタ(3ηに流れる電流は、オフセッ
トを圧設定置路頭の第3トランジスタ(211のエミッ
タから抵抗□□□を介して供給される。その為、前記第
3トランジスタ211のベース電EE V + は、V
、=2V□+R7・I、   ・・・・・・・・・・・
・(3)となる。また、レベル検出回路切り第2トラン
ジスタ■のペース電圧■2は、 V2=V、+It・R1・・・・・・・・・川・・・f
4)となる。ところで、抵抗1241に流れる電流工2
は、〔ただし、R4は抵抗C24)の抵抗値  〕とな
る。その為、第14)式は第5式を用いて、と表わすこ
とが出来る。−万、録音増幅器(9)の一方のトランジ
スタ0υのペース電圧は、入力トランジスタ(10)の
エミッタ電圧(V□)に応じて決まり、他方のトランジ
スタu4のペース電圧も負帰還作用により■、どなる。
The current flowing through the eighth transistor (3η) is supplied from the emitter of the third transistor (211) at the beginning of the offset pressure setting circuit through the resistor □□□.Therefore, the base voltage of the third transistor 211 EE V + is V
,=2V□+R7・I, ・・・・・・・・・・・・
・(3) becomes. In addition, the pace voltage ■2 of the level detection circuit cut-off second transistor ■ is as follows: V2=V, +It・R1...... River...f
4). By the way, the electric current 2 flowing through the resistor 1241
is the resistance value of the resistor C24, where R4 is the resistance value of the resistor C24. Therefore, Equation 14) can be expressed as follows using Equation 5. - The pace voltage of one transistor 0υ of the recording amplifier (9) is determined according to the emitter voltage (V□) of the input transistor (10), and the pace voltage of the other transistor u4 also changes due to the negative feedback effect. .

従って、録音増幅器(9)の出力直流電圧v0は、 ■。=■3..+R5・I、    川・・・・・・・
川・(6)’ K at’L 6エ       」と
なる。いま、オフセット電圧設定回路■の第4及び第5
トランジスタ@及び@の整合をとり、その面積比を1:
1とすれば、前記第5トランジスタ(ハ)に流れる電流
工、は、前記第4トランジスタ@に流れる電流、すなわ
ち抵抗(24に流れる電流I。
Therefore, the output DC voltage v0 of the recording amplifier (9) is: (2). =■3. .. +R5・I, river...
River・(6)'K at'L 6e'. Now, the fourth and fifth offset voltage setting circuits
The transistors @ and @ are matched, and their area ratio is 1:
1, the current flowing through the fifth transistor (c) is the current flowing through the fourth transistor @, that is, the current I flowing through the resistor (24).

と等しくなる。また抵抗(ハ)の値R3と負帰還抵抗(
43の値R,とを等しく設定すれば、第(6)式は、v
、 =v、、 +Rs−j、:V、。
is equal to Also, the value R3 of the resistance (c) and the negative feedback resistance (
43 values R, are set equal, equation (6) becomes v
, =v,, +Rs-j, :V,.

十−且り−(V。。−L)・・・・・・(6)R,+R
10-and-(V..-L)...(6)R, +R
.

と表わすことが出来る。It can be expressed as

ここでレベル検出回路切のオフセット電圧について考え
る。前記オフセy)電圧ΔVは、第(4)式及び第(6
)式から ΔV ” V2   VO” Vlm +N VD  
  ”””(力となる。従って、18号#(81から録
音増幅器(勇に印加され、該録音増幅器(辺で増幅され
て得られる出力信号が前記ΔVを越えると、レベル検出
回路αmの第1トランジスタal1gが導通し、ALC
動作が開始されることになる。
Now consider the offset voltage when the level detection circuit is turned off. The offset y) voltage ΔV is expressed by the equation (4) and the equation (6).
) From the formula, ΔV ” V2 VO” Vlm +N VD
Therefore, when the output signal obtained by being amplified at the recording amplifier (side) exceeds the above ΔV, the output signal is applied from No. 18 # 1 transistor al1g conducts, ALC
The operation will begin.

ところで、電fA電圧がギ分に高い場合、ダイオード+
41及び(4υの順方向電圧は、略一定に保たれる。
By the way, if the electric fA voltage is extremely high, the diode +
The forward voltages of 41 and (4υ) are kept approximately constant.

その為、第(7)式で示されるオフセット電圧、すなわ
ち、ALC動作が開始される録音増幅器(勇の出力電圧
も一定となろうしかしながら、減電圧によりttg圧が
低下すると、それに応じて前記ダイオード(4IJ及び
(41)の順方向電圧も低下し、前記オフセット電圧Δ
■が小になっていく。一般に、ダイオード(4G及び(
41)の順方向電圧VDは、となり、電源電圧の低下に
より前記ダイオード(40及び(4Dに流れる′電流■
。が減少すると、その順方向′幅圧V0 も低下するこ
とが知られている。従って、第(8)式を第(7)式に
代入すれば、となり、オフセット電圧ΔVも小となる。
Therefore, the offset voltage shown by equation (7), that is, the output voltage of the recording amplifier (Yuu) at which ALC operation is started, will also remain constant. However, if the ttg pressure decreases due to voltage reduction, the diode (The forward voltage of 4IJ and (41) also decreases, and the offset voltage Δ
■ becomes smaller. Generally, diodes (4G and (
The forward voltage VD of the diode (41) becomes
. It is known that when the forward width pressure V0 decreases, the forward width pressure V0 also decreases. Therefore, by substituting the equation (8) into the equation (7), the following equation is obtained, and the offset voltage ΔV also becomes small.

それ故、第1図の回路に依れば、減電圧時にレベル検出
回路りのオフセット電圧を小とし、録音増幅器(9)の
出力信号レベルに応じたALCレベルの設定を行い得る
ALC回路を提供出来る。
Therefore, the circuit shown in FIG. 1 provides an ALC circuit that can reduce the offset voltage of the level detection circuit when the voltage is reduced and set the ALC level according to the output signal level of the recording amplifier (9). I can do it.

尚、正常な電源電圧の場合、信号源(8)からの入力信
号は、録音増幅器(少η増幅され、ALC回路により所
定の減衰を受けて、第1の一定レベルの出力信号として
出力端子(43に導出され、減′電圧時には、前記信号
源(8)からの入力信号は、録音増幅器(9)で増幅さ
れ、ALC回路により所定の減衰を受けて、電源電圧に
応じた第2の一定レベルの出力信号として出力端子(4
31に導出されるが、前記録音増幅器(勇による増幅動
作及びALC回路によるALC動作は、従来のものと同
一に付詳細は省略する。
In addition, in the case of a normal power supply voltage, the input signal from the signal source (8) is amplified by a recording amplifier (a small amount), subjected to a predetermined attenuation by an ALC circuit, and output as a first constant level output signal to an output terminal ( 43, and when the voltage is reduced, the input signal from the signal source (8) is amplified by the recording amplifier (9), subjected to a predetermined attenuation by the ALC circuit, and then output to a second constant signal according to the power supply voltage. Output terminal (4) as level output signal
31, the amplification operation by the recording amplifier (Isamu) and the ALC operation by the ALC circuit are the same as those of the conventional one, and the details thereof will be omitted.

(ト)発明の効果 以上述べた如く、本発明に係るALC回路は、電源電圧
の低下に応じてその出力電流値が小となる動作電流供給
回路を備え、前記出力電流をオフセット電圧設定回路に
供給する様にしているので、ALC回路のレベル検出回
路のオフセット電圧、すなわちALCレベルを電源電圧
の低下に応じて可変出来、その結果、録音増幅器の歪率
の悪化を防止出来るという優れた利点を有する。
(G) Effects of the Invention As described above, the ALC circuit according to the present invention includes an operating current supply circuit whose output current value decreases as the power supply voltage decreases, and supplies the output current to the offset voltage setting circuit. As a result, the offset voltage of the level detection circuit of the ALC circuit, that is, the ALC level, can be varied according to the drop in the power supply voltage, and as a result, it has the excellent advantage of preventing deterioration of the distortion factor of the recording amplifier. have

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の一実施例を示す回路図、及び第2図
は従来のALC回路を示す回路図である。 主な図番の説明 (印・・・録音増幅器、 切・・・レベル検出回路、(
少・・・オフセット区圧設定回路、 即)・・・動作電
流供給回路。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional ALC circuit. Explanation of main drawing numbers (marked...recording amplifier, off...level detection circuit, (
Low...Offset section pressure setting circuit, Immediate)...Operating current supply circuit.

Claims (1)

【特許請求の範囲】[Claims] (1)増幅器の出力信号レベルを検出し、前記増幅器の
入力信号の減衰を行つて前記出力信号レベルを一定に保
つ自動レベル制御回路において、前記増幅器の出力信号
レベルを検出するレベル検出手段と、該レベル検出手段
のオフセット電圧を定めるオフセット電圧設定手段と、
該オフセット電圧設定手段に動作電流を供給する動作電
流供給手段とから成り、該動作電流供給手段から電源電
圧に応じた動作電流を前記オフセット電圧設定手段に供
給することにより減電圧時のALCレベルを可変する様
にしたことを特徴とする自動レベル制御回路。
(1) Level detection means for detecting the output signal level of the amplifier in an automatic level control circuit that detects the output signal level of the amplifier and attenuates the input signal of the amplifier to keep the output signal level constant; offset voltage setting means for determining an offset voltage of the level detection means;
an operating current supply means for supplying an operating current to the offset voltage setting means, and the ALC level at the time of voltage reduction is adjusted by supplying an operating current corresponding to the power supply voltage from the operating current supply means to the offset voltage setting means. An automatic level control circuit characterized by being variable.
JP19903984A 1984-09-21 1984-09-21 Automatic level control circuit Granted JPS6177406A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19903984A JPS6177406A (en) 1984-09-21 1984-09-21 Automatic level control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19903984A JPS6177406A (en) 1984-09-21 1984-09-21 Automatic level control circuit

Publications (2)

Publication Number Publication Date
JPS6177406A true JPS6177406A (en) 1986-04-21
JPH0326925B2 JPH0326925B2 (en) 1991-04-12

Family

ID=16401100

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19903984A Granted JPS6177406A (en) 1984-09-21 1984-09-21 Automatic level control circuit

Country Status (1)

Country Link
JP (1) JPS6177406A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0653835A1 (en) * 1993-11-12 1995-05-17 STMicroelectronics S.r.l. Control of distortion in a line-powered amplifier with a rail-to-rail output voltage swing

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5516538A (en) * 1978-07-20 1980-02-05 Nec Corp Automatic level regulator circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5516538A (en) * 1978-07-20 1980-02-05 Nec Corp Automatic level regulator circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0653835A1 (en) * 1993-11-12 1995-05-17 STMicroelectronics S.r.l. Control of distortion in a line-powered amplifier with a rail-to-rail output voltage swing
US5734287A (en) * 1993-11-12 1998-03-31 Sgs-Thomson Microelectronics, S.R.L. Control of distortion in a line-powered amplifier with a rail-to-rail output voltage swing

Also Published As

Publication number Publication date
JPH0326925B2 (en) 1991-04-12

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