JPS6175215A - Position signal generator - Google Patents

Abstract

PURPOSE:To simplify the construction by a method wherein an input and output of a resolver are supplied to a phase discrimination circuit and EX-OR circuit and the phase discrimination circuit ad an AND circuit and a constant current integration circuit is operated by the output of the AND circuit for feeding the output of the EX-OR circuit. CONSTITUTION:A sine-wave-excited voltage inputted into a resolver 1 is converted into a square wave to be inputted into respective first input terminals of a phase discrimination circuit 4 and an exclusive OR circuit (EX-OR)5 and the output of the resolver 1 is converted into a square wave to be inputted into the second input terminal of the circuit 4 and the first input terminal of an AND circuit 6 respectively and the output of the circuit 4 is inputted into the second input terminal of the circuit 5, the output of which is inputted into the second input terminal of the circuit 6. Moreover, a constant current integration circuit 7 is operated on the output of the circuit 6 when the ANd requirement is met and the output of the circuit 7 is inputted into a sample holding circuit 8 to obtain a saw-tooth wave signal G, which is amplified with an amplifier 9.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention relates to a position signal generator using a resolver.Resolvers are robust, have excellent environmental resistance, and are economical, so they are used in rotating machines. It is widely used as a sensor to detect the rotational position of. Further, since the angular velocity can be obtained by differentiating the rotational position signal, the resolver can also be used as a velocity detector.

There are the following two means for obtaining a rotational position signal using the above-mentioned resolver. The first is 90° to the resolver winding.
Excite by applying two-phase sine wave voltages with different phases, multiply the obtained output sine wave by one sine wave of the two-phase sine waves, and pass the obtained multiplied signal through a filter. This is to obtain a sine wave position signal.

Second, a two-phase square wave with 900 different phases is applied to the resolver winding to excite it, the output waveform is also converted to a square wave, and the phase difference between the obtained square wave and the square wave is measured by a digital counter or The position signal is obtained by measuring with an analog timer or the like.

Problems to be Solved by the Invention The above-mentioned first means has the problem that the circuit for generating the sine wave for excitation of the resolver winding is complicated, and since a multiplier and a filter are used, the structure is more complicated. ing.

In addition, the second method has the problem that it is difficult to improve the accuracy of the measurement timer, and the first method. The accuracy of the rotational position signal obtained by the second means also has some problems that are not good due to the above-mentioned reasons.

Means and operation for solving the problems The first invention according to the present invention converts the excitation signal supplied to the resolver into a square wave and connects it to the first input terminal of a phase discrimination circuit consisting of a D-type flip 70 horns and exclusive logic. ) mouth circuit (hereinafter E
The output signal of the resolver is converted into a square wave and is supplied to the second input terminal of the phase discrimination circuit and the first input terminal of the AND circuit. Supply the output signal of the Fix-OR circuit to the second input terminal of the AND circuit, operate the constant current integrator circuit with the output signal when the AND condition of the AND circuit is satisfied, and sample and hold the operation output. It is configured to obtain the following.

The second invention converts the excitation signal supplied to the resolver into a square wave and supplies it to the first input terminal of a phase discrimination circuit composed of a D-type flip-flop and the first input terminal of the first Ex-OH,
Further, the output signal of the resolver is converted into a square wave and supplied to the second input terminal of the phase control circuit and the second input terminal of the second EX-OR, and the second E! The square wave of the excitation signal is supplied to the first input terminal of the x-oR, and the triangular wave equivalent square wave signal obtained at the output of the second Kx-oR and the output signal of the phase discrimination circuit are input to the third input terminal of the x-oR.
KX-OR, the output signal of the third Kx-OR is supplied to the first input terminal of the AND circuit, and the 111ix-
The output signal of the phase discrimination circuit is supplied to the second input terminal of the OR, and the first If! The output signal of x-OR is
The output signal is supplied to the input terminal, and when the AND condition of the AND circuit is satisfied, the constant current integration circuit is operated, and the operation output is sampled and held to obtain a sawtooth wave.

Example The present invention will be described in detail below with reference to the drawings.

FIG. 1 is an explanatory diagram of a circuit configuration showing one embodiment of the present invention.
is a resolver, and sine wave and cosine wave excitation voltages are applied to the stator winding (not shown) of this resolver. The sine wave excitation voltage is input to the first square wave converter, and the first square wave converter is input to the output.
Obtain square wave A. The output signal of the resolver/ is sent to the gX2 square wave converter 3, the input wave converter 3, and the first . The second square wave is D
The signal is supplied to the clock input terminal and data input terminal of a phase discriminator circuit consisting of a type flip 70. The phase discriminator circuit reads data at the rising edge of the clock, and sends a signal Ot--to its output terminal Q, which is at a high level when data is input, and at a low level when no data is input. j is 1lK
In the x-OR, the first square wave of the first square wave converter is supplied to its first input terminal, and the output signal O of the phase discrimination circuit is supplied to its second input terminal. The output signal of E knee 0RJ- is supplied to the input terminal of AND circuit 60g2. The first input terminal of the AND circuit A is connected to the second square wave B of the second million wave converter 3.
is supplied. The AND circuit 6 supplies details of the output signal FXfzc to the constant current integration circuit 7 shown in FIG. 2 when the AND conditions of both input terminals are satisfied. The output signal F of the constant current integration circuit 7 is input to a sample hold circuit ♂, and a sawtooth wave signal G is obtained as an output. 2 is an amplifier that amplifies the sawtooth wave signal G.

The constant current integration circuit 7 is constructed as shown in FIG. In Fig. 2, 7a is a DC power supply, and this power supply 7a is a DC power supply.
The positive side of is grounded, and the negative side is connected to the AND circuit 6.
The signal is supplied to the negative input terminal of an operational amplifier 7d via a switch 7b, which is an electronic switch, controlled by an output signal E, and a resistor 7C. The plus input terminal of the operational amplifier 7d is grounded. 7e is an integrating capacitor, and this capacitor 7e is connected between the negative input terminal and output terminal of the operational amplifier 7d. 7fVi A switch for resetting the integration circuit, this switch 7f is connected in parallel to the integration capacitor 7e, and is controlled as described later.

Next, the operation of the above embodiment will be described based on the waveform diagram of FIG. 1st. The output of the second square wave converter 3 is shown in Figure 3A.
, the first one as shown in B. A second square wave A, B appears.

This first. Second square wave A.

B is phase discriminated by a phase discriminator circuit, for example, 00 to 1800 is rHJ, 180° to 3
A signal C with 60° as "L" is obtained at its output Q (signal shown in FIG. 3C). When the output signal O and the first square wave A are logically determined by the first E knee oR5, this first EX
-OR! The output is the inverted signal of the first square wave A from 00 to 18o0, and the first square wave A from 1800 to 36o0.
is output as is. The waveform at this time is shown in Figure 3. The output signal of the first mx-ORj and the second square wave B are input to the AND circuit 6, and when the resolver is rotating at a constant rotation in the positive direction, K is the output signal of the DAT 7 actor from 0 to 5.
0% (0'-180'), 0-50% (180'-38
0') is obtained at the output of the AND circuit O (the waveform is shown in FIG. 3E).

The output signal E of the AND circuit B is supplied to control the switch 7a of the constant current integration circuit 7, and when the switch 7b is closed, the integration operation is started.

When the integration operation is started, the integral signal F shown in Fig. 3F is sent to the output of the constant current integration circuit 7. )
The switch 7f is closed to clear the integrated voltage. Before clearing, the integral signal F is sampled and held in the sample and hold circuit ♂ using the timing signal shown in FIG. 3H.

The output signal obtained at this time is a sawtooth wave as shown in FIG. 3G, and this sawtooth wave is amplified to become a desired position signal. In addition, in order to hold the sample,
Although some changes appear in the waveform at that timing, there is no problem with the sawtooth wave.

Figure 4 A, B, and C are time charts when the phase discrimination circuit Hiroshi discriminates and outputs the output signal c6.
C corresponds to A, B, and O in FIG. The phase discrimination circuit Hiroshi discriminates and outputs the phase of the second square wave B at the rising edge of the first square wave A as shown in FIGS. 4A and H, and outputs the phase from 00 to 1800 as shown in FIG. 1-aj180'~360°r
Sends out an output signal that becomes LJ. In addition, time TI in the figure is 1/2 of the rotation period of the resolver /, and time T2 is the maximum resolver excitation period, so the period of the resolver excitation frequency is set in advance so that T l >> T2. T2 can be ignored because it is regulated in advance.

Figure 5 A-1 shows the switch 7f and the sample hold circuit r.
6A is the output signal E of the AND circuit B, and FIG. 5B is the integral signal F of the constant current integration circuit 7. Since the output signal E of the AND circuit B changes only from θ to 60, the density factor changes by 50% before the next signal is output.
There is more processing time. Then, switch 7a is turned off (
From the time when the output signal K changes from "HJ" to "L", a counter (not shown) is operated to perform processing. As shown in FIG. 5A, the operating time of the naori counter is approximately 26% of the period of the naori signal. Figure 5C shows the operation output waveform of the above counter.
The AND condition of n-1 is taken and a sample hold signal H (same as FIG. 3 H) shown in Figure 5 is obtained. Further, the signal shown in FIG. 5E from when the counter is turned off until the output signal E is input (becomes rLJ-ff) is the closing signal of the switch 7f (same as the signal shown in FIG. 3).

FIG. 6 is a configuration explanatory diagram showing a second embodiment of the present invention, and the same parts as in FIG. 1 are given the same reference numerals and will be explained. In FIG. 6, the output signal A of the first ten thousand wave converter ko is supplied to the data input terminal of the phase discrimination circuit Hiroshi and the first input terminal of the second E knee OR10, Output signal B
is the clock input terminal of the phase discrimination circuit Hiro and the second KX-OR
io's second input. l/ is the third Kx-O
R, the first input terminal of this third EX-OR// is supplied with the output signal 0 appearing at the output terminal ζ of the phase discrimination circuit Hiroshi, and the second input terminal thereof is supplied with ! The output signal of X 2 Kx-OR10 is supplied. The output signal E of the third E knee OR// is supplied to the first input terminal of the AND circuit B. The second input terminal of the A/D circuit B is connected to the first KX-OR! Output signal 1 of
is supplied.

Note that the first input terminal of the 11th tX-ORj is supplied with the output signal 0 of the output terminal of the phase discrimination circuit Hiroshi. The AND circuit 6 sends out an output signal G when the AND condition is satisfied,
This output signal G is supplied to a constant current integration circuit 7.

Next, the operation of the second embodiment shown in FIG. 6 will be described using the time chart shown in FIG. 1st. Output signals A and B as shown in FIGS. 7A and 7B appear at the output of the second square wave converter 3. These output signals A and B are input to the phase discrimination circuit Hiroshi, but in order to synchronize the phase discrimination signal with the rising edge of the resolver output, the output signal B of the second square wave converter 3 is input to the clock input terminal. 'W' and a one-square-wave square-wave converter power signal A are input to the data input terminal. The output of the phase discriminator circuit DA is used in order to synchronize the sampling timing with the rising edge of the output signal B of the second square wave converter 3 of the resolver. Note that the signal 0 obtained at the output terminal has a waveform as shown in FIG. 7C. Said second
Input terminal of Kx-OR10: (When output signals A and B are supplied, the output signal of the second E knee 0R10 becomes as shown in the seventh figure.The waveform of this seventh figure is equivalent to a triangular wave. It is a square wave, and the output signal of the second KX-OR10 is supplied to the third E-knee OR along with the output signal O.Then, an output signal E having a waveform as shown in FIG. 7E is sent to the output. .E in Figure 7 for the input of AND circuit B.

Since the signal shown in F is supplied, the signal shown in G in FIG. 7 is obtained as an output. This signal is applied to the constant current integration circuit 7, and after being integrated in the same manner as in the previous embodiment, it is sampled and held in the sample and hold circuit r/pull and hold circuit t. The output signal of this sample hold circuit t is a sawtooth wave shown in FIG. 7HK, and this sawtooth wave is used as a position signal. □ Above 1. Of course, the rotational position signal obtained in the second embodiment can be used as a speed detection signal by differentiating it.

Effects of the Invention As described above, according to the present invention, extremely highly accurate signals can be obtained with a relatively simple circuit configuration.

[Brief explanation of the drawing]

The I/C1 diagram is an explanatory diagram of the circuit configuration showing the first embodiment of this invention, FIG. 2 is a specific circuit diagram of a constant current integration circuit, and FIGS. 3A to 3 are for explaining the operation of FIG. Figure 4 A to C are time charts explaining the operation of the phase discrimination circuit, and Figure 5 A is the ninth time chart for obtaining the control signal and sample hold signal of switch 7f of the constant current integration circuit. , FIG. 6 is an explanatory diagram of a circuit configuration showing a second embodiment of the present invention, and FIGS. 7A to 7H are time charts for explaining the operation of the second embodiment. /... Resolver, 3... 11th second square wave converter, q... Phase discrimination circuit, j, 10, //...
...First. 2nd and 3rd exclusive OR circuits, 6...AND circuit, 7...constant current integration circuit, r...sample hold circuit. Fig. 1 4--I stand up position'ulJll solid road 5-1-O#kalankanronkanoh Ω round poem 6---Ding site circulation 7--flpan 1 yellow solid road 8-1- Sanalki - Ludro 2 each Figure 2 77↑

Claims (2)

[Claims] (1) A resolver, a first waveform converter that converts the waveform of the excitation signal supplied to the resolver, a second waveform converter that converts the waveform of the output signal of the resolver, and an output of the second waveform converter. The output signals of the first waveform converter are input separately, and the output signal is a phase discrimination circuit that judges the output phase of both converters and sends it out, and the output signal of this discrimination circuit and the first waveform converter.
an exclusive OR circuit to which the output signal of the waveform converter is input and outputs an output signal indicating a mismatch period between the two output signals; An AND circuit that sends an output when the AND condition of both signals is input, a constant current integration circuit that receives the output signal of this AND circuit and integrates this signal with a constant current, and an output of this integration circuit. A position signal generator equipped with a sample and hold circuit to which a signal is supplied and which obtains a sawtooth wave as an output. (2) a resolver, a first waveform converter that converts the waveform of the excitation signal supplied to the resolver, a second waveform converter that converts the waveform of the output signal of the resolver, and an output of the second waveform converter; The output signal of the first waveform converter is inputted separately, and a phase discrimination circuit is provided which discriminates and sends out the output phase of both converters, and the output signal of this discrimination circuit and the first waveform converter are inputted separately.
A first exclusive OR circuit receives the output signal of the waveform converter and outputs an output signal indicating the mismatch period between the two output signals; a second exclusive OR circuit that sends out an output signal indicative of a mismatch period; and an output signal in which the output signal of the second exclusive OR circuit and the output signal of the phase discrimination circuit are input, and that indicates a mismatch period of both signals. a third exclusive OR circuit that sends out
The output signal of this third exclusive OR circuit and the output signal of the first exclusive OR circuit are input, and an AND circuit that sends out an output when the AND condition of both signals is satisfied; A position signal generator comprising: a constant current integration circuit that receives an output signal and integrates this signal with a constant current; and a sample and hold circuit that is supplied with the output signal of this integration circuit and obtains a sawtooth wave as an output.