JPS6170650A - メモリアクセス制御方式 - Google Patents

メモリアクセス制御方式

Info

Publication number
JPS6170650A
JPS6170650A JP19156584A JP19156584A JPS6170650A JP S6170650 A JPS6170650 A JP S6170650A JP 19156584 A JP19156584 A JP 19156584A JP 19156584 A JP19156584 A JP 19156584A JP S6170650 A JPS6170650 A JP S6170650A
Authority
JP
Japan
Prior art keywords
memory access
bus
memory
access request
buffer device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19156584A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0310976B2 (enrdf_load_stackoverflow
Inventor
Kazuyoshi Taguchi
田口 一良
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP19156584A priority Critical patent/JPS6170650A/ja
Publication of JPS6170650A publication Critical patent/JPS6170650A/ja
Publication of JPH0310976B2 publication Critical patent/JPH0310976B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP19156584A 1984-09-14 1984-09-14 メモリアクセス制御方式 Granted JPS6170650A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19156584A JPS6170650A (ja) 1984-09-14 1984-09-14 メモリアクセス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19156584A JPS6170650A (ja) 1984-09-14 1984-09-14 メモリアクセス制御方式

Publications (2)

Publication Number Publication Date
JPS6170650A true JPS6170650A (ja) 1986-04-11
JPH0310976B2 JPH0310976B2 (enrdf_load_stackoverflow) 1991-02-14

Family

ID=16276782

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19156584A Granted JPS6170650A (ja) 1984-09-14 1984-09-14 メモリアクセス制御方式

Country Status (1)

Country Link
JP (1) JPS6170650A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6859614B1 (en) 1996-06-24 2005-02-22 Samsung Electronics Co., Ltd. Apparatus and method for controlling priority order of access to memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6859614B1 (en) 1996-06-24 2005-02-22 Samsung Electronics Co., Ltd. Apparatus and method for controlling priority order of access to memory

Also Published As

Publication number Publication date
JPH0310976B2 (enrdf_load_stackoverflow) 1991-02-14

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