JPS6169096A - Graphic processor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a graphic processing device that creates graphic data, and particularly to a graphic processing device suitable for monitoring a drawing area in real time.

[Background of the invention]

In a graphic system that displays characters and figures on a screen such as a CRT, a clipping process is performed to cut out and display the figure to be displayed within a screen of a certain size. This means that the underlying graphic information is 2D or 3D.
This is because although the display is arranged in an infinite dimensional space, the capacity of the display memory that stores the actual display screen and its screen information is limited.

Conventionally, as a method for this type of clipping, an algorithm that finds the intersection point with a rectangular area from the coordinate values of the end points of a straight line is well known, for example, "W, M.

Nev+nan and R,F,5proull:
Pr1ciples ofInteractive
Computer Graphics (2nd
ition)”.

McGrav-)fill (1979), p p
, 65-68. There is also a device which realizes this clipping function using a bar dow f' air, as shown in, for example, Japanese Patent Application Laid-Open No. 55-32112.

This conventional ripping method uses CAD (Co
In most cases, graphics terminals for computer aided design are effective for displaying figures by dividing them into straight lines. On the other hand, relatively inexpensive systems such as personal computers cannot incorporate complex hardware, so they do not have processing equipment dedicated to clipping, and endpoints are detected using software, which becomes a bottleneck in improving performance. There is. In this field, clipping is also performed using general-purpose processing equipment, so
Another problem is that the above clipping method is limited to straight lines and cannot be applied to curves such as circles and ellipses.

[Purpose of the invention]

The present invention solves the problems of the prior art described above.

It is an object of the present invention to provide a graphic processing device that can monitor a drawing area at high speed in real time when calculating drawing point coordinates with a simple configuration.

[Summary of the invention]

The present invention provides a graphic processing device that controls the creation and transfer of graphic data onto a display memory that stores graphic data, in addition to means for storing drawing point coordinate values and means for performing update calculations on the coordinate values. hand.

and means for storing predetermined area data related to drawing.

By providing a means to compare and detect whether or not the result is within a predetermined range by comparing the result with predetermined area data during the update calculation of the coordinate values, it is possible to calculate the drawing point coordinate values in real time with a simple configuration. This is a graphics processing device that can monitor the drawing area at high speed.

[Embodiments of the invention]

Hereinafter, preferred embodiments of the present invention will be described based on the drawings, but before that, the matters on which the present invention is based will be described.

The matters forming the basis of the present invention will be explained below.

The present invention is as follows.

First of all, one pixel is (a) expressed with 1 bit, (b) expressed with 2 bits, (c) expressed with 4 bits, (d) expressed with 8 bits, (e) Five types of pixel modes can be selected, such as those expressed in 16 bits (see Fig. 9).

Second, we adopted a 1-pixel address, and this pixel address consists of address information MAD that specifies the display memory address, and 1 pixel address that specifies the position within one word specified by that address. and address information WAD (see FIG. 10).

Thirdly, one word of display data at the display memory address specified by the address information in one pixel address is read from the display memory, and then one word of the display data specified by the one-way address information in the pixel address is read out from the display memory. Only a predetermined bit portion of the image data is rewritten and then written to the corresponding address portion of the display memory again, and multiple bit data for one pixel can be processed simultaneously.

Next, examples of the present invention will be described.

Further, in the following description, the same reference numerals indicate the same objects.

FIG. 3 is a block diagram showing an example of a device to which a graphic processing device according to the present invention is applied.

In FIG. 3, one graphic processing device is composed of an arithmetic device 3o that writes, rewrites and controls display data in one display memory 13, and a control device 2o that controls the arithmetic device 30 in a fixed order. ing. Further, display data read out from the display memory 13 by the graphic processing device 1 is converted into a video signal by the display conversion device 40 and displayed on the display device 5°.

The arithmetic unit 30 sequentially calculates a pixel address consisting of an address of one display memory 13 and information specifying a pixel position in one word of display data in the display memory 13, and displays the information at the calculated pixel address. One word of display data in the display memory 13 is read from the address information in the display memory 13.

For the display data read out in this way, information specifying the multi-f bit position corresponding to the designated pixel position formed by decoding based on the pixel position designation information at the pixel address is used to read out the display data. The drawing logic is calculated only for the bits of a predetermined pixel, and the result of the logical operation is written into the display memory 13 again.

Note that 60 is an external computer, and the graphic processing device operates according to control data from this external computer 60.

FIG. 4 is a block diagram showing an embodiment of a graphic processing apparatus according to the present invention.

In the figure, the control device 2o includes a microprogram memory 100 and a microprogram address register 1.
10, a return address register 120, a microinstruction register 130, a microinstruction decoder 200, a flag register 210, a pattern memory 220,
The instruction control register 230 is configured to include an instruction control register 230.

In addition, the arithmetic device 30 and the arithmetic control device 300 have first-in, first-out (F
FO)) memory 400.

Each component is used in normal digital control and does not require any special explanation. However, according to this embodiment, the arithmetic control device 300 includes a logical address arithmetic unit (A unit) 31o and a physical address arithmetic unit 31o. Department (B unit)
320, and a color data calculation section (C unit) 330.

The A unit 310 mainly calculates where the drawing point is located on the screen according to the drawing algorithm, the B unit 320 calculates the necessary address of the display memory, and the C unit 330 calculates the color data to be written to the display memory. It is calculated.

FIG. 5 shows an example of the configuration of a display device that displays one pixel with 4 bits, and shows a configuration in which display data specified by the graphic processing device of FIG. 4 is displayed on the display device 50. has been done.

In FIG. 5, Do of the display data DT read out from the display memory 13 based on the address AD command from the graphic processing device (FIG. 4).

D4gD1HD12 is supplied to a 4-bit parallel-to-serial converter 410 within display converter 40. This converter 41
Similarly to 8 where the video signal VDO is obtained from 0, D, D, of the display data DT.

D, , Di□ are supplied to a parallel-to-serial converter 420 in the display conversion device 40, and the video signal V is supplied from this converter 420.
D2. of the 0 display data DT from which DI can be obtained. D.
, Dl. , Dl, to a parallel-to-serial converter 430 in the display conversion group W4o, and from this converter 430 the video signal V
D2 is obtained. Also, Da of 1 display data DT
,D,,D,,,D,.

is supplied to a parallel-to-serial converter 440 in the display conversion device 40, and a video signal VD3 is obtained from this converter 440.

The video signals VDO to VD3 are sent to a video interface circuit 450 that constitutes the display conversion device 40, and are subjected to one-color conversion and D
The image is displayed on the display device 50 after undergoing processing such as A conversion.

Next, the specific configuration of each unit of the arithmetic and control device 300 will be explained with reference to FIGS. 6 to 8.

The logical address calculation section 310, which is the A unit 1- in FIG. 6, is as shown in FIG. 4, and includes a FIFO buffer (FBtlF) 3101 and a general-purpose register 53102.

Area management registers 3103 and 3105, area judgment comparator 3104, end point register 3106, end judgment comparator 3107, source latches 3108 and 3109
and Arithmetic theory'RA operation unit (ALU) 3110,
A destination latch (DLA) 3111 and a bus switch 3112.

It includes read buses (UBA, UBB) 3113 and 3114 and a write bus (WBA) 3115.

In FIG. 7, the physical address calculation unit 320, which is the B unit, has a destination latch (DLB) 32.
01 and an arithmetic unit (AU) 3202.

Source latches 3203 and 3204, offset register 3205, screen width register 3206, command register 3207, general purpose register 3208, read bus (UBB) 3209, ? Inclusive bus (WBB)
3210. Note that the general-purpose register 3208 is a current address register (DPH) for pixel unit commands.

DPL) and word unit command address register (RW
PH, RIiPL) and two working registers (T, H.

Furthermore, in FIG. 8, the color data calculation unit 330, which is the C unit, includes a barrel shifter 3301, a color register 3302, a mask register 3303, a color comparator 3304, and a logic Arithmetic unit 3305, write data buffer 3306, pattern RAM buffer 330
7, a pattern counter 3308, a pattern control register 3309, a read data buffer 3310,
Memory address register 3311 and memory output bus 3
312 and a memory input bus 3313. The mask register 3303 is a register (C, MSK)
and a register (GMSK).

The operation of the embodiment configured as described above will be explained.

First, the basic operation of each element will be explained. Control data CDT such as commands and parameters sent from another device such as a central processing unit is written to the memory 400 on the one hand, and directly to the command control register 230 on the other hand.

The register 230 stores various graphic bit modes, and as described later, according to this embodiment, one of five pixel modes can be selected. This selection can be made with the usage data CDT.

The memory 400 is a so-called “First-In, F
irst-Out'' (hereinafter also referred to as FIFO) memory, and the instructions stored in the memory 400 are read by the arithmetic control unit 300 and stored in a register within the arithmetic control device 300. The section CID is transferred to address register 110.

Address register 110 is microprogram memory 1
00 address is managed, and this address is updated in synchronization with the clock. Microprogram memory 10 according to the address output from address register 110.
A microinstruction as shown in FIG. 13 is read from 0. The command read from the memory 100 consists of 48 bits as shown in FIG. 13, and one of control modes #0 to #7 can be selected. The command is then temporarily stored in the register 130, and via the decoder 200 which operates according to the mode selected by the register 230, a predetermined control signal CC8 is generated to #control each part of the arithmetic control device 300. Here, the function of each field of the microinstruction shown in FIG. 13 will be explained.

In FIG. 14, rRUJ is an instruction that specifies a register connected to the UBA bus 3113.

rRVJ is an instruction that specifies a register connected to the VBA bus 3114. rRWJ is an instruction that specifies a register into which data on the WBA bus 3115 is written.

rFtlNcAJ is an instruction that specifies the operation of the arithmetic and logic operator 3110 of the A unit. rsFTJ
is a shifter (SPTA) added to the source latch 3108.
) is an instruction that specifies the shift mode. rADF-,
LJ is an instruction that specifies the lower 4 bits of the next address to be returned to the microprogram address register 110. rAcJ is an instruction that controls the next address of the microinstruction. rADF-HJ is an instruction that specifies the upper six bits of the next address returned to the microprogram address register 110. Furthermore, the upper 6 bits of the address cannot be updated in each of the microinstructions #4 to #7.

rFUNcB J is an instruction that specifies the operation mode of the arithmetic operation unit 3202 of the B unit. rECDJ is an instruction that specifies execution conditions for an operation. rBCDJ is an instruction that specifies branch conditions. r FLAG J is an instruction that specifies reflection of a flag in the flag register 210.

"V" is an instruction specifying whether or not to test whether or not access to the display memory 13 is possible. r FIFOJ is F
This is a command that controls reading and writing to the IFO 400. rL
ITERAL J is an instruction that specifies 8-bit literal data. rLCJ is an instruction that specifies the literal data generation mode.

"FF" is a set of special flip-flops for each part.

This is a command to control reset. "S" is an instruction specifying selection of a code flag. rMCJ is display memory 1
This is an instruction to control the read/write of No. 3. rDRJ is a command that controls scanning of the pattern RAM. rBCJ
is an instruction that controls the input path to the arithmetic operation unit 3202 of the B unit.

r' r RB J is an instruction to select the read/write register of the B unit.

The micro-instructions include the above-mentioned instructions, and the control device 2o controls the arithmetic device 30 using the micro-instructions.

Note that the return address register 120 stores the return address of the subroutine. Flag register 210 stores various condition flags. Pattern memory 220 stores basic patterns used for graphic processing.

Now, the operation of storing image data in memory will be explained, but before that, the bit layout of each data used in this embodiment will be explained.

First, the graphic mode will be explained.

In this embodiment, five different operating modes can be selected according to the designation of the graphic bit mode (GBM) stored in the command control register 230.

FIG. 9 shows the bit configuration of one word of the display memory in each mode.

(a) 1 bit/pixel mode (GBM=“OOO”)
This is a mode used when one pixel is expressed by one bit, such as in a black and white image, and 166 consecutive pixel data are stored in one word of the display memory.

(b) 2-bit/pixel mode (GBM=OO1) This mode expresses one pixel with 2 bits, and can be used for display of up to 4 colors or 4 gradations. therefore,
One word of the display memory 13 can store data of eight consecutive pixels.

(c) 4-bit/pixel mode (GBM=010) In this mode, one pixel is expressed with 4 bits, and data of four consecutive pixels can be stored in one word of data in the display memory.

(d) 8-bit/pixel mode (GBM=011) In this mode, one pixel is expressed with 8 bits, and data for two pixels can be stored in one word of the display memory.

(e) 16-bit/pixel mode (GBM=100) In this mode, one pixel is expressed with 16 bits, and one word in the display memory corresponds to one pixel data.

Next, pixel addresses will be explained.

FIG. 10 explains pixel addresses corresponding to each mode in FIG. 9. The register 3208 of the physical address calculation unit manages a bit address (physical address) BAD, which is a memory address with four lower bits added. The lower 4 bits of information WAD are used to specify the pixel position within one word, and operate according to each bit/pixel mode.

In the figure, the Tj mark II indicates bits unrelated to the operation.

FIG. 11 shows the [4 bit/pixel mode] in section (c) above.
This figure shows the spatial arrangement of the display memory as an example. The memory address is assigned as a linear address as shown in the memory map of Figure (A), and this is displayed as a two-dimensional image as shown in Figure (B). The width of the screen is stored in a screen width register (MW) 3206 in FIG. 7, and this MW indicates how many bits the width of the screen is made up of. Therefore, in the case of 4 bits/pixel mode, MW/4 pixels are displayed in the horizontal direction. Furthermore, since one pixel is displayed using 4 bits, data for one word is displayed as data for four consecutive pixels in the horizontal direction, as shown in FIG. 11(C). The offset generation circuit 2001 in FIG. 7 generates an offset value of 4" and stores it in the offset register. Therefore, the physical address is
It can be seen that in order to move by a pixel amount, it is sufficient to add or subtract an offset value. Furthermore, to move by one pixel in the vertical direction, the value of the register (MW) 3206 may be added or subtracted.

- The example of the bit layout of data used in this embodiment has been explained above.

Next, the operation of storing image data in the display memory 13 using these data will be explained.

Control data CDT such as commands and parameters sent from an external central processing unit are written to the memory 400 on the one hand, and to the command control register 230 on the other hand.

-22, the case where the specified graphic bit mode (GBM) stored in the instruction control register 230 is, for example, 4 bit/1 pixel mode (GBM=OIO) will be explained.

When the graphics bit mode (GBM) is specified as 4 bits/1 pixel in the instruction control register 230,
Thereafter, one word of data in the display memory 13 will be handled as being divided into four bits as shown in FIG.

CDTs such as commands and parameters from an external central processing unit are stored one after another in the memory 400. The data stored in the memory 400 is taken into the FIFO buffer 3101 by the A unit 310. The operation of the A unit 310 will be explained below. The data taken into this FIFO buffer 3101 is exchanged with an internal bus 3113 and stored in each necessary register. This is transmitted from the bus to the logic operator 3110 via the lease latch 3109.
The signal is input to , a predetermined calculation is performed, and the result is temporarily stored in a destination latch (DLA) 3111 . This result is stored in general purpose register 3102. This general-purpose register 3102 stores the current coordinate point in the coordinate space.

The current X-Y coordinates in the general purpose register 3102 are read from one of the read buses 3113.3114, and
It is input to an arithmetic logic unit (ALu) 3110. The result calculated by this calculation unit (AL u) 3110 is sent to the destination latch (DLA) 3111.
, is stored again in general purpose register 3102 via write bus 3115. These series of operations will be executed according to the instructions of the microprogram shown in FIG.

Furthermore, the data on the write bus 3115 is input to the area management registers 3103 and 3105, and the area judgment comparator 3
104 for comparison. The comparator 3104 determines whether the data on the write bus 3115 is between the minimum value of the X-axis and the maximum value of the X-axis, or the minimum value of the Y-axis and the maximum value of the Y-axis. The determination result is sent to the flag register 210.

Further, the data on the write bus 3115 is stored in the end point register 3106, and is passed through the end point register 3106 to the end point register 3106.
07 is input. In the end determination comparator 3107.

This comparison compares the end points of the X-axis and Y-axis stored in this register 3106 in advance with the data on the write bus 3115, and detects whether or not the end points match the above data. The detection result is reflected in the flag register 210.

As described above, comparators 3104 and 3107. Arithmetic unit 3
The results of 110 are collected in flag register 210 and
It is input to the microinstruction decoder 200 and used to change the flow of the microprogram.

The A unit 310 operates as described above and decodes the X-Y coordinate values given by the parameters.

For example, they interpret commands such as drawing a line or writing 9 yen.

Next, the operation of the B unit 320 will be explained.

The data interpreted by A unit 310 is stored in register 320.
8 is input. The data in the register 3208 is sent to the arithmetic unit (
AU) 3202. The result calculated by this calculator 3202 is sent to the destination latch 3201.
temporarily stored in each bus 3113.3114.320.
9 and 3210. Here, bus 3210
The data is written to the register 3208 via the . The register 3208 is composed of two 16-bit words each, and stores a physical address in one word of 32 bits in total. The register 3208 has three types of 32-bit registers and can store three types of data. That is, the register DP of the register 3208 stores the physical address of the actual drawing point corresponding to the current drawing point XY. Therefore, when the xY coordinates of the register 3102 of the A unit 310 move, the physical address of the register DP moves correspondingly.

To change the physical address, just add or subtract a variably settable predetermined value (offset value x value to the point you want to move) to the original physical address in the X-axis direction, and add or subtract a predetermined value in the Y-axis direction. All you have to do is add or subtract f'. That is, based on information specified by the offset generation circuit 2001, a constant for moving the pixel address by one pixel in the horizontal direction is set in the offset register 3205. This constant and data are processed by a calculator 3202.
The physical address after horizontal movement is calculated by calculating. For example, when the 1 pixel mode is "1 bit/pixel mode", the constant should be 1, and if you move 1 pixel, the constant will be 1.
There is only a bit shift. When this is the "4 bit/pixel mode", the constant is 4, and moving one pixel results in a shift of 4 bits.

Further, in order to move vertically by one pixel, the constant set in the one screen width register 3206 is used for calculation, thereby making it possible to move by one pixel.

As described above, the B unit 320 operates to obtain an actual physical address corresponding to the X-Y coordinates determined by the A unit 310.

Next, the operation of the C unit 330 will be explained.

The C unit 330 is connected to the display memory 13 shown in FIG. 11 through an output bus 3312 and an input bus 3313. To the output bus 3312, the C unit 330 first outputs address information AD, and then outputs data DT.

First, address information AD passes through B unit 320,
and is written to the memory address register 3311 via the UBB bus 3209;
1 (MARL) and (MARH).

When the memory address stored in this register 3311 is sent to the display memory 13 via the output bus 3312, the display data DT of one word specified in the memory 13 is sent from the display memory 13 via the input bus 3313. is read out. The read display data DT is stored in the read data buffer 3310.

Here, if the display data DT draws a figure, the arithmetic unit 33
Please enter 05.

Next, microphone information (information specifying which bit of one word is to be masked) from the mask register 3303 is input to the arithmetic unit 3305. In addition, mask information is available from WBB
Registers written directly from bus 3201 (to CMS)
, or from a register (GMSK) that stores data generated by address decoder 2002 within one word.

In addition, one color information is selected in the color register 3302 and given to the calculation @3305. Then, in the arithmetic unit 3305.

A logical operation is performed based on the data DT, mask information, and color information, and the result of the operation is output to the write register 3306. Note that the color information and pattern information are transferred from the pattern RAM 220 to the pattern RAM buffer 330 by being specified by an address signal formed by the pattern counter 3308 and the drawing pattern register 3309.
7 is stored. This is taken into the color register 3300 or directly input to the arithmetic unit 3305.

In this manner, the C unit 330 operates to perform conversion processing on color information.

Next, the drawing calculation method will be explained. Figure 12 shows 4 bits/
This is a diagram schematically showing the flow of drawing calculations for one pixel in pixel mode.

Drawing pattern register 3309 and pattern register 3
The pattern RAM 22 is stored by the address specified in 308.
The data read from 0 is stored in the pattern RAM buffer 33.
07 and selects the color register 3302. In addition, data (C, , C,
, C0, C6) are stored in the read data buffer 3310. Color data and data are each 4-bit color information or gradation information. One bit of pattern information is read from the pattern memory 220, and color register O or color register 1 is selected depending on the data "0" u 1 pp and is supplied to the logical operator 3305. The lower 4 bits of the physical address information stored in the memory address register 3311 are "10 Umbrellas" in the figure, and this information is obtained from the 1 modest address decoder 2002 and sent to the master register 33.
At step 03, mask information GMSK is generated. On the other hand, the upper field of the memory address register 3311 excluding the lower 4 bits is output as a display memory address, and one word of the display memory 13 is read out. In the logical operator 3305, the GMSK p of the mask register 3303 is
,, A logical operation is performed only on the part specified by the 1" bit, and the write data cy is obtained and the write buffer 330
6 is stored. Here, the types of logical operations performed by the arithmetic unit 3305 include replacement with color register values, logical operations (AND, OR, FOR), and conditional drawing (drawing only when the read color satisfies a predetermined condition). be.

When the bit/pixel mode is another mode, similar calculations are performed except that the generated GMSK information is different. Then, the address information AD and the data DT are again sent in this order from the address register 3311 and the register 3306 to the output bus 3312 and written to a predetermined address in the display memory 13.

As described above, according to the present embodiment, data for one pixel can be updated at a time by one read/update/write process, thereby enabling rendering with high processing efficiency. Furthermore, even in cases other than the 16-bit/pixel mode, since the data of a plurality of pixels is packed into a 16-bit length and processed, memory usage efficiency is high.

The data transfer efficiency between other devices and the display memory is also good.Furthermore, in this embodiment, there are five operating modes for different bit lengths per pixel, resulting in a highly versatile configuration.6 Next 1. A method of high-speed drawing area monitoring obtained by the present invention will be explained in detail.

FIG. 1 is based on the configuration shown in FIGS. 4 and 6 to 8, and particularly shows what is related to the monitoring of the drawing area. The same symbols are used for the same items.

In FIG. 1, a microinstruction decoder 200, which generates control signals for each part inside the processing device, is a main part of the present embodiment.
, flag register 210, logical address calculation unit 310.
Physical address calculation unit 320° Color data calculation unit 330
, is shown. The logical address calculation unit 310 has a drawing point coordinate register <cpx, cp that stores the coordinate values of the drawing point.
y) and other temporary storage registers 31
02. Arithmetic and logic unit 3110 that updates drawing point coordinates and performs other operations. Area management registers 3103 and 3105 that store coordinate value information that defines a drawing area. From the arithmetic logic unit 3110 to the destination latch 311
For example, a window which compares and calculates the information outputted onto the write bus (WB A) 3115 via the write bus (WB A) 1 and the contents of the area management registers 3103 and 3105 and outputs whether or not the drawing point coordinate value is within a predetermined drawing area. - Built-in area determination comparator 3104 consisting of a comparator and the like. Further, the flag register 210 includes a temporary storage flag 211 that reflects the comparison judgment result of the area judgment comparator 3104, and a drawing area that detects a drawing area based on the contents of the temporary storage flag 211 and controls various clipping processes, etc. It includes a detection circuit 212 and a detection flag 213 that reflects the detection results of the drawing area detection circuit 212. Here, the drawing area detection circuit 212 performs various detection processes according to the drawing area detection mode stored in the command register 3207, the details of which will be described later. The drawing point coordinates are managed in two registers: CPX, which stores the xM target value of the drawing point in two-dimensional space, and CPY, which stores the Y coordinate value.
The drawing area management registers 3103 and 3105 specify the X coordinate and Y coordinate to define a two-dimensional rectangular area as a predetermined drawing area.
χMIN register that stores each minimum value of coordinates, YMIN
XMA that stores registers and maximum values of X and Y coordinates
It consists of four registers: X register, YM, and AX register. In addition, the temporary memory flag 211 is set to X7 lag (F,
) 2111 and Y7 lug (FY) 2112.

In this embodiment, data is input to the comparator 3104 from the write bus (WBA) 3115, but a configuration in which data is input directly from the drawing point coordinate registers CPX and CPY is also possible. Furthermore, all of the above-mentioned configuration blocks are built into one LSI.

Now, with the above configuration, under the control of the microinstruction decoder 200, the arithmetic and logic unit 3110 uses the general-purpose register 3
X coordinate value or Y stored in cpx, cpy of 102
When an update operation is performed on any of the JI target values, the result of this operation is sent to the destination latch 3111. The data is input via a write bus (WBA) 3115 to an area determination comparator 3104 composed of a window comparator, etc., and a comparison operation is performed with the contents stored in the drawing area management registers 3103 and 3105. The determination result is reflected in the temporary storage flag 211. That is, when the computing unit 3110 performs an update operation on the X coordinate value, the comparator 3104 compares the update operation result with the minimum value XMIN and maximum value XMAX of the X coordinate value selected from the drawing area management registers 3103 and 3105. A comparison operation is performed to determine whether or not the linear expression is satisfied.

XMIN≦X≦XMAX −(1) Also, the result of this comparison is reflected by being placed in the X flag 2111 selected from the temporary storage flags 211.

Furthermore, when the arithmetic unit 3110 performs an update calculation of the Y coordinate value, the comparator 3104 performs a comparison calculation between the update calculation result y and the minimum value YMIN and maximum value YMAX of the Y coordinate value selected from the drawing area management registers 3103 and 3105. A comparison is made to determine whether the following equation is satisfied.

YMIN≦y≦YMAX...(2)
Further, this comparison and determination result is reflected by being placed in the Y flag 2112. Furthermore, the X flag 2111 and the Y flag 21
12 is input to the drawing area detection circuit 212, and based on this content, the detection circuit 212 selects the command register 3.
It sets and resets the detection flag 213 according to the drawing area detection mode stored in the drawing area detection mode 207, reflects the detection result, and controls the color data calculator 330 via the microinstruction decoder 200 to control various clipping processes, etc. will be held. Note that in this embodiment, as described above, the arithmetic unit 311O and the comparator 3104 are switched to time division in one system to update the X and Y coordinate values and perform (
Although the comparison calculations of equations 1) and (2) are performed and shared by both, it may be configured to have two dedicated systems for each. In that case, parallel calculations are possible, and x, Y Coordinate value update calculations and comparison calculations can be made faster.

Next, FIG. 2 is an explanatory diagram summarizing the various drawing area detection modes and their contents shown in FIG. 1 and illustrating them in a table. Second
In the figure, each drawing area detection mode (AREA) is selected and set using 3-bit information stored in the command register 3207, and allows drawing inside and outside each drawing area (defined area), continuation of coordinate calculation, setting of detection flag, etc. It has the functional content (summary).

Further, FIGS. 3 to 9 are explanatory drawings of each drawing area detection mode of FIG. 2. The drawing processing and operations including the first various clipping processes in each drawing area detection mode will be sequentially explained below with reference to FIG. 2 and FIGS. 14 to 20. First, Figures 14(a) and (b) are the first in Figure 2.
Mode AREA = “00o” or 5th (7)-
FIG. 1 is an explanatory diagram of drawing when there is memory space outside the drawing area (defined area) and when there is no memory space, respectively, when AREA=100. Figure 14(a),
In (b), this mode is set to the command register 3207.
If a circle drawing command is issued by selecting and specifying the contents of Area (XMIN, YMI
N.

XMAX, YMAX definition area) is not judged.
If there is also a memory space outside the defined area in FIG. 14(a), drawing is executed continuously inside and outside the defined area (solid line). Furthermore, if there is no memory space outside the defined area in FIG. 14(b), the left and right, top and bottom of the screen will be continuous, and for example, a drawing point with an X coordinate value smaller than XMIN will be continuous on the screen. appears and is drawn to the right of (solid line). To prohibit this phenomenon, set AREA="001" in each of the following modes.

“010”, “011”, etc. are valid.

FIG. 15 shows the second mode AREA="001" in FIG.
This is an explanatory diagram of drawing in the case of ``.In Fig. 15, when this mode is specified and a circle drawing command is issued to draw a circle, when drawing is about to start, the drawing point coordinate value is in the defined area. If it is within the solid line arrow),
As long as the drawing point coordinate value is within the defined area, the drawing command is executed to the end (solid line), but if the drawing point coordinate value goes outside the defined area during mark drawing, the area detection flag 213 is set and the drawing is stopped. The command is terminated and the locus S calculation and drawing are stopped (dashed line). This mode is effective in eliminating wasted calculation time outside the drawing area.6 Especially in the case of wired drawing, once you leave the defined area, you will never enter the area again. By using such a function, where the drawing command only needs to be terminated when the drawing command goes out of the area, clipping processing of line segments can be easily realized using the following procedure.

That is, first, check whether the line segment passes through the defined area, second, if it passes through the defined area, find an arbitrary point on the line segment within the area, and third, check the found point. Mode AREA = “011” from to both end points of the line segment
Issue two straight line drawing commands in mode. In this way, it is easier and more straightforward than traditional end point calculation algorithms! (line segment) clipping can be performed.

FIG. 16 shows the third mode AREA=”010 in FIG.
This is an explanatory diagram of drawing in the case of ``.In Fig. 16, when this mode is specified and a circle drawing command is issued to draw a circle, the drawing point coordinate value is within the defined area at the start of drawing. (solid line arrow), and as long as the coordinate value is within the defined area, drawing is executed (solid line), but if the coordinate value of the mark drawing point goes outside the defined area, the area detection flag 213
Without setting , no drawing is performed (dotted line), only the coordinate calculation is continued, and the drawing point coordinate value falls within the defined area again.
If this occurs, the drawing process is executed again from that point onwards (solid line). In this mode, the area detection flag 213 is not set even when the drawing point coordinate value goes outside the defined area as described above. Further, FIG. 17 is an explanatory diagram of drawing in the case of the fourth mode AREA="011" in FIG. 2. In this mode shown in Fig. 17, as in the case of mode AREA = "010" shown in Fig. 16, drawing is executed only when the drawing point coordinate value is within the defined area, and the area flag 213 is set outside the defined area. When set, only coordinate calculation continues without drawing. That is, this mode differs from the case of FIG. 16 only in that the area detection flag 213 is set (meaning of error detection) when the drawing point coordinate value goes outside the defined area.

FIG. 18 shows the sixth mode AREA="101" in FIG.
This is an explanatory diagram of drawing in the case of ``.In this mode in Fig. 18, drawing is executed when the drawing point coordinate values are outside the defined area at the start of drawing (solid line arrow), and the coordinate values are defined. As long as it is outside the area, the drawing command will be executed to the end (
(solid line), if the coordinate value falls within the defined area during mark drawing, the area detection flag 213 is set, the drawing command is terminated, and coordinate calculation and drawing are stopped. It can be effectively used for the pick function to select a figure pattern. In other words, this can be done by defining a minute area around a specified point on the screen, and detecting a figure by testing whether a certain figure drawn passes through that area6. 7th mode AREA="110" in Figure 2
This is an explanatory diagram of drawing in the case of ``.In this mode in Fig. 19, drawing is executed when the drawing point coordinate values are outside the defined area at the start of drawing (solid line arrow), and the coordinate values are defined. Drawing is executed as long as it is outside the area (solid line), but if the coordinate value of the mark drawing point falls within the defined area, the area detection flag 213 is set.
No drawing is performed without setting (dashed line), and if the coordinate calculation continues and the drawing point coordinate value goes outside the defined area again, the drawing process is executed again from that point on ( Actual m). Also, Fig. 20 shows the eighth mode AR in Fig. 2.
FIG. 6 is a drawing explanatory diagram when EA=“111”.

In the main mode shown in Fig. 20, as in the case shown in Fig. 19,
Drawing is executed only when the drawing point coordinate value is outside the defined area, and within the defined area, the area flag 213 is set and only coordinate calculation is continued without drawing. In other words, in the case of mode AI (EA = "110" in Fig. 19, it does not affect the area detection flag, but in the case of mode AREA = "111" in Fig. 20, it does not affect the area detection flag when the drawing point coordinate value enters the defined area. The only difference is that an area detection flag is set.The modes shown in Figures 19 and 20 are used when a predetermined area on the screen is defined as a drawing prohibited area, for example, if a window is already displayed and the display is destroyed. This can be effectively used when you want to draw in the surrounding area without changing the area.

〔Effect of the invention〕

As described above, according to the graphic processing device of the present invention, the drawing area can be monitored at high speed in real time despite having a simple configuration, so that the processing that was conventionally achieved mainly by software can be reduced and performance can be improved. It can be measured.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing parts closely related to the area management method according to the present invention, FIG. 2 is a summary explanation diagram of the drawing area detection mode of FIG. 1, and FIG. 3 is a diagram showing the graphic processing device according to the present invention. FIG. 4 is a block diagram showing an embodiment of the graphic processing device according to the present invention, FIG. 5 is a block diagram showing a display device to which the embodiment is applied, and FIGS. FIG. 8 is a block diagram showing details of the graphic processing device shown in FIG. 4, FIG. 9 is an explanatory diagram showing the bit layout of display data used in the same embodiment, and FIG. 10 is a pixel address used in the same embodiment. An explanatory diagram showing the bit layout of
FIG. 11 is a block diagram showing the configuration between the image memory and the display device, FIG. 12 is an explanatory diagram for explaining the drawing calculation operation of the same embodiment, and FIG. 13 is the format of macro instructions used in the same embodiment. FIGS. 14 to 20 are explanatory diagrams illustrating the operation of each drawing area detection mode in FIG. 2. 3102... General-purpose register including drawing point coordinate register, 3110... Arithmetic logic unit that performs coordinate update operation,
3103 and 3105...Drawing area management register, 3
104...Area determination comparator.

Claims (1)

[Claims] 1. In a graphic processing device that controls the creation and transfer of graphic data onto a display memory that stores graphic data,
The first one stores coordinate values of drawing points related to the creation of graphic data.
a second means for storing coordinate value information defining a predetermined area for drawing graphic data; and a third means for performing an update calculation of a predetermined drawing point coordinate value based on the contents of the first means.
a means for comparing and calculating the output contents of the first or third means and the contents of the second means to determine whether the drawing point coordinate value is inside or outside a predetermined area; A graphic processing device characterized by comprising the means of item 4. 2. The graphic processing apparatus according to claim 1, wherein the coordinate values of the drawing point stored by the first means are X-Y coordinate values in a two-dimensional space. 3. A patent claim in which the coordinate value information stored by the second means is information on the minimum and maximum values of the X coordinate and the minimum and maximum values of the Y coordinate that should define a two-dimensional rectangular area as a predetermined area. The graphic processing device according to item 2 of the scope. 4. The third means performs an update calculation of the X coordinate value or Y coordinate value of the predetermined drawing point coordinate value with respect to the content of the first means, and the fourth means Compare the minimum and maximum values of the X coordinate or the minimum and maximum values of the Y coordinate of the output content and the content of the second means, and determine that the drawing point coordinate value is between the predetermined minimum and maximum values. 4. The graphic processing device according to claim 3, wherein the graphic processing device is a window comparator for determining whether or not. 5. The graphic processing apparatus according to claim 4, wherein the fourth means includes means for storing the results of comparison and determination of the X coordinate value or the Y coordinate value corresponding to the output content of the third means.