JPS6168778A - Magnetic disc device - Google Patents

Abstract

PURPOSE:To detect surely an error of a data transfer circuit at write by using a timing generating circuit and a counter to apply timing correction between write data and write time read data in detecting an erroneous write. CONSTITUTION:In writing data A (a round mark, omitted hereinafter) on a disc face, bit parallel write data is transmitted from a CPU1 to a control section 3 via a DKC2, an ECC generated by an ECC6 is added to a data subjected to serial coding by a parallel/serial converting circuit 4 to form a data B, and the data A is written on the disc face via a modulation circuit 5, a write data correction circuit 7, and a write/read circuit 8. An error detection circuit 16 reads the data of the modulation circuit 5 and reproducing data C is formed via a demodulation circuit 10. An FF12 counts the case with parity bit 11 of the data B and an FF13 counts that of the data C via an output D of a timing generation circuit 17, both the count values are compared by a coincidence detecting circuit 14 and an erroneous write error is discriminated by an error circuit 15.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a magnetic disk device, and particularly to a magnetic disk device that detects errors in a data transfer circuit.

[Background of the invention]

Generally, in a magnetic disk unit (hereinafter referred to as DKU), when writing 5 data, a processing unit (hereinafter referred to as CPU).

Data is sent byte by byte from a magnetic disk controller (hereinafter referred to as DKC) using the NRZ method, and a control unit of the DKU removes the parity focus added to the byte data and converts it into a bit serial. Furthermore, in the modulation circuit, MF
Code conversion is performed using the M recording method or the 2-7 recording method, and data is recorded on the disk through a write data correction circuit, a write circuit, and a head. At this time, the CP
U. Following the data sent from the DKC, an ECC byte generated by an ECC circuit using the bit-serialized data as input data is written.

When reading data, the data recorded on the disk passes through the head, the readout circuit 2-phase synchronization circuit (VFO), and the demodulation circuit, converts the bit serial into bytes, adds a parity bit, and then sends the data to the DKC and CPU. transfer to. In this case, in the demodulation circuit, M
FM recording system or 2-7 recording system code, etc.
The output is sent to the ECC circuit in addition to the serial-to-parallel conversion circuit to detect errors in the read data and to correct one of the error bits.If there is an error, the data is read out again according to the read command. The error can be corrected by other instructions, including the instruction.

However, in the conventional method, if an error occurs in the serial focus due to a circuit failure after the parity bit is removed by the serial conversion circuit when writing data, there is no way to extract the error, so the data may be incorrect. There is a problem in that there is a possibility that the data will be written onto the disk without any modification.

Additionally, since magnetic disk drives do not have an after-write function during read like magnetic tape drives do, errors cannot be detected unless the written data is checked for errors using another read command. There is.

In recent years, the capacity of magnetic disk devices has increased.

With the trend towards higher density recording, the speed of data transfer circuits has increased and modulation and demodulation circuits have become more complex due to the adoption of high density recording methods, making it important to improve the reliability of data transfer circuits.

Prior art related to data error detection during writing (for example, see Japanese Patent Application Laid-Open No. 56-59358) includes a method of detecting data errors by comparing written data and reproduced data during writing. However, This technology is DKC and DK
To detect erroneous writing using U, DKC and DKU
The delay time between the two differs depending on the device configuration. Also, if you look at multiple DKUs closely, the delay time between DKU and Aiki will differ, etc.
When detecting erroneous storage, the speed is increased by having a common erroneous writing detection unit, especially during high-speed data transfer.

[Purpose of the invention]

An object of the present invention is to provide a magnetic disk device that can reliably detect errors in a data transfer circuit during writing.

[Summary of the invention]

In order to achieve the above object, the magnetic disk drive according to the present invention is characterized in that when detecting erroneous writing, a timing generation circuit and a counter perform timing correction between write data and read data during writing.

[Embodiments of the invention]

An embodiment of a magnetic disk device according to the present invention will be described below. FIG. 1 shows a processing device 1 and a magnetic disk control device (
1 is a diagram showing a system including a magnetic disk unit (DKC) 2 and a magnetic disk unit (DKU) 100 controlled by the control device 2. FIG.

The DKU 100 shown in FIG. 1 is roughly divided into a head disk assembly (hereinafter referred to as HDA) 20 that includes a magnetic disk, a magnetic head, and a drive unit that drives these, and a head disk assembly (hereinafter referred to as HDA) 20 that drives the magnetic head of the HDA 20 and processes information. It includes a write/read circuit 8 that performs recording/reproduction, and a control section 3 that controls the circuit 8. The control section 3 is a normal control circuit section that performs modulation/demodulation of recorded data and error checking (FCC), which will be described later. and an erroneous writing detection unit 16 that checks whether writing has been performed normally, which is a feature of this embodiment.

The control circuit section is.

A parallel-to-serial conversion circuit 4 and an ECC circuit 6 convert bit-parallel write data transmitted from the CPUI via the DKC 2 into serial data (2) and provide ECC, and the data (2) is converted into encoded data according to the recording modulation method. A recording system consisting of a modulation circuit 5 that modulates, a write data correction circuit 7 that corrects the code data 5 and removes pattern peaks, etc., and a write/read circuit 8 that discriminates the code data read out. It is composed of a data discrimination circuit 9 for demodulating, a demodulation circuit 10, and a reproduction system including a serial-to-parallel conversion circuit 11.

In addition, the error writing detection unit 16 detects an FF(
Flip-flop) 12 and F for counting 1 of the ECC of the data demodulated by the demodulation circuit 10.
-F (clip φ front) 13, and a timing generation circuit 17 that drives the F-Fs 12 and 13 at the same timing to simultaneously output data to the coincidence detection circuit 14;
It is provided with an error detection circuit 15 that matches both data and reports an error detection if this matching cannot be achieved.

Now, the control section of the magnetic disk device configured as described above operates as follows.

When writing data onto the disk surface, which is a recording medium,
The CPU is connected to the control unit 3 of the magnetic disk device via the DKC2.
Bit parallel write data is sent from I. The write data bit-serialized by the parallel-to-serial conversion circuit 4 is added with the ECC created by the ECC circuit 6, and becomes data (2) which is input data to the modulation circuit 5.

The data (2) is converted into code data according to the recording modulation method by the modulation circuit 5, and is converted into code data according to the recording modulation method by the write data correction circuit 7. The data is written onto the disk surface via the write/read circuit 8.

The erroneous write detection circuit 16 in this embodiment uses the output data of the modulation circuit 5 as input to the readout demodulation circuit IO to create data 0, which is reproduced data at the time of writing. Due to the timing of the output 0 of the timing generation circuit 17, F
-F12 counts the case where the parity bit of the data ■ is 1, and F-F1a counts the case where the parity and node of the data 0 are 1. This F-F
A coincidence detection circuit 14 that compares the count values of 12 and 13.
Error detection circuit 1 that determines the presence or absence of a writing error
Consists of 5.

According to this embodiment, since erroneous writing is detected by the DKU alone, the time difference between the written data and the read data during writing is only the delay time caused by the logic circuit such as the modulation/demodulation circuit. , 13 becomes easier. Furthermore, if the same data pattern such as data FF is written in the GAP before and after the data field shown in Fig. 2, the write data field including data and GAP and the read data field at the time of writing are each Since the sum of the data 1 of the parity bits of F −
Timing generation for F12 and F13 can be shared,
A write/read circuit 8. is connected to the input of the demodulation circuit 10. Since the playback data obtained through the data discrimination circuit 9 is not compared with the written data, it is not possible to monitor the entire system from the controller to the disk, but the ECC
It is possible to detect malfunctions in modulation circuits, etc., which are the main cause of erroneous writing that cannot be saved, and is therefore worthy of practical use.

〔Effect of the invention〕

As described above, according to the present invention, when detecting an erroneous write, the timing generation circuit and the counter detect the time difference between the write data and the read data during writing, which is caused only by the delay time of the logic circuit such as the modulation/demodulation circuit. Since the timing can be corrected, it is effective in detecting erroneous writing in magnetic disk drives.

[Brief explanation of drawings]

FIG. 1 is a block diagram for explaining a magnetic disk device which is an embodiment of the present invention, and FIG. 2 is an explanatory diagram of the operation of FIG. 1. 5... Modulation circuit, 6... ECC circuit 10.
...Demodulation circuit, 12 and 13...FF14.
...Coincidence detection circuit, 15...Error detection circuit 16
...Error writing detection circuit 17...Timing generation circuit.

Claims (1)

[Claims] In a magnetic disk device that records and reproduces recorded data sent from a host device by converting it into code data according to a recording modulation method on a disk surface, after converting the recorded data and the recorded data into the code data, When detecting erroneous writing by inputting the encoded data into a demodulator that demodulates it into a data word again and comparing the reproduced data obtained during writing, the recorded data and the reproduced data generated only by the delay time of the modulation/demodulation circuit are compared. A magnetic disk device equipped with an erroneous write detection circuit, which performs timing correction to eliminate a time difference with data.