JP2576509B2 - Data recorder - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data recorder for recording data from a computer or the like using a rotary head type digital audio tape recorder (DAT).

[Summary of the Invention]

The present invention relates to a data recorder, in which a so-called DAT recording device is diverted, and an error correction code for one to several frames is generated for each predetermined frame of a digital signal at the time of recording, and this is recorded at a boundary of recording for each predetermined frame. By doing so, it is possible to smoothly edit and re-record the recorded digital signal.

[Conventional technology]

For example, in a computer, in order to save data written on a hard disk or the like, such data is transferred to a so-called data recorder for recording.

In such a case, a so-called analog audio tape recorder has often been used as the above-mentioned data recorder. However, in such an analog tape recorder, the consumption of the recording medium becomes extremely large, and the data rate at the time of recording is low, so that much time is required for transfer and recording. Further, there is a problem that a desired recording portion cannot be easily located at the head.

By the way, DAT (Digital Audio Tape Recorder) has been developed ("ES Review" published by Shibaura Factory, Sony Corporation: ISSN 0389-7737: December 1985, Nos. 11-17)
Page). According to the DAT, since it is originally designed to record and reproduce digital signals, it is suitable for data recording as described above.

However, in the case of such a DAT, the width of the recording head is usually made larger than the track pitch, and a part of the previous track is alternately erased to perform guard bandless overwriting. Therefore, for example, when a part of recorded data is reproduced, edited and re-recorded, it is difficult to re-record this data even if reproduction and editing can be performed easily.

In other words, when the overwriting is performed as described above, if the re-recording of the edited data is performed, the next track previously recorded is erased because the recording head is wide. , Data to be stored will be destroyed.

On the other hand, the applicant of the present application has previously provided an apparatus in which when performing data recording using DAT, an amble signal period is provided at the beginning and end of one recording so that recording can be performed well. A proposal was made (see Japanese Patent Application No. 61-314922). However, in the case of this apparatus, re-recording has to be performed for all data recorded at one time, and when this data amount is large, it takes much time for reproduction and re-recording.

[Problems to be solved by the invention]

As described above, in the conventional technique, when DAT is used as a data recorder, there is a problem that recorded data cannot be easily re-recorded.

[Means for solving the problem]

The present invention has a rotating head, and two rotation tracks are formed by one rotation of the rotation head, and the digital signal is completed within one frame by using the two tilt tracks as one frame. A device (DAT (1)) which is coded and recorded and reproduced is provided, and at the time of recording, an error correction code for one to several frames is generated for each predetermined frame of the digital signal at the time of recording. (A circuit (25)) and a data recorder characterized in that the frame of this error correction code is recorded (microcomputer (22)) at the recording boundary for each of the predetermined frames.

[Action]

According to this, error correction codes for one to several frames are recorded each time a digital signal is recorded for a predetermined frame during recording, so that error correction capability is greatly improved and re-recording is performed. Occasionally, by recording up to the frame of the error correction code, re-recording can be performed smoothly without destroying necessary data, whereby a good data record can be formed using this DAT.

〔Example〕

In FIG. 1, (1) shows the structure of the DAT.
(1) is provided with a rotary head drum (11), and the magnetic tape (12) is wound around and transported by a range of about 90 degrees around the drum (11). And this drum (11)
A and B recording / reproducing heads are provided at an angle interval of 180 degrees on the upper side, and two inclined tracks are recorded / reproduced by one rotation of the drum (11). .

On the other hand, digital data from the outside is input to ten circuits (13), and is supplied from these ten circuits (13) to a digital signal processing circuit (14) to be converted into the above-described DAT format. The formatted signal is supplied to the heads A and B through the recording amplifier (15) and the recording / reproducing switch (16) on the recording side, and is recorded on the tape (12). The signals recorded on the tape (12) are
The reproduced signal is supplied to a processing circuit (14) through a reproduction side contact of a recording / reproduction changeover switch (16) and a reproduction amplifier (17). Output to outside through 13).

Further, an external control signal is supplied to a system control circuit (18), and the signal from the control circuit (18) controls the rotation of the head drum (11), the transfer control of the tape (12), and the switching of the switch (16). Controls are performed, and a recording control circuit (18)
Is supplied to the processing circuit (14) to form a predetermined subcode signal. At the time of reproduction, a signal extracted by the processing circuit (14) is supplied to a control circuit (19) to perform control such as tracking, and a part of the signal is taken out.

DAT (1) is formed by the above configuration. In this apparatus, a DA / AD conversion circuit is provided outside of the 10 circuits (13), and a predetermined control device is provided outside of the control circuit (18). Can be.

On the other hand, in the above-mentioned device, an arbitrary interface bus (3) is connected to the outside of the DAT (1) via the controller (2). Here, for example, the SCSI standard (“NIKKEI ELECTRONICS”) is used as the interface bus (3).
(Nippon Keizai Shimbun, October 6, 1986, pages 102-107). Further, a host computer (5), a hard disk device (6) and the like are connected to the bus (3) via an adapter (4).

A protocol control circuit (21) is provided between the controller (2) and the bus (3), and the microcomputer (22) controls the operation of the controller (2) via the control circuit (21). ) And a memory control (DMA) circuit (23), and data and control signals are exchanged between the bus (3). Further, state detection and operation control are performed between the microcomputer (22) and the DMA circuit (23), and data is transferred between the buffer memory (24) and the bus (3) through the DMA circuit (23). Input and output are performed.

In addition to this memory (24), this memory (24)
A circuit (25) for generating an error correction code (ECC) for the data written in the memory (24) is provided, and the error correction code generated by the circuit (25) is written to a predetermined portion of the memory (24). Data is input and output between the memory (24) and the processing circuit (14) of the DAT (1) via ten circuits (26) and (13). Control signals are exchanged between the microcomputer (22) and the system control circuit (18).

Therefore, in this device, the hard disk device (6)
Is written to the controller (2) via the bus (3) in response to a transfer request from the controller (2) at the time of recording, and is written to the memory (2) via the DMA circuit (23).
Written in 4). An error correction code is generated by the generation circuit (25) for the data written in the memory (24), and the data including the error correction code is read out via the ten circuits (26) and read out from the DAT (1). ). In this DAT (1), the data input to the ten circuits (13) is regarded as equivalent to the data from the AD conversion circuit at the time of audio recording, and the digital signal processing circuit (14) performs the predetermined DAT (14).
Format and converted to a tape (1
Recorded in 2).

At the time of this recording, data is supplied from the memory (24) to the digital signal processing circuit (14) as follows.

In other words, in the DAT format, two inclined tracks formed by one rotation of the drum (11) are taken as one frame, and 5760 bytes of the original data amount can be recorded in one frame. Therefore, for example, with 12 frames as one unit, 5760 bytes are recorded in each of 11 frames, and only 2176 bytes are recorded in the remaining one frame, and the subsequent data is regarded as invalid data. As a result, the above 1
The data amount per unit (12 frames) can be 65536 bytes (64K bytes).

Therefore, when the 64 Kbytes are first written in the memory (24), an error correction code is generated in the generation circuit (25). Here, as this error correction code, for example, an error correction code for two frames is generated for the above-described 12-frame data using, for example, a Reed-Solomon code. The generated error correction code is stored in the memory (2
It is written in the specified part of 4).

Then, at the time of recording, first, the error correction code for one frame is read, then the data signal for 12 frames is read, and finally, the error correction code for one frame is read. Reading is controlled.

As a result, the recording pattern on the tape (12) becomes, for example, as shown in FIG. 2A, an error correction code (EC) of one frame recorded by the heads A and B on the rotating head drum (11).
C) A data signal period of 12 frames (partially omitted) is provided following the signal (indicated by hatching),
Further, an ECC signal of one frame is provided. At the time of reproduction, a desired ECC frame is extracted using a timing signal such as a frame number in the data signal.

On the other hand, when the data signal is re-recorded after processing such as editing is performed, the rotational phase servo and the like of the drum (11) are taken from the portion before the re-recording, as shown in FIG. As shown in the figure, E by the head B in the latter half of the ECC frame
Starting from the recording of the CC signal, after the recording of the data signal of 12 frames, only the recording of the ECC signal by the head A is performed, and the re-recording is completed.

As a result, recording is performed as shown in FIG. At the time of re-recording, the error correction code is reduced by one frame. This is because the error correction code is set to a lost frame at the time of reproduction, so that the correction capability is slightly reduced. Since it is saved,
There is no problem in normal use.

Therefore, in this device, the data signal between ECC frames can be arbitrarily re-recorded, and the recorded data signal can be easily edited and rewritten.

In the above-described device, for example, when an error correction code of k frames is provided, errors up to k frames in a recording signal can be corrected. Therefore, when verifying an error in a signal recorded using a so-called read-after-write head, the error up to the above-described k frames can be ignored. Can be simplified.

When the number of erroneous frames becomes larger than k, the entire block between the ECC frames may be repeatedly recorded. In this case, since the block is divided into small blocks by the ECC frame, repetitive recording of this block can be easily performed.

In the case of re-recording, the operation is performed with the value of k described above as k-1.

In addition, in order to prevent the possibility of erroneously detecting the unerased residue of the previous ECC frame in the case of re-recording, for example, insert an ID code indicating the number of re-recordings in each frame, and ignore frames other than frames having the same number of times. You may do so.

Further, in the above-described apparatus, the data used for generating the error correction code is improved by using a data sequence that can be interleaved between the tracks, thereby improving the correction capability against errors due to so-called lateral scratches on the tape. Can be done.

Also, in the above-mentioned device, the number of ECC frames is formatted to a sufficient number, and error correction codes for all frames are generated for high-grade models, and only some error correction codes are generated for low-grade models. Can be generated, and the rest can be treated as meaningless data.

Thus, according to the above-described device, the DAT can be used as a data recorder. In this case, according to the above-described configuration, the rotary head drum (11) is rotated at, for example, 2000 rpm,
Data recording is performed at a very high speed of 192,000 bytes per second, and the recording medium consumed thereby can be extremely reduced. Further, in this case, according to the above-described configuration, smooth re-recording can be performed, and therefore, good data can be recorded using the re-recording.

[Effects of the Invention] According to the present invention, every time a digital signal is recorded for a predetermined frame during recording, error correction codes for one to several frames are recorded, so that error correction capability is greatly improved. In addition, by recording up to the frame of the error correction code at the time of re-recording, it is possible to smoothly perform re-recording without destroying necessary data, thereby forming a good data recorder using the DAT. Now you can do it.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an example of the present invention, and FIG. 2 is a diagram for explaining the configuration. (1) is DAT, (2) is controller, (3) is bus,
(4) is an adapter, (5) is a host computer,
(6) a hard disk drive, (11) a rotating head drum, (12) a tape, (14) a digital signal processing circuit,
(16) is a switch, (18) is a system control circuit, (22) is a microcomputer, (23) is a DMA, (2)
4) is a memory, (25) is an error correction code generation circuit, and A and B are recording and reproducing heads.

Continuation of front page (56) References JP-A-63-161582 (JP, A) JP-A-63-160074 (JP, A) JP-A-61-287080 (JP, A) JP-A-61-54078 (JP, A) , A) Japanese Utility Model Showa 62-77466 (JP, U)

Claims (1)

(57) [Claims] 1. A rotating head, wherein two rotation tracks are formed by one rotation of the rotation head, and a digital signal is completed in one frame with the two rotation tracks as one frame. A device which is coded so as to be recorded and reproduced is provided. At the time of recording, an error correction code for one to several frames is generated for each predetermined frame of the digital signal. A data recorder characterized in that a frame of a code is recorded at a boundary of recording for each of the predetermined frames.