JPS6167922A - Plasma treating device - Google Patents

Abstract

PURPOSE:To enable to feed high power to a plasma treating device and to contrive to shorten the plasma treating process by a method wherein an insulator is molded by burying in the jetting ports of the upper electrode. CONSTITUTION:An insulator 10 is buried in the jetting ports 7 of an upper electrode 9. This insulator, which is made of ceramic, such as alumina, is formed into a conical form, is fitted in the jetting ports 7 of the upper electrode 9 and can be used for coping with the wind pressure of jetting gas and a difference between the thermal expansion coefficients of the parts of the jetting ports. By constituting the jetting ports 7 in such a way, it can be dissolved for an electric field to concentrate on the parts of the jetting ports 7 by an insulation effect. As a result, high power can be fed to the plasma treating device and the plasma treating process can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a plasma processing apparatus that achieves equalization of discharge current density.

Semiconductor elements such as transistors, ICs, and LS'1 are made of simple semiconductors such as silicon (Sl), gallium arsenide (GaAs), and indium phosphide (Inp).
It is formed using a single crystal substrate made of a stable compound semiconductor.

Here, the single-crystal substrate is a high-purity crystal rod grown using a single-crystal growth device, cut into a thickness of about 500 μm, and subjected to surface treatments such as polishing and cleaning.
A large number of semiconductor elements are formed all at once using a photolithography technique consisting of a thin film formation technique and photoetching.

The semiconductor material that is currently being mass-produced the most is Si, and the growth technology for this single crystal has progressed to the point where it has been put into practical use up to a diameter of 6 inches.

On the other hand, even large semiconductor devices such as ICs and LSIs have a
Because it is n-sided, it is possible to form a large number of elements from a single semiconductor substrate (hereinafter referred to as a wafer), and great efforts are being made to increase the size of wafers in order to reduce costs.

Now, such a wafer is processed by chemical vapor deposition (abbreviated as CVD).
), a conductive layer or an insulating layer is formed using a vacuum evaporation method, a sputtering method, etc., and then photoetched to form a fine pattern. It is necessary to ensure the reliability of the device and improve the yield that the process is carried out evenly.

[Conventional technology]

Plasma chemical reactions are widely used for forming conductive layers, insulating layers, and etching.

FIG. 2 shows the configuration of a plasma processing apparatus that performs a plasma chemical reaction. In the upper part of a reaction chamber 1, there is an upper electrode 2 which is insulated from the container. Opposed to this is a stage 4 on which a wafer 3 is placed. and is grounded through the reaction vessel 5.

Further, a heater 6 is provided below the stage 4, and the wafer 3
It is constructed so that it can be heated.

Here, the upper electrode 2 also serves as a supply port for the reactant gas, and is formed in a Java-like shape with a large number of ejection lowers on the lower side.

Here, silicon nitride (Si N
), monosilane (SiHa) and ammonia (NH3) are mixed with nitrogen (N2) or argon (Ar
) Gas is introduced into the reaction chamber ■ as a carrier, and the gas is introduced into the reaction chamber ■ through the exhaust port 8.
The temperature of the wafer 3 is raised to 300 to 40 Torr by evacuating the room and maintaining the vacuum level in the room at 0.2 to 1 Torr.
Keep it at 0'C.

In this state, when a high frequency electric field of several hundred KHz is applied between the aluminum upper electrode 2 and the stage 4 to generate a discharge, 5iN (to be precise, Si), which is a reaction product, is deposited on the surface of the wafer 3.
, NA) progresses, and an insulating layer of a predetermined thickness can be formed by adjusting the treatment time.

The same is true when forming a silicon dioxide (Si02) layer or a phosphosilicate glass (PSG) layer as an insulating layer; in the former case, SiHa and nitrous oxide (N2) are used as reactive gases.
0) and in the latter case, Si Ha and phosphine (PH
It can be formed by using a mixed gas with 3).

In addition, to form fine patterns by etching these insulating or conductive layers, a photoresist is coated on the layer, and a portion is exposed by projection exposure or adhesive exposure, and a positive photoresist is formed. When using a negative type, the photosensitive area is soluble in the developer, and when using a negative type, the photosensitive area is insoluble to form a fine pattern with openings in the resist film. A mixed gas of carbon tetrafluoride (CF4, commonly known as freon) and oxygen (02) is used as a reaction gas, and a high frequency electric field of 13.56 MHz is applied to generate a plasma discharge. ) is reacted with the insulating layer and the resist layer, and by taking advantage of the low etching rate of the resist layer, the insulating layer or conductive layer with the openings is selectively etched to form a fine pattern.

As shown in FIG. 2, plasma CVD or plasma etching is performed using an apparatus as shown in FIG. This has become more difficult as wafers become larger.

FIG. 3 is an enlarged view of the upper electrode 2 in FIG. 2, and shows that the parts of the plurality of ejection lowers where the reaction gas is ejected hit the discharge and the current density increases, so the plasma CvO is When etching is performed, reaction products are particularly deposited around the ejection lower, and this is likely to peel off and fall due to the gas flow, scattering and falling onto the wafer 3, resulting in defects. A phenomenon occurs in which the opposing wafer portion is particularly susceptible to attack.

Therefore, it is necessary to lower the power during the plasma CvD or etching process so that electric field concentration (abnormal discharge) at the periphery of the ejection lower does not become noticeable.

[Problem to be Solved by the Invention 3] As explained above, when plasma CVD or etching is performed, the electric field is concentrated around the ejection lower where gas is ejected at the upper electrode. The opposing part is strongly etched, and C
In VD, there is a problem in that precipitates in particular accumulate at the ejection part and peel off to become dust, which contaminates the wafer 3 and makes it defective.

[Means for solving problems]

The above problem is caused by the fact that the upper electrode, which is provided above the reaction chamber facing the stage on which the substrate to be processed is mounted and is equipped with a plurality of reaction gas outlets, is fitted with an insulator at the outlet of the gas IIF. 'L? This problem can be solved by using a plasma processing equipment.

[Effect]

In the present invention, the electric field is concentrated near the ejection lower part of the upper electrode 2 during plasma CVD or etching. Therefore, by covering this portion with an insulating material, the edge effect is eliminated, thereby eliminating the concentration of the electric field.

〔Example〕

FIG. 1 (Δ) is a sectional view of an upper electrode 9 according to the present invention, in which an insulator 10 is embedded and molded in the ejection lower part.

Figure (B) is an enlarged view of the ejection lower and the insulator 10. It is convenient to form the insulator with ceramic such as alumina because it has excellent heat resistance and chemical resistance, and it is convenient to make the insulator with ceramic such as alumina. In this case, a synthetic resin such as Teflon may be used.

In addition, as shown in the same figure (B), the insulator is formed in a pot shape,
[! If they are placed with the same χ, it is possible to prevent them from separating due to differences in the wind pressure or thermal expansion coefficient of the ejected gas.

By embedding an insulating material around the ejection lower in this way, it is possible to eliminate the concentration of electric field in this part, and therefore it is possible to increase high frequency power.

Specifically, the power density used to be 0.2 W/cnl was the limit of use, but by implementing the present invention, it has become possible to use 0.4 W/cnl.

〔Effect of the invention〕

As described above, the implementation of the present invention eliminates the drawback that the electric field concentrates on the reactant gas outlet of the upper electrode during plasma discharge, and therefore it becomes possible to supply higher power than in the past, and shorten the process.

FIG. 2B is an enlarged cross-sectional view of the jet nozzle portion, FIG. 2 is a cross-sectional configuration diagram of the plasma processing apparatus, and FIG. 3 is a cross-sectional view of the upper electrode.

In the figure, 1 is a reaction chamber, 2 and 9 are upper electrodes, 3 is a wafer, 4 is a stage, 7 is a spout,
10 is an insulator.

￥-1 listen 'I#2TE

Claims (1)

[Claims] An upper electrode is provided above the reaction chamber facing the stage on which the substrate to be processed is mounted, and includes a plurality of reaction gas outlets, and is formed by fitting an insulator into the gas outlets. A plasma processing apparatus characterized by the following.