JPS61656B2 - - Google Patents

Info

Publication number
JPS61656B2
JPS61656B2 JP56076942A JP7694281A JPS61656B2 JP S61656 B2 JPS61656 B2 JP S61656B2 JP 56076942 A JP56076942 A JP 56076942A JP 7694281 A JP7694281 A JP 7694281A JP S61656 B2 JPS61656 B2 JP S61656B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56076942A
Other languages
Japanese (ja)
Other versions
JPS57191764A (en
Inventor
Hiroshi Kadota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP56076942A priority Critical patent/JPS57191764A/ja
Publication of JPS57191764A publication Critical patent/JPS57191764A/ja
Publication of JPS61656B2 publication Critical patent/JPS61656B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/065Partitioned buffers, e.g. allowing multiple independent queues, bidirectional FIFO's

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
  • Microcomputers (AREA)
JP56076942A 1981-05-21 1981-05-21 Storage device Granted JPS57191764A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56076942A JPS57191764A (en) 1981-05-21 1981-05-21 Storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56076942A JPS57191764A (en) 1981-05-21 1981-05-21 Storage device

Publications (2)

Publication Number Publication Date
JPS57191764A JPS57191764A (en) 1982-11-25
JPS61656B2 true JPS61656B2 (enExample) 1986-01-10

Family

ID=13619791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56076942A Granted JPS57191764A (en) 1981-05-21 1981-05-21 Storage device

Country Status (1)

Country Link
JP (1) JPS57191764A (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58197561A (ja) * 1982-05-12 1983-11-17 Hitachi Cable Ltd 共有メモリ方式
JPS6015757A (ja) * 1983-07-06 1985-01-26 Fujitsu Ltd メモリ制御回路
JPS60157655A (ja) * 1984-01-28 1985-08-17 Fanuc Ltd 補助記憶装置
JPS6371766A (ja) * 1986-09-12 1988-04-01 Fuji Facom Corp バツフア転送方式
JP3203701B2 (ja) * 1990-11-01 2001-08-27 インターナショナル・ビジネス・マシーンズ・コーポレーション コードセグメントのリンク方法とそのシステム及びコードセグメントのダイナミックリンク方法

Also Published As

Publication number Publication date
JPS57191764A (en) 1982-11-25

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