JPS6161436A - Method for dividing semiconductor substrate - Google Patents

Abstract

PURPOSE:To protect an element region, other than its cutting margin, from breaks and cracks by a method wherein a first groove is formed by etching in the cutting margin of a semiconductor substrate, a second groove is formed by cutting from the rear aligned to the first groove, and then the semiconductor substrate is subjected to cleaving. CONSTITUTION:By the double side matching method, etching masks 7, 7' are patterned respectively on both sides of a composite semiconductor wafer 12, one in a cutting margin 3 on the compound semiconductor wafer 12 and the other at a scribed position 6 on the rear of the wafer 12. The portions to be exposed are subjected to etching for the formation of grooves 8, 9 on both sides of the wafer 12, whereafter the etching masks 7, 7' are removed. A sheet 2 made of polyvinyl chloride is applied to the surface of the wafer 12, whereafter a cut is provided in line with the rear side groove 9 of the wafer 12. The depth of the cut should be approximately 2/3 of the thickness of the wafer 12. Next, a cleaving line 10 is provided in the wafer 12 under a roller for the separation of the wafer 12 into individual semiconductor elements.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention relates to semiconductor crystal substrates, particularly compound semiconductor substrates made of fragile materials (GaAs, GaP, GaAsP...
・etc.) into each semiconductor element.

(Prior Art) Normally, the manufacturing process of semiconductor elements (transistors, integrated circuits, etc.) includes a process generally called a pelletizing process. This process is performed on semiconductor substrates (hereinafter referred to as wafers).
This is the process of dividing a large number of elements (hereinafter referred to as pellets) made within the pellet into individual pellets. In this pelletizing process, the width of the cutting margin is narrowed to about 50 μm in order to increase the number of pellets per wafer. Therefore, it is required that cutting strain during scribing, pellet cracking and chipping during forced opening be kept within the cutting margin area, and that multiple pellets be not connected due to cracking defects. In response to these demands, one of the currently available dividing methods is to use a dicer to cut the scribe area on the wafer surface and then use a roller to open the wafer into individual pellets. . However, this dicing method is not suitable for compound semiconductor substrates that are made of brittle materials, and has the problem that large chips tend to occur on the wafer surface side on the side surfaces of the cutting grooves, resulting in frequent defects.

(Problems to be Solved by the Invention) An object of the present invention is to provide a pelletizing method using dicing in which the element portion outside the cutting margin area is not affected by chipping or cracking.

(Means for Solving the Problem) According to the present invention, a first groove is provided in the cut margin region on the surface of the compound semiconductor substrate, and then a second groove is provided in the back surface of the compound semiconductor substrate under the cut margin region. Thereafter, a second groove is cut as necessary to obtain a method for dividing a compound semiconductor substrate into each semiconductor element.

(Example) Next, the present invention will be described in detail with reference to the drawings.

Figure 1 (a) is a plan view of a compound wafer on which individual semiconductor elements have been formed, Figure 1 (b) is an enlarged view of a portion of this, and Figure 1 (C) is a plan view of a compound wafer on which individual semiconductor elements have been formed. It is a sectional view at the AA' section. The individual semiconductor elements 1 are divided by margin regions 3 running vertically and horizontally on the wafer. Although the area of the semiconductor element 1 is covered with an insulating film or wiring 11, the surface of the wafer 12 is exposed in the cutting edge area.

The conventional dicing method is shown in Figure 2 (a).

As shown in (b), a vinyl chloride sheet 2 is pasted on the back side of a compound semiconductor wafer 12, and in this state, a cut margin area 3 with a width of about 50 μm on the front surface of the compound semiconductor wafer 12 is cut into a sheet with a thickness of about 25 μm. Cutting is performed using cutting teeth to form a cutting groove 4 having a width of about 30 μm and a depth of about 2/3 of the thickness of the wafer 12. After this, the compound semiconductor wafer 12 is divided by a roller. However, as can be seen from the figure, a chip 5 (with a depth of several μm and a length of 15 μm) is generated at the end of the cutting groove 4, and this chip 5 protrudes from the cutting margin area 3 and forms a portion of the semiconductor element 1. It has reached this point. This state is shown from above in Figure 2(b).
It is. In this state, a high yield of good pellets cannot be expected, and there is a problem of decreased yield.

Next, an embodiment of the present invention will be described along its steps.

First, as shown in FIG. 3(a), both sides of the scribe position 6 on the back side of the compound semiconductor wafer 12 are made by using the double-sided metallization method, which is a normal lithography technique. Etching mask 7 to be used later
．． 7' is patterned to a width of 20 μm and 5 μm, respectively.

Next, as shown in FIG. 6(b), the exposed portions of the wafer 12 are etched using a phosphoric acid etching solution to a depth of about 10 μm using the etching mask 7.7'. After the grooves 8 and the grooves 9 on the back side have been formed, the etching mask 7.7' is removed. After that, as shown in the same figure (C), after pasting the vinyl chloride sheet 2 on the front surface of the wafer 12, it is placed at a depth of approximately 2/3 of the thickness of the wafer 12 in line with the groove 9 on the back surface of the wafer 12. Cut in the right direction. Next, the same figure (
d) As shown in K, the wafer 12 is opened using a roller, a bone opening line 10 is inserted, and the wafer 12 is divided into individual semiconductor devices.

According to the above method, chips 5' are generated on the back surface of the wafer 12 in FIG. 3(C) as in the conventional method, but they do not occur on the front surface and do not affect the device active regions. Can be pelletized. Therefore, a high yield of good pellets can be obtained.

(Effects of the Invention) As described above, according to the present invention, even a fragile compound semiconductor wafer can be safely divided into individual semiconductor devices, and the yield of semiconductor devices can be increased.

[Brief explanation of the drawing]

Figure 1 (a) is a plan view of a semiconductor wafer on which a large number of semiconductor elements have been formed, Figure 1 (Φ) is a partially enlarged view of Figure 1 (a), and Figure 1 (C) is A- in Figure 1 (b). FIG. FIG. 2(a) is a cross-sectional view showing a conventional semiconductor wafer dividing method, and FIG. 2(b) is a plan view of FIG. 2(a). FIGS. 3(a) to 3(d) are cross-sectional views showing a semiconductor wafer dividing method according to an embodiment of the present invention in the order of steps. 1... Semiconductor element, 2... Vinyl chloride sheet, 3... Cut area, 4...
・Cutting groove, 5.5'...chip, 6...
Scribe position, 7.7'... mark for etching, 8... groove on front surface, 9... groove on back surface, 10... composition line, 11...Coating,
12... Wafer Q...:, F, +H7/'4 No.1 Figure (C) 1111114〉◇2 wafer 8 Figure 2

Claims (1)

[Claims] A first groove of a desired width and depth is formed in the cut margin area of the semiconductor substrate.
A groove is formed by etching, and then a second groove is cut to a desired width and depth from the back surface of the semiconductor substrate in alignment with the first groove position, and then the semiconductor substrate is cleaved. A method for dividing semiconductor substrates.