JPH03159153A - Division of semiconductor substrate - Google Patents

Division of semiconductor substrate

Info

Publication number
JPH03159153A
JPH03159153A JP1298163A JP29816389A JPH03159153A JP H03159153 A JPH03159153 A JP H03159153A JP 1298163 A JP1298163 A JP 1298163A JP 29816389 A JP29816389 A JP 29816389A JP H03159153 A JPH03159153 A JP H03159153A
Authority
JP
Japan
Prior art keywords
semiconductor substrate
film
cutting
division
scribe region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1298163A
Other languages
Japanese (ja)
Inventor
Masahiro Kato
正裕 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP1298163A priority Critical patent/JPH03159153A/en
Publication of JPH03159153A publication Critical patent/JPH03159153A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a method of division facilitating high-yield cutting and division without decrease in strength at the edges of an attached film such as a metallic film and without imperfect division by making a wider groove than a scribe region in the rear before the attached film is formed. CONSTITUTION:In using a method of dividing a semiconductor substrate by which a semiconductor substrate 4 having a film 5 attached to the rear is divided by cutting at a scribe region, a wider groove G than the scribe region is made in the rear before the attached film 5 is formed. For example, the wider groove G than the scribe region is made along the scribe region with a dicing blade. The metallic film 5 is formed on the rear of the semiconductor substrate 4 by the vacuum deposition method or other methods. An adhesive sheet 6 is adhered to the rear of the semiconductor substrate 4, which is cut at the scribe region with the dicing blade 7. In cutting, the dicing blade 7 must reach the bottom of the groove G made in the rear but must not be in contact with the adhesive sheet 6.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、裏面に付着膜が形成された半導体基板を、
スクライブ領域に沿って切断する半導体基板の分割方法
に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a semiconductor substrate with an adhesive film formed on the back surface.
The present invention relates to a method for dividing a semiconductor substrate by cutting along a scribe region.

〔従来の技術〕[Conventional technology]

半導体ウェハに拡散、エツチング等の工程を経て半導体
素子が作り込まれると、1枚のウェハ内に素子が多数個
規則的に配列されたものが得られる。これらの素子は、
単位区画毎に分割され、チップとしてパッケージ等に組
み込まれる。チップは、パッケージ等の金属面に共晶は
んだを用いてボンディング接着されることが多く、その
場合にはウェハの裏面には予め金属付着膜が蒸着等の方
法で形成される。この場合、ウニへ当たりのチップ数を
多くする為には、分割不良がないことが必要である。ま
た、ボンディング接着の信頼性にはウェハ裏面付着膜の
付着強度が大きく影響するため、チップ分割後の付着強
度が大きいことが必要である。
When semiconductor elements are fabricated on a semiconductor wafer through processes such as diffusion and etching, a large number of elements are regularly arranged within one wafer. These elements are
It is divided into unit sections and incorporated into a package or the like as a chip. Chips are often bonded to a metal surface of a package or the like using eutectic solder, and in this case, a metal adhesion film is previously formed on the back surface of the wafer by a method such as vapor deposition. In this case, in order to increase the number of chips that hit the sea urchin, it is necessary that there be no splitting defects. Furthermore, since the reliability of bonding adhesion is greatly influenced by the adhesion strength of the film attached to the back surface of the wafer, it is necessary that the adhesion strength after chip division be high.

一般的に、半導体ウェハを単位区画毎に分割する方法と
して、■フルカットダイシング法、■ブレーキング併用
ハーフカットダイシング法、■ブレーキング併用スクラ
イビング法等がある。ここで、ブレーキングは単結晶の
へき開性を利用する技術なので分割方位等の適用条件が
限られるが、フルカットダイシング法は適用範囲が広く
、簡便であるという点で特徴がある。
In general, methods for dividing a semiconductor wafer into unit sections include: (1) full-cut dicing method, (2) half-cut dicing method with combined braking, and (2) scribing method with combined braking. Here, since breaking is a technique that utilizes the cleavability of a single crystal, its application conditions such as the division direction are limited, but the full-cut dicing method is characterized by its wide range of application and simplicity.

以下、フルカットダイシング法の概要を説明する。まず
、裏面に金属膜が蒸着されたウェハを拡張性のある粘着
シートに貼り付け、単位区画境界領域(以下、「スクラ
イブ領域」という。)に沿ってブレードで表面から切断
する。この場合、ウェハと金属膜のみを切断し、粘着シ
ートは切断しない。次に、粘着シートを拡張することに
より、単位区画毎にチップを分割する。
The outline of the full-cut dicing method will be explained below. First, a wafer with a metal film deposited on the back side is attached to an expandable adhesive sheet, and cut from the front surface with a blade along the unit division boundary area (hereinafter referred to as "scribe area"). In this case, only the wafer and metal film are cut, but the adhesive sheet is not cut. Next, the chip is divided into unit sections by expanding the adhesive sheet.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし、従来の分割方法によると、チップ裏面に形成さ
れた金属膜の付着強度が縁端で劣化するという欠点があ
った。また、分割不良を起こさない、高歩留りの切断分
割を行なうには高度な技術が必要であった。
However, the conventional dividing method has the disadvantage that the adhesion strength of the metal film formed on the back surface of the chip deteriorates at the edges. In addition, advanced technology is required to perform cutting and division at a high yield without causing division defects.

第4図は従来の分割方法に係るウェハの切断例を示すも
のである。ウェハ1の裏面には金属膜2が蒸着されてお
り、粘着シート3が金属膜2に貼り付けられている。切
断例A及びBは、ウェハ1及び金属膜2だけではなく粘
着シート3も切断されているので、粘着シート3を拡張
する時に支障がある不良例である。切断例Cは、ウェハ
1及び金属膜2のみが切断されているので良好である。
FIG. 4 shows an example of cutting a wafer using the conventional dividing method. A metal film 2 is deposited on the back surface of the wafer 1, and an adhesive sheet 3 is attached to the metal film 2. Cutting examples A and B are defective examples in which not only the wafer 1 and metal film 2 but also the adhesive sheet 3 are cut, which causes problems when expanding the adhesive sheet 3. Cutting example C is good because only the wafer 1 and metal film 2 are cut.

切断例り及びEは、金属膜2が完全に切断されていない
ので粘着シート3を拡張することができない不良例であ
る。
Cutting examples and E are bad examples in which the adhesive sheet 3 cannot be expanded because the metal film 2 is not completely cut.

第5図は、従来技術の欠点を示す工程図であり、前述し
た不良例(切断例りあるいは切断例E)を用いて粘着シ
ート3を拡張する工程を示す。この場合、金属膜2は完
全に切断されていないので、ウェハ1は金属膜2の横方
向からの引っ張りによる強制的な「引きちぎり」で分割
される。その為、金属膜2の縁端では剥がれが生じ、金
属膜の付着強度が縁端で劣化する。
FIG. 5 is a process diagram showing the drawbacks of the prior art, and shows the process of expanding the adhesive sheet 3 using the aforementioned defective example (cutting example or cutting example E). In this case, since the metal film 2 is not completely cut, the wafer 1 is divided by forced "tearing" by pulling the metal film 2 from the lateral direction. Therefore, peeling occurs at the edges of the metal film 2, and the adhesion strength of the metal film deteriorates at the edges.

そこで本発明は、金属膜等の付着膜の強度が縁端で劣化
せず、かつ分割不良をおこさない高歩留りの切断分割を
容易にする分割方法を提供することを目的とする。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a dividing method that facilitates high-yield cutting and division without deteriorating the strength of an attached film such as a metal film at the edges and without causing division defects.

〔課題を解決するための手段〕[Means to solve the problem]

上記課題を達成するため、本発明では裏面に付着膜が形
成された半導体基板を、スクライブ領域に沿って切断す
る半導体基板の分割方法において、上記付着膜を形成す
る前に、スクライブ領域の幅より広い溝を裏面に形成し
ておくことを特徴とする。
In order to achieve the above object, in the present invention, in a method for dividing a semiconductor substrate in which a semiconductor substrate with an attached film formed on the back side is cut along a scribe area, the width of the scribe area is cut before forming the attached film. It is characterized by a wide groove formed on the back surface.

〔作用〕[Effect]

この発明は、以上のように構成されているので、裏面に
形成された溝により半導体基板及び付着膜のみを切断す
ることが容易になる。
Since the present invention is configured as described above, it becomes easy to cut only the semiconductor substrate and the attached film using the groove formed on the back surface.

〔実施例〕〔Example〕

以下、この発明に係る半導体基板の分割方法を添付図面
に基づき説明する。なお、説明において同一要素には同
一符号を用い、重複する説明は省略する。
Hereinafter, a method for dividing a semiconductor substrate according to the present invention will be explained based on the accompanying drawings. In the description, the same elements are denoted by the same reference numerals, and redundant description will be omitted.

第1図は、この発明の一実施例に係る半導体基板の分割
方法を示す工程図である。この実施例では付着膜として
金属膜を使用している。半導体基板4の表面には半導体
素子が多数形成されており、スクライブ領域により単位
素子毎に区画されている。なお、請求の範囲を含めて、
本発明で述べる“スクライブ領域“とは、必ずしも基板
表面に描かれた区画パターンを意味するものでなく、ダ
イシングブレード等で切断されるべき領域で、ブレード
の位置合わせ精度や、切断時のカーフロスをマージンと
して見込んだ、仮想的な区画領域幅を指す。このスクラ
イブ領域(同図(a)参照)内で半導体基板を分割する
ことにより単位素子毎にチップ化される。まず、スクラ
イブ領域に沿ってスクライブ領域の幅より広い溝部Gを
ダイシングブレードで形成する(同図(b))。この溝
部Gを形成する方法として、ダイシングブレードより切
断幅の広い回転グラインダを使用してもよい。
FIG. 1 is a process diagram showing a method for dividing a semiconductor substrate according to an embodiment of the present invention. In this embodiment, a metal film is used as the deposited film. A large number of semiconductor elements are formed on the surface of the semiconductor substrate 4, and each unit element is divided by a scribe area. In addition, including the scope of claims,
The "scribe area" mentioned in the present invention does not necessarily mean a partition pattern drawn on the surface of the substrate, but is an area to be cut with a dicing blade, etc., and does not require the alignment accuracy of the blade or the kerf loss during cutting. Refers to the virtual partition area width, which is considered as a margin. By dividing the semiconductor substrate within this scribe area (see FIG. 12(a)), each unit element is made into a chip. First, a groove G wider than the width of the scribe area is formed along the scribe area using a dicing blade (FIG. 2(b)). As a method of forming this groove portion G, a rotary grinder having a wider cutting width than a dicing blade may be used.

第2図で示すように、例えばスクライブ領域の幅がW(
例えば100μm)であれば、裏面側から見てこのスク
ライブ領域を含むように、2XW(例えば200μm)
の幅を有する溝部Gを形成する。この場合、溝の深さは
ダイシングブレードの位置精度のバラツキを考慮して個
々に設定されるものであるが、半導体基板の全厚りの1
0分の1程度が一つの目安になる。例えば、半導体装置
の全厚が100μmであれば10μm程度を目安とする
ことができる。次に、半導体基板4の裏面に金属膜5を
真空蒸着法等で形成する(第1図(C))。金属膜5は
、溝部Gの内部にも形成される。その後、半導体基板4
の裏面側に粘着シート6を貼り付け、ダイシングブレー
ド7によりスクライブ領域に沿って切断する(同図(d
))。
As shown in FIG. 2, for example, the width of the scribe area is W(
For example, 100 μm), the 2XW (for example, 200 μm)
A groove G having a width of is formed. In this case, the depth of the groove is set individually taking into account variations in the positional accuracy of the dicing blade, but it is
One guideline is around 1/0. For example, if the total thickness of the semiconductor device is 100 μm, the thickness can be approximately 10 μm. Next, a metal film 5 is formed on the back surface of the semiconductor substrate 4 by vacuum evaporation or the like (FIG. 1(C)). The metal film 5 is also formed inside the groove G. After that, the semiconductor substrate 4
The adhesive sheet 6 is pasted on the back side of the board, and the dicing blade 7 is used to cut it along the scribe area (see (d) in the same figure).
)).

この場合、ダイシングブレード7は裏面に形成された溝
部Gの底面に到達するが、粘着シート6には接触しない
切り込み深さをとるものとする。
In this case, the dicing blade 7 reaches the bottom of the groove G formed on the back surface, but has a cutting depth that does not contact the adhesive sheet 6.

第3図は、この発明の他の実施例に係る分割方法を示す
ものである。上記実施例との差異は、溝部Gに金属膜5
が形成されていない点である。この場合、溝部Gの部分
をマスクすることにより、溝部Gの内部に金属膜5が蒸
着されることを防止した例である。
FIG. 3 shows a dividing method according to another embodiment of the invention. The difference from the above embodiment is that there is a metal film 5 in the groove G.
is not formed. In this case, this is an example in which the metal film 5 is prevented from being deposited inside the groove G by masking the groove G.

この実施例は、例えば付着膜が非常に硬質で切断が困難
な場合や、逆に付着膜が軟質で展延性に富んでシャープ
な切断がしにくい場合に有用である。
This embodiment is useful, for example, when the adhered film is very hard and difficult to cut, or conversely, when the adhered film is soft and highly malleable and difficult to cut sharply.

前述した実施例によると、金属膜の蒸着前に溝部を予め
形成しておくことにより、粘着シートの界面までジャス
トで切り込まなければならないというクリティカルな条
件を緩和することができ、マージンの大きいダイシング
工程で切断を確実に行うことができる。
According to the above-mentioned embodiment, by forming the groove in advance before depositing the metal film, it is possible to alleviate the critical condition of having to cut exactly to the interface of the adhesive sheet, allowing dicing with a large margin. Cutting can be performed reliably during the process.

また、切断不良が少なくなるので、拡張分割時に付着膜
の付着強度劣化をまねく不良分割も少なくなる効果があ
り、パッケージにボンディング接着した場合の、チップ
固定の信頼性が増す。
Furthermore, since the number of cutting defects is reduced, the number of defective splits that lead to deterioration of the adhesion strength of the attached film during expansion and splitting is also reduced, and the reliability of chip fixation is increased when the chip is bonded to the package.

さらに、副次的な効果として、分割されたチップを別の
基板へダイボンド実装する場合、チップ底面のエツジが
面取りされているので、はみ出した接着剤(例えば共晶
はんだ)がまわり込み、接着強度が増加する。
Furthermore, as a side effect, when die-bonding a divided chip onto another board, the edges on the bottom of the chip are chamfered, so the adhesive that protrudes (e.g. eutectic solder) wraps around and strengthens the bond. increases.

なお、この発明は上記実施例に限定されるものではない
。例えば、上記実施例では付着膜として金属膜を使用し
ているが金属膜に限定されるものではない。酸化膜、窒
化膜等の絶縁膜でもよい。
Note that this invention is not limited to the above embodiments. For example, in the above embodiments, a metal film is used as the deposited film, but it is not limited to a metal film. An insulating film such as an oxide film or a nitride film may be used.

また、付着膜は単層膜に限定されるものでなく、適当に
選ばれた多層構成の膜であってもよい。
Further, the attached film is not limited to a single layer film, but may be a film having an appropriately selected multilayer structure.

また、上記実施例では基板表裏面に対して直交する方向
で切断する分割方法について説明しているが、例えば斜
めに切断する分割方法にも適用することができる。この
場合、ブレードの切断面と半導体基板の裏面との交差ラ
インを基準として、「スクライブ領域の幅より広い溝」
が設定される。
Furthermore, although the above embodiment describes a dividing method in which the substrate is cut in a direction perpendicular to the front and back surfaces of the substrate, it is also applicable to a dividing method in which the substrate is cut diagonally, for example. In this case, a "groove wider than the width of the scribe area" is created based on the intersection line between the cutting surface of the blade and the back surface of the semiconductor substrate.
is set.

〔発明の効果〕〔Effect of the invention〕

この発明は、以上説明したように構成されているので、
裏面に形成された溝により、切断不良・不良分割を少な
くして付着膜の強度が縁端で劣化することを防止するこ
とができる。
Since this invention is configured as explained above,
The grooves formed on the back surface can reduce defective cutting and defective splitting, and prevent the strength of the deposited film from deteriorating at the edges.

【図面の簡単な説明】[Brief explanation of the drawing]

第1′図は本発明の゛一実施例に係る半導体基板の分割
方法を示す工程図、第2図は本発明に適用できる溝部の
構造例を示す縦断面図、第3図は本発明の他の実施例に
係る半導体基板の分割方法を説明する為の縦断面図、第
4図はブレードで切断されたウェハの切断例を示す縦断
面図、第5図は従来技術の欠点を示す為の工程図である
。 1・・・ウェハ 2.5・・・金属膜、3.6・・・粘
着シート、4・・・′半導体基板、7・・・ダイシング
ブレード、F・・・溝部。
Fig. 1' is a process diagram showing a method for dividing a semiconductor substrate according to an embodiment of the present invention, Fig. 2 is a longitudinal sectional view showing an example of the structure of a groove part applicable to the present invention, and Fig. 3 is a process diagram showing a method of dividing a semiconductor substrate according to an embodiment of the present invention. A vertical cross-sectional view for explaining a semiconductor substrate dividing method according to another embodiment, FIG. 4 is a vertical cross-sectional view showing an example of cutting a wafer cut with a blade, and FIG. This is a process diagram. DESCRIPTION OF SYMBOLS 1... Wafer 2.5... Metal film, 3.6... Adhesive sheet, 4...' semiconductor substrate, 7... Dicing blade, F... Groove part.

Claims (1)

【特許請求の範囲】  裏面に付着膜が形成された半導体基板をスクライブ領
域に沿って切断する半導体基板の分割方法であって、 前記付着膜を形成する前に、前記スクライブ領域の幅よ
り広い溝を前記裏面に形成しておくことを特徴とする半
導体基板の分割方法。
[Scope of Claims] A method for dividing a semiconductor substrate in which a semiconductor substrate having an attached film formed on the back surface is cut along a scribe region, the method comprising: cutting a groove wider than the width of the scribe region before forming the attached film; A method for dividing a semiconductor substrate, characterized in that: is formed on the back surface.
JP1298163A 1989-11-16 1989-11-16 Division of semiconductor substrate Pending JPH03159153A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1298163A JPH03159153A (en) 1989-11-16 1989-11-16 Division of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1298163A JPH03159153A (en) 1989-11-16 1989-11-16 Division of semiconductor substrate

Publications (1)

Publication Number Publication Date
JPH03159153A true JPH03159153A (en) 1991-07-09

Family

ID=17856015

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1298163A Pending JPH03159153A (en) 1989-11-16 1989-11-16 Division of semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH03159153A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009105211A (en) * 2007-10-23 2009-05-14 Disco Abrasive Syst Ltd Dividing method for wafer
JP2011035111A (en) * 2009-07-31 2011-02-17 Disco Abrasive Syst Ltd Method of manufacturing chip with metal layer
JP5017861B2 (en) * 2003-06-06 2012-09-05 日立化成工業株式会社 Adhesive sheet and dicing tape integrated adhesive sheet
JP2018113394A (en) * 2017-01-13 2018-07-19 株式会社ディスコ Method for processing wafer

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5017861B2 (en) * 2003-06-06 2012-09-05 日立化成工業株式会社 Adhesive sheet and dicing tape integrated adhesive sheet
US8617930B2 (en) 2003-06-06 2013-12-31 Hitachi Chemical Co., Ltd. Adhesive sheet, dicing tape integrated type adhesive sheet, and method of producing semiconductor device
JP2009105211A (en) * 2007-10-23 2009-05-14 Disco Abrasive Syst Ltd Dividing method for wafer
JP2011035111A (en) * 2009-07-31 2011-02-17 Disco Abrasive Syst Ltd Method of manufacturing chip with metal layer
JP2018113394A (en) * 2017-01-13 2018-07-19 株式会社ディスコ Method for processing wafer

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