JPS6161085B2 - - Google Patents

Info

Publication number
JPS6161085B2
JPS6161085B2 JP53127491A JP12749178A JPS6161085B2 JP S6161085 B2 JPS6161085 B2 JP S6161085B2 JP 53127491 A JP53127491 A JP 53127491A JP 12749178 A JP12749178 A JP 12749178A JP S6161085 B2 JPS6161085 B2 JP S6161085B2
Authority
JP
Japan
Prior art keywords
signal
electrode
scanning
liquid crystal
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53127491A
Other languages
Japanese (ja)
Other versions
JPS5553395A (en
Inventor
Yasuhiko Kudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suwa Seikosha KK
Original Assignee
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suwa Seikosha KK filed Critical Suwa Seikosha KK
Priority to JP12749178A priority Critical patent/JPS5553395A/en
Publication of JPS5553395A publication Critical patent/JPS5553395A/en
Publication of JPS6161085B2 publication Critical patent/JPS6161085B2/ja
Granted legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明は液晶マトリクス表示装置、特に映像輝
度信号により情報が与えられる画像を表示する液
晶マトリクス表示装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a liquid crystal matrix display device, and more particularly to a liquid crystal matrix display device for displaying an image whose information is provided by a video luminance signal.

現在、テレビを初めとする画像表示装置として
実用的なものにブラウン管があるが、その構造か
らブラウン管を用いた表示装置は奥行きが大きく
なり、また電子線を発生させる為のヒーター、電
子線を加速する高圧回路、偏向回路等大きな電力
を必要とする。そこで最近薄型、低消費電力の表
示装置として液晶を用いたマトリクス表示装置が
種々発表されているが、その多くは映像輝度信号
をデジタル符号化し、そのデジタル符号に従つて
パルス幅変調などにより各画素の輝度を制御する
方式がとられている。第1図にその構成の一例を
示す。映像輝度信号8はアナログ−デジタル変換
器(以下A−D変換器と略記する)1によつて符
号化され、シフトレジスタによつて構成されるラ
インメモリ2へ転送される。このデータに従つて
信号電極駆動回路3によりパルス幅変調などの操
作を受け信号電極7が駆動される。第9図にパル
ス幅変調による駆動電圧波形の一例を示す。aは
ある走査電極に加えられる電圧波形、bはある信
号電極に加えられる電圧波形を示し、cは前記の
走査電極と信号電極で作られる画素における、液
晶の駆動電圧波形を示している。
Currently, cathode ray tubes are a practical image display device for televisions and other devices, but due to their structure, display devices using cathode ray tubes have a large depth, and they also require a heater to generate electron beams to accelerate the electron beams. High voltage circuits, deflection circuits, etc. require large amounts of power. Recently, various matrix display devices using liquid crystals have been announced as thin, low power consumption display devices, but most of them digitally encode the video luminance signal, and each pixel is modulated according to the digital code by pulse width modulation. A method is used to control the brightness of the FIG. 1 shows an example of its configuration. The video luminance signal 8 is encoded by an analog-to-digital converter (hereinafter abbreviated as AD converter) 1 and transferred to a line memory 2 constituted by a shift register. In accordance with this data, the signal electrode drive circuit 3 drives the signal electrode 7 by performing operations such as pulse width modulation. FIG. 9 shows an example of a drive voltage waveform by pulse width modulation. a shows a voltage waveform applied to a certain scanning electrode, b shows a voltage waveform applied to a certain signal electrode, and c shows a driving voltage waveform of the liquid crystal in a pixel formed by the above-mentioned scanning electrode and signal electrode.

ここで通常のテレビジヨンの画像を表示する場
合について考えると、映像輝度信号8は第2図に
示すようになつており、水平走査周期11は約
63.5マイクロ秒、帰線消去時間を除く輝度情報部
分12は約52.7マイクロ秒となつている。信号電
極の数を仮りに100本とすれば、A−D変換器1
からラインメモリ2へのデータ転送速度は周期が
約527ナノ秒となり、A−D変換器1の変換時間
は527ナノ秒以下であることが要求される。この
ような変換時間をもつA−D変換器は、現在の技
術では非常に高速型のA−D変換器に分類され
る。
If we consider the case where a normal television image is displayed, the video luminance signal 8 is as shown in FIG. 2, and the horizontal scanning period 11 is approximately
The brightness information portion 12 excluding the blanking time is approximately 52.7 microseconds. If the number of signal electrodes is 100, then A-D converter 1
The data transfer rate from the line memory 2 to the line memory 2 has a period of about 527 nanoseconds, and the conversion time of the A/D converter 1 is required to be 527 nanoseconds or less. An A/D converter having such a conversion time is classified as a very high speed A/D converter according to current technology.

次に、A−D変換器を使用しない従来の液晶マ
トリクス表示装置の例としては、第10図に原理
を示す方式がある。輝度信号を各画素に対応した
タイミングでラツチした電圧を信号線41に与
え、走査線42によつてトランジスタ43を順次
ONさせて各画素の輝度に応じた電荷量をコンデ
ンサ44に充電する。このコンデンサ44の電極
が各画素の液晶駆動用電極と兼ねるように形成
し、マトリクス表示を行なう。しかしこの方式は
各画素毎にトランジスタを配置する必要があり、
特にテレビのように画素数の多いマトリクス表示
装置を欠陥なく得ることは非常に困難である。
Next, as an example of a conventional liquid crystal matrix display device that does not use an AD converter, there is a system whose principle is shown in FIG. A voltage obtained by latching the luminance signal at a timing corresponding to each pixel is applied to the signal line 41, and the transistor 43 is sequentially activated by the scanning line 42.
When turned on, the capacitor 44 is charged with an amount of charge corresponding to the brightness of each pixel. The electrode of this capacitor 44 is formed so as to also serve as a liquid crystal driving electrode for each pixel to perform matrix display. However, this method requires a transistor to be placed for each pixel.
In particular, it is extremely difficult to obtain a matrix display device with a large number of pixels, such as a television, without defects.

本発明の目的は、映像輝度信号により与えられ
る画像を表示する液晶マトリクス表示装置を、A
−D変換器を使用せずに、単純な電極構造で提供
することである。
An object of the present invention is to provide a liquid crystal matrix display device that displays an image given by a video luminance signal.
- Provide a simple electrode structure without using a D converter.

次に本発明を一実施例に従つて説明する。本実
施例では普通のテレビ画像を表示するものとし、
走査電極6が48本、信号電極7が64本の場合につ
いて説明する。第4図は本発明の構成を示す図で
ある。本発明の原理は、一般的なマトリクス表示
に於て、液晶を介した走査電極全体に対して信号
電極が1本あたり数100pF以上の静電容量を持つ
点に注目し、信号電極自身に電荷を保持させよう
とするものである。
Next, the present invention will be explained according to one embodiment. In this example, a normal TV image is displayed,
A case where there are 48 scanning electrodes 6 and 64 signal electrodes 7 will be explained. FIG. 4 is a diagram showing the configuration of the present invention. The principle of the present invention is based on the fact that in a general matrix display, each signal electrode has a capacitance of several hundred pF or more relative to the entire scanning electrode via the liquid crystal, and the signal electrode itself has a capacitance of several hundred pF or more. It is intended to maintain the .

増幅回路21は第5図に示す構成とし、出力の
レベルは走査信号C1〜C48の非選択電圧V2がほぼ
中心となり、信号電極7に直接印加された場合、
電圧平均化法によるマトリクス表示に適した振幅
V1〜V3を持つ様に可変抵抗24,25,26,
27によつて調整される。また液晶の交流駆動の
ために映像輝度信号8の反転、非反転それぞれの
信号を、スイツチ28,29及び交流駆動信号3
0によつて選択し信号電極印加信号31とする。
The amplifier circuit 21 has the configuration shown in FIG. 5, and the output level is centered around the non-selection voltage V 2 of the scanning signals C 1 to C 48 , and when applied directly to the signal electrode 7,
Amplitude suitable for matrix display using voltage averaging method
Variable resistors 24, 25, 26, so as to have V 1 to V 3
27. In addition, for alternating current driving of the liquid crystal, inverting and non-inverting signals of the video luminance signal 8 are sent to the switches 28 and 29 and the alternating current driving signal 3.
0 is selected as the signal electrode application signal 31.

次にスイツチ部23は、第6図に示すように各
スイツチSW1〜SW64はスイツチ制御信号d1,d2
…………d64により制御され、第7図に示すよう
にテレビの水平走査に同期して順次ON、OFFさ
れる。このときスイツチのON抵抗を100Ω、信号
電極の静電容量を1000pF程度とすれば充電時の
時定数は100ナノ程度であり、ひとつのスイツチ
がONしている期間約820ナノ秒の間に信号電極は
充分に充電される。またこの程度の時定数におい
ては信号電極の数は527本まで増加可能である。
また、スイツチがOFFしている期間は、テレビ
の水平走査毎に充電を行なう場合で周期が約63.5
マイクロ秒、マトリクスの線走査毎に充電を行な
う場合で約317マイクロ秒である。先に述べた様
に静電容量が数100pFあるので、スイツチOFF
時のインピーダンスが液晶自身の直流抵抗分等も
含めて1MΩ以上あれば信号電極の電位は保持さ
れ、この程度のインピーダンスは容易に実現され
る。
Next , in the switch section 23 , as shown in FIG .
...... d64 , and is turned ON and OFF sequentially in synchronization with the horizontal scanning of the television as shown in FIG. At this time, if the ON resistance of the switch is 100Ω and the capacitance of the signal electrode is about 1000pF, the time constant during charging is about 100 nanoseconds, and the signal is generated during the approximately 820 nanoseconds that one switch is ON. The electrodes are fully charged. Furthermore, with a time constant of this level, the number of signal electrodes can be increased to 527.
Also, during the period when the switch is OFF, the cycle is approximately 63.5 when charging is performed every horizontal scan of the TV.
microseconds, which is approximately 317 microseconds when charging is performed every matrix line scan. As mentioned earlier, the capacitance is several 100 pF, so turn the switch OFF.
If the impedance at the time is 1 MΩ or more, including the DC resistance of the liquid crystal itself, the potential of the signal electrode is maintained, and this level of impedance can be easily achieved.

ここで、映像信号31、走査信号c1電極S1
ONするスイツチ制御信号d1、及び電極S1と電極
c1の交点に印加される信号53との関係について
第11図に示す。即ち、電極S1にはスイツチ制御
信号d1によつてSW1がONされることにより映像
信号31のうちのSW1のONの間の瞬間の電圧が
印加される。この印加電圧時間51は約820+1
秒である。
Here, video signal 31, scanning signal c 1 electrode S 1
Switch control signal d 1 to turn on, and electrode S 1 and electrode
The relationship with the signal 53 applied to the intersection of c1 is shown in FIG. That is, when SW 1 is turned on by the switch control signal d 1 , a voltage is applied to the electrode S 1 at the moment when SW 1 of the video signal 31 is turned on. This applied voltage time 51 is approximately 820+1
Seconds.

この電圧は、次のON信号まで電極S1に保持さ
れ、この保持時間は、約63.5マイクロ秒である。
本実施例においては走査信号c1の選択期間の間に
スイツチ制御信号d1は、5回分スイツチSW1
ONされるため、映像信号31の5回分の水平走
査の平均電圧が液晶に印加される。これは、水平
走査電極Cが本実施例では48本あり、48×5=
240本に相当する映像信号31の水平信号本数に
対応するためである。水平解像力をあげるために
は電極数Cを増やし、走査信号c1の選択期間を短
かくしてもよい。
This voltage is held at electrode S 1 until the next ON signal, and this holding time is approximately 63.5 microseconds.
In this embodiment, during the selection period of the scanning signal c1 , the switch control signal d1 is switched 5 times by the switch SW1 .
Since it is turned on, the average voltage of five horizontal scans of the video signal 31 is applied to the liquid crystal. This means that there are 48 horizontal scanning electrodes C in this embodiment, and 48×5=
This is to accommodate the number of horizontal signals of the video signal 31, which is equivalent to 240 lines. In order to increase the horizontal resolution, the number of electrodes C may be increased and the selection period of the scanning signal c1 may be shortened.

また、他の実施例を第3図に示す。この例は映
像輝度信号8を、アナログ量のままアナログメモ
リ部13に保持して信号電極7に印加することに
より画像を表示するものである。アナログメモリ
部13は、サンプリングスイツチ15、コンデン
サ16、およびバツフアーアンプ17により、い
わゆるサンプルホールド回路を形成し、制御回路
8で発生される制御信号14によりサンプルスイ
ツチ15がON、OFFされる。この例によれば、
前記実施例に比べて、サンプリングスイツチ15
がONのとき信号電極に印加される電圧は同じで
あるが、OFFのときの信号電極の電圧が安定に
なるという特長がある。
Further, another embodiment is shown in FIG. In this example, an image is displayed by retaining the video luminance signal 8 as an analog quantity in the analog memory section 13 and applying it to the signal electrode 7. The analog memory section 13 forms a so-called sample hold circuit with a sampling switch 15, a capacitor 16, and a buffer amplifier 17, and the sampling switch 15 is turned on and off by a control signal 14 generated by the control circuit 8. According to this example:
Compared to the previous embodiment, the sampling switch 15
The voltage applied to the signal electrode is the same when it is ON, but the voltage applied to the signal electrode is stable when it is OFF.

以上述べた様に、本発明によれば、映像輝度信
号から液晶マトリクス表示装置で画像を表示する
際に、高価で消費電力の大きいA−D変換器を用
いることなく、また単純な電極構造で表示装置が
実現できる。
As described above, according to the present invention, an image can be displayed on a liquid crystal matrix display device from a video luminance signal without using an expensive and power-consuming A-D converter, and with a simple electrode structure. A display device can be realized.

以上の如く本発明は、一対の基板間に液晶が封
入され、該基板の一方の基板上又は両方の基板上
に複数の走査電極及び複数の信号電極がマトリク
ス状に形成され、各走査電極と各信号電極との交
点には画素電極が形成されてなる液晶表示装置に
おいて、各走査電極に印加される走査信号毎に映
像信号を時系列的にサンプリングして該信号電極
に供給するサンプリング手段を有し、該信号電極
は該サンプリング手段がON状態で該映像信号が
充電され、該サンプリング手段がOFF状態で該
映像信号の電位が保持されるようにしたから、テ
レビの如く画素数の多いマトリクスからなる表示
装置であつても簡単な電極構造で確実な画像表示
を得る事ができる。
As described above, in the present invention, a liquid crystal is sealed between a pair of substrates, a plurality of scanning electrodes and a plurality of signal electrodes are formed in a matrix on one or both of the substrates, and each scanning electrode and In a liquid crystal display device in which a pixel electrode is formed at the intersection with each signal electrode, a sampling means is provided that samples a video signal in time series for each scanning signal applied to each scanning electrode and supplies it to the signal electrode. The signal electrode is charged with the video signal when the sampling means is in the ON state, and the potential of the video signal is held when the sampling means is in the OFF state. Even if the display device consists of the following, reliable image display can be obtained with a simple electrode structure.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はA−D変換器を用いた液晶マトリクス
表示装置の構成、第2図は映像輝度信号、第3図
はアナログメモリを用いた本発明の一実施例、第
4図は本発明による液晶マトリクス表示装置の構
成例、第5図は増幅回路21の具体例、第6図は
スイツチ部23の具体例、第7図は信号電極印加
信号31とスイツチ制御信号d1〜d64との関係、
第8図は信号電極印加信号31と走査信号C1
C48との関係、第9図はパルス幅変調による駆動
波形の例、第9図aは走査電圧波形、第9図bは
信号電圧波形、第9図cは液晶に加わる電圧波
形、第10図は各画素毎に付加されたトランジス
タにより充電を行いマトリクス表示する方式の原
理図をそれぞれ示している。第11図は、映像信
号、走査信号、液晶印加信号の関係を示す波形図
である。 1……A−D変換器、2……ラインメモリ、3
……信号電極駆動回路、4……走査電極駆動回
路、5……制御回路A、6……走査電極、7……
信号電極、8……映像輝度信号、9……同期信
号、11……水平走査周期、13……アナログメ
モリ部、18……制御回路B、21……増幅回
路、22……制御回路C、23……スイツチ部。
Fig. 1 shows the configuration of a liquid crystal matrix display device using an A-D converter, Fig. 2 shows a video luminance signal, Fig. 3 shows an embodiment of the present invention using an analog memory, and Fig. 4 shows the structure according to the present invention. A configuration example of a liquid crystal matrix display device, FIG. 5 shows a specific example of the amplifier circuit 21, FIG. 6 shows a specific example of the switch section 23, and FIG . relationship,
FIG. 8 shows the signal electrode applied signal 31 and the scanning signal C 1 ~
Relationship with C 48 , Figure 9 is an example of a drive waveform by pulse width modulation, Figure 9a is a scanning voltage waveform, Figure 9b is a signal voltage waveform, Figure 9c is a voltage waveform applied to the liquid crystal, Figure 9c is a voltage waveform applied to the liquid crystal, The figures each show a principle diagram of a system in which charging is performed using a transistor added to each pixel and matrix display is performed. FIG. 11 is a waveform diagram showing the relationship between the video signal, the scanning signal, and the liquid crystal application signal. 1...A-D converter, 2...Line memory, 3
...Signal electrode drive circuit, 4...Scanning electrode drive circuit, 5...Control circuit A, 6...Scanning electrode, 7...
Signal electrode, 8...Video luminance signal, 9...Synchronization signal, 11...Horizontal scanning period, 13...Analog memory section, 18...Control circuit B, 21...Amplification circuit, 22...Control circuit C, 23...Switch part.

Claims (1)

【特許請求の範囲】[Claims] 1 一対の基板間に液晶が封入され、該基板の一
方の基板上又は両方の基板上に複数の走査電極及
び複数の信号電極がマトリクス状に形成され、各
走査電極と各信号電極との交点には画素電極が形
成されてなる液晶表示装置において、各走査電極
に印加される走査信号毎に映像信号を時系列的に
サンプリングして該信号電極に供給するサンプリ
ング手段を有し、該信号電極は該サンプリング手
段がON状態で該映像信号が充電され、該サンプ
リング手段がOFF状態で該映像信号の電位が保
持される事を特徴とする液晶表示装置。
1 A liquid crystal is sealed between a pair of substrates, a plurality of scanning electrodes and a plurality of signal electrodes are formed in a matrix on one or both of the substrates, and the intersections of each scanning electrode and each signal electrode are formed on one or both of the substrates. A liquid crystal display device in which pixel electrodes are formed includes a sampling means for sampling a video signal in time series for each scanning signal applied to each scanning electrode and supplying the sampled signal to the signal electrode. The liquid crystal display device is characterized in that the video signal is charged when the sampling means is in an ON state, and the potential of the video signal is held when the sampling means is in an OFF state.
JP12749178A 1978-10-17 1978-10-17 Liquid crystal display unit Granted JPS5553395A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12749178A JPS5553395A (en) 1978-10-17 1978-10-17 Liquid crystal display unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12749178A JPS5553395A (en) 1978-10-17 1978-10-17 Liquid crystal display unit

Publications (2)

Publication Number Publication Date
JPS5553395A JPS5553395A (en) 1980-04-18
JPS6161085B2 true JPS6161085B2 (en) 1986-12-24

Family

ID=14961261

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12749178A Granted JPS5553395A (en) 1978-10-17 1978-10-17 Liquid crystal display unit

Country Status (1)

Country Link
JP (1) JPS5553395A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4974438A (en) * 1972-10-10 1974-07-18
JPS5234919A (en) * 1975-09-11 1977-03-17 Kitasato Inst:The Manufacture of deactivated vaccine for akabane-virus infections

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4974438A (en) * 1972-10-10 1974-07-18
JPS5234919A (en) * 1975-09-11 1977-03-17 Kitasato Inst:The Manufacture of deactivated vaccine for akabane-virus infections

Also Published As

Publication number Publication date
JPS5553395A (en) 1980-04-18

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