JPH0713521A - Driving method for ferroelectric liquid crystal device - Google Patents
Driving method for ferroelectric liquid crystal deviceInfo
- Publication number
- JPH0713521A JPH0713521A JP15210693A JP15210693A JPH0713521A JP H0713521 A JPH0713521 A JP H0713521A JP 15210693 A JP15210693 A JP 15210693A JP 15210693 A JP15210693 A JP 15210693A JP H0713521 A JPH0713521 A JP H0713521A
- Authority
- JP
- Japan
- Prior art keywords
- selection
- reset
- pulses
- pulse
- selection period
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、強誘電性液晶装置の駆
動方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a ferroelectric liquid crystal device.
【0002】[0002]
【従来の技術】例えばカイラルスメクチックC(SmC
* )相等の強誘電性液晶を用いた液晶素子を時分割で2
値表示駆動する時分割駆動方法として、従来は1回の書
込み動作(1フレーム)を2つのフィールドに分割し、
第1フィールドで一方の安定状態の選択をし、第2フィ
ールドでは他方の安定状態の選択を行なう2フィールド
書込み法、選択期間内に4個以上のパルスを印加して一
方の状態のリセットと書込みを行なう4パルス法、選択
時間内に表示状態を一方の状態にリセットするパルスを
印加した後、この状態を保持するべく閾値電圧以下のパ
ルスか、あるいは他方の状態にするべく閾値電圧以上の
パルスを印加する1フレームリセット書込み法等があっ
た。2. Description of the Related Art For example, chiral smectic C (SmC
* ) Phase-divided liquid crystal element using ferroelectric liquid crystal
As a time-division driving method for driving value display, conventionally, one writing operation (one frame) is divided into two fields,
A two-field write method in which one stable state is selected in the first field and the other stable state is selected in the second field, resetting and writing one state by applying four or more pulses during the selection period. 4-pulse method, which applies a pulse that resets the display state to one state within the selected time, and then a pulse below the threshold voltage to maintain this state, or a pulse above the threshold voltage to maintain the other state There was a one-frame reset writing method for applying the voltage.
【0003】[0003]
【発明が解決しようとする課題】しかるに、上記2フィ
ールド法では、選択されない一方のフィールドでは書込
み動作が行なわれないので、変化の多い表示ではちらつ
き(フリッカ)が目立ちやすく、また、2つの安定状態
の閾値電圧が等しくなければならないという問題があっ
た。さらにこの2フィールド法では、一走査線の選択時
間は液晶の応答時間の4倍以上必要となるために、高速
書込みには不利である。However, in the above-mentioned two-field method, since the writing operation is not performed in one of the unselected fields, flicker is conspicuous in the display with many changes, and the two stable states are not noticeable. There was a problem that the threshold voltages of the two must be equal. Further, in the two-field method, the selection time for one scanning line needs to be four times or more the response time of the liquid crystal, which is disadvantageous for high-speed writing.
【0004】また、上記4パルス法は、表示のちらつき
や閾値特性の非対称性の問題を軽減できるが、やはり書
込みに必要な時間が長くなり、高速書込みには向いてい
ない。The four-pulse method can alleviate the problems of display flicker and asymmetry of threshold characteristics, but it also requires a long time for writing and is not suitable for high-speed writing.
【0005】さらに、上記1フレームリセット書込み法
は、駆動波形が電荷的にかたよりを生じるために好まし
くないという欠点があった。本発明は上記のような実情
に鑑みてなされたもので、その目的とするところは、高
速書込みが可能で表示のちらつきが小さく、電荷のかた
よりを生じずに安定して動作する強誘電性液晶装置の駆
動方法を提供することにある。Further, the one-frame reset writing method has a drawback that it is not preferable because the drive waveform causes a bias in charge. The present invention has been made in view of the above circumstances, and an object thereof is to provide a ferroelectric liquid crystal capable of high-speed writing, small display flicker, and stable operation without causing a bias of charges. It is to provide a driving method of the device.
【0006】[0006]
【課題を解決するための手段及び作用】すなわち本発明
は、走査信号電圧の選択期間の直前の非選択期間に当該
走査電極にリセットパルスを印加し、当該画素の一方の
配向状態を設定すると共に、該リセットパルスと選択パ
ルスとで電荷的なかたよりを補正するようにしたもの
で、走査時間を短くして高速書込みを可能とし、且つ、
表示のちらつきを充分小さくさせると共に、電荷のかた
よりをなくして安定した表示駆動を行なうことができ
る。That is, according to the present invention, a reset pulse is applied to the scan electrode in the non-selection period immediately before the selection period of the scan signal voltage to set one alignment state of the pixel. The correction bias is corrected by the reset pulse and the selection pulse, and the scanning time is shortened to enable high-speed writing, and
It is possible to make the display flickering sufficiently small and to eliminate the bias of the electric charge to perform stable display driving.
【0007】[0007]
【実施例】以下図面を参照して本発明の一実施例を説明
する。図1はマトリックス構造を有する強誘電性液晶装
置の電極構成を例示し、11がコモン電極群、12がセグメ
ント電極群、C1,C2,…が個々のコモン電極、S
1,S2,…が個々のセグメント電極、a1 ,a2 ,
…,b1 ,b2 ,…,c1,c2 ,…,d1 ,d2 ,
…,e1 ,e2 ,…がそれぞれ画素部を示す。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 illustrates an electrode configuration of a ferroelectric liquid crystal device having a matrix structure, 11 is a common electrode group, 12 is a segment electrode group, C1, C2, ...
1, S2, ... are individual segment electrodes, a1, a2,
..., b1, b2, ..., c1, c2, ..., d1, d2,
, E1, e2, ... Represent pixel portions.
【0008】上記のような電極構成にあって、コモン電
極C1,C2,…、セグメント電極S1,S2,…にそ
れぞれ印加される駆動信号波形は図2に示すようにな
る。すなわち、コモン電極C1,C2,…のそれぞれに
対しては、1フレームTf中の先頭タイミングで選択時
間tsに−V0 からV0 に変化する選択パルスを印加す
る一方、1フレームTf中の最終タイミング、すなわ
ち、次のフレームの選択パルスの直前位置にリセット時
間trsを配し、V0 から−V0 に変化するリセットパ
ルスを印加する。In the electrode configuration as described above, the drive signal waveforms applied to the common electrodes C1, C2, ... And the segment electrodes S1, S2 ,. That is, to each of the common electrodes C1, C2, ..., A selection pulse changing from −V0 to V0 is applied at the selection timing ts at the leading timing in one frame Tf, while the final timing in one frame Tf, That is, the reset time trs is arranged immediately before the selection pulse of the next frame, and the reset pulse changing from V0 to -V0 is applied.
【0009】これに対して、例えばセグメント電極S1
にはVb 〜−Vb 間で変化する常時オンを繰返す信号
を、セグメント電極S2には同じくオンとオフを交互に
繰返す信号を、そして、セグメント電極S3には同じく
常時オフを繰返す信号をそれぞれ印加したものとする。On the other hand, for example, the segment electrode S1
Is applied to the segment electrode S2, a signal to be repeatedly turned on and off alternately, and a signal to be repeatedly turned off to the segment electrode S3. I shall.
【0010】図3は図2に示すような波形のコモン信
号、セグメント信号が与えられた場合の各電極における
合成波形を示すものである。同図(1)〜(3)に示す
ように、画素部a2 ,b2 ,c2 のいずれにおいても、
選択時間tsの直前のリセット時間trsに電圧「−
(V0 +Vb )」のリセットパルスが印加される。ここ
で、電圧V0 +Vb が第1の安定状態を選択するための
閾値電圧Vth1 よりも高く、且つ、電圧V0 −Vb がこ
の閾値電圧Vth1 よりも小さくなるように設定する。ま
た、第2の安定状態を得るための閾値電圧の絶対値|V
th2 |よりも大きくなるようにリセットパルスの電圧値
を設定しておくと、リセットパルスによって常にこの第
2の状態にリセットされることになる。したがって、互
いに逆位相の双極性パルスを選択時間に同期してセグメ
ント電極に印加してやれば、オンまたはオフ状態を任意
に選択することができると共に、図示する如くリセット
パルスと選択パルスとを合わせることで電荷的なかたよ
りを補正することができる。FIG. 3 shows a composite waveform at each electrode when a common signal and a segment signal having the waveforms shown in FIG. 2 are given. As shown in (1) to (3) of the same drawing, in any of the pixel portions a2, b2, c2,
At the reset time trs immediately before the selection time ts, the voltage "-
A reset pulse of (V0 + Vb) "is applied. Here, the voltage V0 + Vb is set to be higher than the threshold voltage Vth1 for selecting the first stable state, and the voltage V0-Vb is set to be lower than this threshold voltage Vth1. In addition, the absolute value of the threshold voltage for obtaining the second stable state | V
If the voltage value of the reset pulse is set to be larger than th2 |, the reset pulse will always reset to this second state. Therefore, if bipolar pulses having mutually opposite phases are applied to the segment electrodes in synchronization with the selection time, it is possible to arbitrarily select the on or off state, and by combining the reset pulse and the selection pulse as shown in the figure. It is possible to correct the charge bias.
【0011】[0011]
【発明の効果】以上詳記した如く本発明によれば、走査
信号電圧の選択期間の直前の非選択期間に当該走査電極
にリセットパルスを印加し、当該画素の一方の配向状態
を設定すると共に、該リセットパルスと選択パルスとで
電荷的なかたよりを補正するようにしたので、走査時間
を短くして高速書込みを可能とし、且つ、表示のちらつ
きを充分小さくすると共に、電荷のかたよりをなくして
安定した表示駆動を行なうことが可能な強誘電性液晶装
置の駆動方法を提供することができる。As described above in detail, according to the present invention, a reset pulse is applied to the scan electrode in the non-selection period immediately before the selection period of the scan signal voltage to set one orientation state of the pixel. Since the charge bias is corrected by the reset pulse and the selection pulse, the scanning time can be shortened to enable high-speed writing, and the display flicker can be sufficiently reduced and the charge bias can be eliminated. It is possible to provide a driving method of a ferroelectric liquid crystal device capable of performing stable display driving.
【図1】本発明の一実施例に係るマトリックス構造の強
誘電性液晶装置の電極構成を示す図。FIG. 1 is a diagram showing an electrode configuration of a ferroelectric liquid crystal device having a matrix structure according to an embodiment of the present invention.
【図2】図1のコモン電極及びセグメント電極に印加さ
れる信号波形を示すタイミングチャート。2 is a timing chart showing signal waveforms applied to the common electrode and the segment electrode of FIG.
【図3】図2の信号波形による各画素部での合成信号波
形を示すタイミングチャート。FIG. 3 is a timing chart showing a composite signal waveform in each pixel portion according to the signal waveform of FIG.
11…コモン電極群、12…セグメント電極群、C1,C2
…コモン電極、S1,S2…がセグメント電極、a1 ,
a2 ,b1 ,b2 ,c1 ,c2 ,d1 ,d2 ,e1 ,e
2 …画素部。11 ... Common electrode group, 12 ... Segment electrode group, C1, C2
... common electrodes, S1, S2 ... are segment electrodes, a1,
a2, b1, b2, c1, c2, d1, d2, e1, e
2 ... Pixel part.
Claims (1)
期間に当該走査電極にリセットパルスを印加し、当該画
素の一方の配向状態を設定すると共に、該リセットパル
スと選択パルスとで電荷的なかたよりを補正することを
特徴とする強誘電性液晶装置の駆動方法。1. A reset pulse is applied to the scan electrode in a non-selection period immediately before a selection period of a scan signal voltage to set one alignment state of the pixel, and the reset pulse and the selection pulse are electrically charged. A method for driving a ferroelectric liquid crystal device, which comprises correcting the bias.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15210693A JPH0713521A (en) | 1993-06-23 | 1993-06-23 | Driving method for ferroelectric liquid crystal device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15210693A JPH0713521A (en) | 1993-06-23 | 1993-06-23 | Driving method for ferroelectric liquid crystal device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0713521A true JPH0713521A (en) | 1995-01-17 |
Family
ID=15533189
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15210693A Pending JPH0713521A (en) | 1993-06-23 | 1993-06-23 | Driving method for ferroelectric liquid crystal device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0713521A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100331730B1 (en) * | 1999-03-18 | 2002-04-09 | 가타오카 마사타카 | Liquid crystal display apparatus and driving method thereof |
KR100401377B1 (en) * | 2001-07-09 | 2003-10-17 | 엘지.필립스 엘시디 주식회사 | Liquid Crystal Display Device and Driving Method for the same |
KR100526633B1 (en) * | 2001-09-27 | 2005-11-08 | 가시오게산키 가부시키가이샤 | Liquid crystal display apparatus using homogeneously aligned liquid crystal and drive method therefor |
-
1993
- 1993-06-23 JP JP15210693A patent/JPH0713521A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100331730B1 (en) * | 1999-03-18 | 2002-04-09 | 가타오카 마사타카 | Liquid crystal display apparatus and driving method thereof |
KR100401377B1 (en) * | 2001-07-09 | 2003-10-17 | 엘지.필립스 엘시디 주식회사 | Liquid Crystal Display Device and Driving Method for the same |
KR100526633B1 (en) * | 2001-09-27 | 2005-11-08 | 가시오게산키 가부시키가이샤 | Liquid crystal display apparatus using homogeneously aligned liquid crystal and drive method therefor |
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