JPH05100637A - Method for driving liquid crystal display device - Google Patents

Method for driving liquid crystal display device

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Publication number
JPH05100637A
JPH05100637A JP26202991A JP26202991A JPH05100637A JP H05100637 A JPH05100637 A JP H05100637A JP 26202991 A JP26202991 A JP 26202991A JP 26202991 A JP26202991 A JP 26202991A JP H05100637 A JPH05100637 A JP H05100637A
Authority
JP
Japan
Prior art keywords
liquid crystal
signal
selection
voltage
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26202991A
Other languages
Japanese (ja)
Other versions
JP3328944B2 (en
Inventor
Yoichi Wakai
洋一 若井
Masasuke Konishi
正祐 小西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
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Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP26202991A priority Critical patent/JP3328944B2/en
Publication of JPH05100637A publication Critical patent/JPH05100637A/en
Application granted granted Critical
Publication of JP3328944B2 publication Critical patent/JP3328944B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Liquid Crystal Display Device Control (AREA)

Abstract

PURPOSE:To saturate a shift in I/V characteristics of a nonlinear element, to equalize write conditions of charges to a liquid crystal layer as to all picture elements on a screen, and to preclude an after-image phenomenon by applying a large voltage right before a selection period while its polarity is inverted plural times. CONSTITUTION:Column electrodes Xm and row electrodes Yn are formed on opposite substrates and a nonlinear element 116 and a liquid crystal layer 115 are arranged in series at each fulcrum. The shift register start signal DY of a Y driver 102 is shifted as a shift locking signal YSCL falls and a selective signal is transferred exactly according to its width. The DY is as wide as four clocks, so the selective signal also has the clock width (four selection periods) of the YSCL4. In this period, a voltage which is larger than that in a normal selection period is applied. Since FR performs one-line inversion driving which causes inversion at each selection period, so an AC inverted signal has the dummy signal of three selection periods before a signal is actually selected and the polarity is changed three times.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は液晶表示装置の駆動法に
関し、特には二端子型アクティブ・マトリクス液晶表示
装置の駆動法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a liquid crystal display device, and more particularly to a method of driving a two-terminal type active matrix liquid crystal display device.

【0002】[0002]

【従来の技術】アクティブ・マトリクス型液晶表示装置
は、従来のパッシブ型に比較して高コントラストが得ら
れるため、各種のディスプレイ応用分野での採用がさか
んである。採用されているアクティブ素子は二端子型と
三端子型と二種類あるが、二端子型の方が経済面での優
位性があると考えられている。
2. Description of the Related Art Since an active matrix type liquid crystal display device can obtain a higher contrast than a conventional passive type liquid crystal display device, it is often used in various display application fields. There are two types of active elements used, the two-terminal type and the three-terminal type, and it is considered that the two-terminal type is more economically advantageous.

【0003】二端子型アクティブ素子としては、MIM
(Metal−Insulator−Metal)、M
IS(Metal−Insulator−Semico
nductor)、リング・ダイオード、バリスタ等が
採用されている。
As a two-terminal type active element, MIM
(Metal-Insulator-Metal), M
IS (Metal-Insulator-Semico)
Ndductor), ring diode, varistor, etc. are adopted.

【0004】一般にアクティブ・マトリクス型液晶表示
装置に採用されている二端子型アクティブ素子は、図2
のようなI−V特性を有している。すなわち、印加電圧
に対しての非線形な電流特性によるスイッチング機能を
利用して、画素への有効な電荷の充放電を行なうわけで
ある。
A two-terminal type active element generally used in an active matrix type liquid crystal display device is shown in FIG.
It has the following IV characteristics. That is, the switching function based on the non-linear current characteristic with respect to the applied voltage is used to effectively charge and discharge the pixel.

【0005】図3は二端子型アクティブ・マトリクス液
晶表示装置の駆動波形図である。FRは交流反転信号を
示し、Xm,Ynはそれぞれ液晶パネルの列側駆動回路
と行側駆動回路(以後それぞれをXドライバ,Yドライ
バと呼ぶ。)の出力信号を示し、Xm−Ynはm列n行
の交点に位置する画素に印加される信号を示す。(図1
の液晶パネル部を参照。Xm−Ynは、実際には二端子
素子116と液晶層115とに印加される。)Tsは選
択期間を、Thは非選択期間を示す。FR=[0]での
Xmは、OFFレベル(Voff)として−Vaを、O
Nレベル(Von)としてVaをとり、FR=[1]で
は、OFFレベルとしてVaを、ONレベルとして−V
aをとる。ビデオ信号のレベルに応じてVonとVof
fの比は変化し、PWM(パルス幅変調)による中間調
を含む表示が可能となる。Ynは選択期間Tsにおい
て、FR=[0]では−Vpをとり、FR=[1]では
Vpをとる。非選択期間Thにおいて、−Vpに引き続
く期間では−Vaをとり、Vpに引き続く期間ではVa
をとる。これにより、差信号Xm−Ynにおいて、正極
性で選択後の非選択期間Thでは正、負極性で選択後の
Thでは負をとるため、選択期間Tsで液晶層115に
書き込まれた電荷が保持される。選択期間Tsでは、非
線形素子116に印加される電圧Vmsは大であるの
で、非線形素子を通して液晶層115に流れ込む電流も
大となり、液晶層の電圧Vlsは上昇する。VlsはX
mのVonとVoffの比できまる。比選択期間Thで
は、非線形素子116に印加される電圧Vmhは相対的
に小さな値であるため、非線形素子を通しての電荷の放
電は少なく、液晶層での電荷の保持は良い。このような
動作に基づき二端子型アクティブ・マトリクス液晶表示
装置の駆動は説明される。
FIG. 3 is a drive waveform diagram of a two-terminal type active matrix liquid crystal display device. FR represents an AC inverted signal, Xm and Yn represent output signals of a column side driving circuit and a row side driving circuit (hereinafter referred to as an X driver and a Y driver, respectively) of the liquid crystal panel, and Xm-Yn are m columns. A signal applied to a pixel located at an intersection of n rows is shown. (Fig. 1
See the LCD panel section of. Xm-Yn is actually applied to the two-terminal element 116 and the liquid crystal layer 115. ) Ts indicates a selection period and Th indicates a non-selection period. Xm at FR = [0] is -Va as the OFF level (Voff), O
Va is taken as the N level (Von), and when FR = [1], Va is taken as the OFF level and -V is taken as the ON level.
Take a. Von and Vof depending on the video signal level
The ratio of f changes, and a display including a halftone by PWM (pulse width modulation) becomes possible. Yn takes -Vp when FR = [0] and Vp when FR = [1] in the selection period Ts. In the non-selection period Th, -Va is taken in the period following -Vp, and Va is taken in the period following Vp.
Take As a result, the difference signal Xm-Yn is positive in the non-selection period Th after selection due to the positive polarity and negative in Th after selection due to the negative polarity, so that the charges written in the liquid crystal layer 115 during the selection period Ts are retained. To be done. During the selection period Ts, the voltage Vms applied to the non-linear element 116 is large, so the current flowing into the liquid crystal layer 115 through the non-linear element also becomes large, and the voltage Vls of the liquid crystal layer rises. Vls is X
The ratio of Von and Voff of m can be calculated. In the ratio selection period Th, the voltage Vmh applied to the non-linear element 116 has a relatively small value, so that the electric charge is less discharged through the non-linear element and the liquid crystal layer retains the electric charge better. The driving of the two-terminal active matrix liquid crystal display device will be described based on such operation.

【0006】[0006]

【発明が解決しようとする課題】しかしながら二端子型
非線形素子、とくにMIM、MIS型の素子には以下に
説明するような特性シフトが存在する。図2において、
I/V1は二端子非線形素子の初期の電圧−電流特性で
あるが、素子に電圧が印加され続けると、I/V2のよ
うに特性がシフトする。(参考文献:E.Mizoba
ta,et al.,SID91 DIGEST,p.
226(1991))特性I/V2は、特性I/V1に
比較して、電圧大時の抵抗が大きくなっており、これは
選択時の液晶層への電荷の書き込みが減少することを意
味する。電圧小時の抵抗はあまり差がなく、非選択時の
液晶層の電荷保持には、あまり差がないことを意味す
る。また、このI/V特性シフトは飽和することが解っ
ている。
However, the two-terminal type non-linear element, especially the MIM or MIS type element, has a characteristic shift as described below. In FIG.
I / V1 is the initial voltage-current characteristic of the two-terminal nonlinear element, but when the voltage is continuously applied to the element, the characteristic shifts like I / V2. (Reference: E. Mizoba
ta, et al. , SID91 DIGEST, p.
226 (1991)) characteristic I / V2 has a larger resistance when the voltage is higher than the characteristic I / V1, which means that writing of charges to the liquid crystal layer at the time of selection is reduced. .. It means that there is not much difference in resistance when the voltage is small, and there is not much difference in charge retention of the liquid crystal layer when not selected. Further, it is known that this I / V characteristic shift is saturated.

【0007】このI/V特性シフトによる表示への影響
について説明する。図4において、表示内容は黒背景に
白の窓表示となっている。画素P1は列電極Xm1と行
電極Ynとの交点に位置し、黒表示である。画素P2は
列電極Xm2と行電極Ynとの交点に位置し、白表示で
ある。次に表示内容が図5のように、画面全体が中間調
表示となった時に、その前の窓表示の内容が残像となっ
て残る。すなわち画素P1の方が画素P2よりも明るく
なる。その理由について図6により説明する。Xm1−
Ynは画素P1に印加される信号、Xm2−Ynは画素
P2に印加される信号である。白表示期間で選択期間T
sにて、画素P2の非線形素子に印加される電圧Vms
Wは、黒表示期間に画素P1の非線形素子に印加される
電圧VmsBより大きい。したがって画素P2の非線形
素子の方がI/V特性のシフト量が大きい。(非選択期
間では、いずれの画素についても非線形素子に印加され
る電圧は相対的に小さい。)そのため、いずれの画素も
中間調表示となった時に、画素P2の非線形素子は画素
P1のものと比較して、大電圧印加時に高抵抗となるよ
うにI/V特性がシフトしているため、選択期間での液
晶層屁の電荷の書き込みがP1に比べて不足する。液晶
層への実効電圧は図中の斜線部の面積に比例するが、明
らかにS1>S2であり、結果として画素P2は画素P
1より暗くなり、残像として認識される。
The influence of the I / V characteristic shift on the display will be described. In FIG. 4, the display content is a white window display on a black background. The pixel P1 is located at the intersection of the column electrode Xm1 and the row electrode Yn, and displays black. The pixel P2 is located at the intersection of the column electrode Xm2 and the row electrode Yn and displays white. Next, as shown in FIG. 5, when the entire screen is displayed in halftone, the previous window display contents remain as an afterimage. That is, the pixel P1 becomes brighter than the pixel P2. The reason will be described with reference to FIG. Xm1-
Yn is a signal applied to the pixel P1, and Xm2-Yn is a signal applied to the pixel P2. Select period T in white display period
At s, the voltage Vms applied to the nonlinear element of the pixel P2
W is larger than the voltage VmsB applied to the nonlinear element of the pixel P1 during the black display period. Therefore, the non-linear element of the pixel P2 has a larger I / V characteristic shift amount. (During the non-selection period, the voltage applied to the non-linear element is relatively small for all the pixels.) Therefore, when the half-tone display is performed for all the pixels, the non-linear element of the pixel P2 is the same as that of the pixel P1. In comparison, since the I / V characteristics are shifted so that the resistance becomes high when a large voltage is applied, the charge of the liquid crystal layer far during the selection period is insufficient as compared with P1. The effective voltage to the liquid crystal layer is proportional to the area of the shaded area in the figure, but obviously S1> S2, and as a result, the pixel P2 becomes the pixel P.
It becomes darker than 1 and is recognized as an afterimage.

【0008】これは図3により、一層明らかに説明でき
る。Xm−YnはXm列とYn行との交点に位置する画
素に印加される信号である。画素(m,n)に表示され
ていた画像が「白」だった場合は、図2においてI/V
特性のシフトが大きく、したがって選択期間Tsでの液
晶層115への電荷の充電は小さめとなる。一方、以前
の表示内容が「黒」だった場合は、I/V特性のシフト
は小さく、したがって選択期間Tsでの液晶層115へ
の電荷の充電は「白」だった場合に比べておおきい。非
選択期間Thでは、前述したように、前の表示の
「白」、「黒」によらず、I/V特性のシフトは小さ
く、液晶層115での電荷の保持状況に優位差はない。
全体として実効電圧の差は、図中に示したS1とS2の
面積の差となる。S2が「白」表示後のもの、S1が
「黒」表示後のものであり、明らかにS1>S2であ
り、同一の画像表示内容のはずであるにもかかわらず、
「黒」表示後の表示の方が「白」表示後のものに比較し
て明るくなり、残像として認識される。本発明は、かか
る従来技術の課題、すなわち二端子型アクティブ・マト
リクス液晶表示装置での残像現象を解決しようとするも
のである。
This can be explained more clearly with reference to FIG. Xm-Yn is a signal applied to the pixel located at the intersection of the Xm column and the Yn row. When the image displayed on the pixel (m, n) is “white”, the I / V in FIG.
Since the characteristic shift is large, the charge of the liquid crystal layer 115 during the selection period Ts is small. On the other hand, when the previous display content is "black", the shift of the I / V characteristic is small, and therefore the charge of the liquid crystal layer 115 during the selection period Ts is larger than that when it is "white". During the non-selection period Th, as described above, the shift of the I / V characteristic is small regardless of the "white" and "black" of the previous display, and there is no significant difference in the charge holding state in the liquid crystal layer 115.
As a whole, the difference in effective voltage is the difference in area between S1 and S2 shown in the figure. S2 is after "white" is displayed, S1 is after "black" is displayed, and it is clear that S1> S2.
The display after "black" is displayed is brighter than that after "white" is displayed, and is recognized as an afterimage. The present invention is intended to solve the problem of the conventional art, that is, the afterimage phenomenon in a two-terminal active matrix liquid crystal display device.

【0009】[0009]

【課題を解決するための手段】本発明の液晶表示装置の
駆動法においては、二端子型アクティブ・マトリクス液
晶表示装置について、各行の選択期間の直前の複数の期
間について、選択時と同等もしくは、それ以上の電圧
を、極性を少なくとも二回以上変えて、行−列電極間に
印加する。
According to the method of driving a liquid crystal display device of the present invention, in a two-terminal active matrix liquid crystal display device, a plurality of periods immediately before a selection period of each row are equal to or at the time of selection, or A voltage higher than that is applied between the row and column electrodes with the polarity changed at least twice.

【0010】[0010]

【作用】選択期間の直前に大電圧を極性を複数回変えて
印加することにより、非線形素子に大電圧が印加される
時間の頻度が増え、非線形素子のI/V特性のシフトを
飽和させることができ、画面内の全ての画素について液
晶層への電荷書き込みの条件は均一となり、残像現象を
防ぐことができる。
By applying the large voltage with the polarity changed a plurality of times immediately before the selection period, the frequency of the time when the large voltage is applied to the non-linear element increases, and the shift of the I / V characteristic of the non-linear element is saturated. Therefore, the conditions for writing charges in the liquid crystal layer are uniform for all pixels in the screen, and the afterimage phenomenon can be prevented.

【0011】[0011]

【実施例】以下、図面に基づいて本発明の一実施例を説
明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

【0012】図1は本発明を実現するための2端子型ア
クティブ素子を用いたマトリックス液晶表示装置の1構
成図例である。103はアクティブマトリックス型液晶
パネル、101は液晶パネル103の列電極を駆動する
列方向駆動回路(Xドライバー)、102は行電極を駆
動する行方向駆動回路(Yドライバー)である。
FIG. 1 is an example of one configuration diagram of a matrix liquid crystal display device using a two-terminal active element for realizing the present invention. Reference numeral 103 is an active matrix type liquid crystal panel, 101 is a column direction drive circuit (X driver) that drives the column electrodes of the liquid crystal panel 103, and 102 is a row direction drive circuit (Y driver) that drives the row electrodes.

【0013】Xドライバー101はディジタルで階調信
号を入力するため、ビデオ信号をA/Dコンバータ10
4にてディジタル信号に変換する。この機能はXドライ
バー101に内蔵させた構成にしてもよい。Xドライバ
ー101においてシフトレジスタ105はシフトクロッ
ク信号XSCLに同期してシフト動作を行い、入力ディ
ジタル信号のサンプリングを行なう。106はラッチ回
路でありシフトレジスタ105でサンプリングされたデ
ータをラッチし、保持するものである。107はXm駆
動回路であり交流反転信号FR、ラッチ回路106で保
持されるデータに基づき電位Va、−Vaの何れかを出
力することにより列電極Xmを駆動するものである。
Since the X driver 101 digitally inputs the gradation signal, the video signal is input to the A / D converter 10
At step 4, it is converted into a digital signal. This function may be built in the X driver 101. In the X driver 101, the shift register 105 performs a shift operation in synchronization with the shift clock signal XSCL to sample the input digital signal. A latch circuit 106 latches and holds the data sampled by the shift register 105. An Xm drive circuit 107 drives the column electrode Xm by outputting either the potential Va or -Va based on the AC inversion signal FR and the data held in the latch circuit 106.

【0014】Yドライバー102において108は液晶
電源発生回路であってVr、Vp、Va、−Va、−V
p、−Vrの6種類の電圧が入力され、交流反転信号F
Rに同期してマルチプレックスされた液晶電源Vs、V
n、Vrを発生させる。ここでVr≧Vp≧Va≧−Va
≧−Vp≧−Vaの電位である。109はシフトレジス
タでありシフトスタート信号DYで起動し、シフトクロ
ック信号YSCLに同期してシフト動作を行ない、選択
信号Cnを発生させる。また、選択信号Cnの1つ時間
的に(YSCL1周期分)前の選択信号をCn−1とす
る。112、113、114はアナログスイッチであ
り、各ソース入力には電源Vs、Vn、Vrが、各ゲート
入力には選択信号Cn、CnとCn−1の論理積11
0、CnとCn−1の反転信号との論理積111とが接
続され、各ドレイン出力は共通接続され行電極Ynを駆
動する。即ちCn=「0」では、Cn−1に係わらず非
選択電位Vnが、Cn=「1」、Cn−1=「1」では
選択電位Vrが、Cn=「1」、Cn−1=「0」では
選択電位Vsが行電極Ynに出力される。即ち出力電位
は、選択信号Cn=「1」、Cn=「1」のとき、交流
反転信号FR=「1」のときYn=「+Vr」、FR=
「0」のときYn=「−Vr」が選択され、選択信号C
n=「1」、Cn−1=「0」のとき、交流反転信号F
R=「1」のときYn=「+Vp」、FR=「0」のと
きYn=「−Vp」が選択される。
In the Y driver 102, reference numeral 108 denotes a liquid crystal power supply generation circuit, which is Vr, Vp, Va, -Va, -V.
Six types of voltage, p and -Vr, are input and the AC inversion signal F
Liquid crystal power supplies Vs, V multiplexed in synchronism with R
n and Vr are generated. Here, Vr ≧ Vp ≧ Va ≧ −Va
The potential is ≧ −Vp ≧ −Va. A shift register 109 is activated by a shift start signal DY, performs a shift operation in synchronization with the shift clock signal YSCL, and generates a selection signal Cn. In addition, the selection signal that is one time before the selection signal Cn (for one YSCL cycle) is Cn−1. Reference numerals 112, 113, and 114 denote analog switches, each source input of which is a power supply Vs, Vn, Vr, and each gate input of which is a logical product 11 of selection signals Cn, Cn and Cn-1.
0, Cn and the logical product 111 of the inverted signal of Cn−1 are connected, each drain output is commonly connected, and drives the row electrode Yn. That is, when Cn = "0", the non-selection potential Vn is irrespective of Cn-1, Cn = "1", and when Cn-1 = "1", the selection potential Vr is Cn = "1", Cn-1 = "". At "0", the selection potential Vs is output to the row electrode Yn. That is, the output potential is Yn = “+ Vr”, FR = when the selection signal Cn = “1”, Cn = “1”, the AC inversion signal FR = “1”.
When "0", Yn = "-Vr" is selected and the selection signal C
When n = “1” and Cn−1 = “0”, the AC inversion signal F
When R = “1”, Yn = “+ Vp” is selected, and when FR = “0”, Yn = “− Vp” is selected.

【0015】103はアクティブマトリックス型液晶パ
ネルで、列電極Xmと行電極Ynはそれぞれ対向する基
板上に形成されており、その交点には非線形素子113
と液晶層112が直列に配置されている。ここで行電極
電位を基準に液晶層112と非線形素子113に印可さ
れる電圧を、それぞれVl、Vmとする。
Reference numeral 103 denotes an active matrix type liquid crystal panel, in which the column electrodes Xm and the row electrodes Yn are formed on opposite substrates, and the non-linear element 113 is located at the intersection.
And the liquid crystal layer 112 are arranged in series. Here, the voltages applied to the liquid crystal layer 112 and the non-linear element 113 with reference to the row electrode potential are Vl and Vm, respectively.

【0016】非線形素子の特性は先に説明した通りであ
る。
The characteristics of the non-linear element are as described above.

【0017】図7、図8、図9が本発明に基づくタイム
チャートであり、これらの図から図1の液晶表示装置の
動作について説明する。
FIGS. 7, 8 and 9 are time charts based on the present invention, and the operation of the liquid crystal display device of FIG. 1 will be described with reference to these figures.

【0018】図7において、DYはYドライバー102
のシフトレジスタスタート信号であり、この信号をシフ
トクロック信号YSCLの立ち下がりにてシフト動作さ
せ、その幅通りに選択信号を転送するものとする。今、
YSCLの1周期分を1選択期間とする(通常、1選択
期間は1水平走査期間に相当する、また以下1水平走査
期間を1Hと略す)。図7でDYの幅はYSCLの4ク
ロック分あるので、選択信号もまたYSCL4クロック
幅(4選択期間分)となりこの幅のままYSCLの立ち
下がりにてシフト転送されていく。
In FIG. 7, DY is a Y driver 102.
Of the shift register start signal, the shift operation is performed at the falling edge of the shift clock signal YSCL, and the selection signal is transferred according to its width. now,
One cycle of YSCL is set as one selection period (normally, one selection period corresponds to one horizontal scanning period, and one horizontal scanning period is abbreviated as 1H hereinafter). Since the width of DY is 4 clocks of YSCL in FIG. 7, the selection signal also has a width of 4 clocks of YSCL (for 4 selection periods), and this width is shifted and transferred at the falling edge of YSCL.

【0019】図1のYドライバー102にこのような動
作をさせると選択信号は4選択期間分ありかつ1選択期
間毎に位相を反転させるので液晶パネル103の画素に
加わる信号は図8のようになる。選択信号CnとCn−
1は1H分だけずれているためCn=「1」、Cn−1
=「1」の期間は3Hとなる。この期間には通常の選択
期間(Cn=「1」、Cn−1=「0」)より大きい電
圧を加わえている。ここで交流反転信号FRは1選択期
間毎に反転させる、1ライン反転駆動としている。従っ
て、実際に選択する信号の前に3選択期間のダミー信号
があり、極性が3回変化している。
When the Y driver 102 of FIG. 1 is operated in this manner, the selection signal has four selection periods and the phase is inverted every one selection period, so that the signal applied to the pixel of the liquid crystal panel 103 is as shown in FIG. Become. Select signals Cn and Cn-
Since 1 is shifted by 1H, Cn = “1”, Cn−1
The period of "1" is 3H. In this period, a voltage longer than the normal selection period (Cn = "1", Cn-1 = "0") is applied. Here, the AC inversion signal FR is set to one line inversion drive in which it is inverted every one selection period. Therefore, there is a dummy signal for three selection periods before the signal to be actually selected, and the polarity changes three times.

【0020】上記の駆動を行なった場合、パネル上のア
クティブ素子(例えばMIM)のI/V特性シフトにど
の様に効果があるかを説明する。I/V特性シフトは先
に述べたように素子に加わる電圧により生じる。図8は
画素Xm1Ynには黒表示、画素Xm2Ynには白表示
を行なっており、ある時間に中間調表示に切り換えた場
合のそれぞれの画素にかかる信号を表わしている。Vm
s1は黒表示により特性シフトした後に中間調を選択し
た場合のMIMに加わる実効値、Vms2は白表示によ
り特性シフトした後に中間調を選択した場合のMIMに
加わる実効値、S1は黒表示により特性シフトした後の
中間調を選択しその保持期間にかかる実効値、S2は白
表示により特性シフトした後の中間調を選択しその保持
期間にかかる実効値である。残像はこれらの実効値が異
なることによって起こる。しかし、本発明による駆動で
は図よりも明かのように真の選択電圧Vmsの前に3回
ものより大きな電圧Vmrが素子にかかり、また、極性
がそれぞれ反転しているため実質的により大きい電圧が
(すなわちVmr2>Vmr1)MIM素子に印可され
ることにより先に述べた素子のI/V特性シフトを飽和
させることが可能となる。このことは、黒表示を行なっ
た画素の特性シフトと白表示を行なった画素の特性シフ
トが同じになることを表わしている。これを図9を用い
て、もう少し詳しく述べる。図9は図8の中間調表示期
間を拡大した図である。図においてTs期間が真の選択
期間、Ts´がダミーの選択期間、Thが保持期間を表
わしている。本発明による駆動によれば黒表示、白表示
に関係なく選択した場合のMIMに加わる実効値、それ
を保持する実効値が等しくなる。つまりVms1=Vm
s2、S1=S2となる。従って、白表示と黒表示によ
る素子のI/V特性シフトの違いをなくし、どの様な表
示内容であっても画面全体のI/V特性シフトを均一に
することができ、残像をなくすことができる。また、2
端子素子を用いたアクティブマトリックスパネルでは、
真の選択であるTs期間のデータ内容によって画素の書
き込みが決まるため、ダミーの選択期間による画質への
影響がない。
The effect of shifting the I / V characteristic of the active element (eg, MIM) on the panel when the above driving is performed will be described. The I / V characteristic shift is caused by the voltage applied to the element as described above. FIG. 8 shows a black display in the pixel Xm1Yn and a white display in the pixel Xm2Yn, and shows a signal applied to each pixel when the display is switched to the halftone display at a certain time. Vm
s1 is an effective value added to the MIM when the halftone is selected after the characteristic shift is performed by the black display, Vms2 is an effective value added to the MIM when the halftone is selected after the characteristic shift is performed by the white display, and S1 is the characteristic due to the black display The effective value for the holding period after selecting the halftone after the shift, and S2 is the effective value for the holding period after selecting the halftone after the characteristic shift due to white display. The afterimage is caused by the difference in these effective values. However, in the driving according to the present invention, as is clear from the figure, a voltage Vmr larger than three times is applied to the element before the true selection voltage Vms, and since the polarities are respectively inverted, a substantially larger voltage is generated. (That is, Vmr2> Vmr1) By applying to the MIM element, the I / V characteristic shift of the element described above can be saturated. This means that the characteristic shift of the pixel displaying black is the same as the characteristic shift of the pixel displaying white. This will be described in more detail with reference to FIG. FIG. 9 is an enlarged view of the halftone display period of FIG. In the figure, Ts represents a true selection period, Ts' represents a dummy selection period, and Th represents a holding period. According to the driving according to the present invention, the effective value added to the MIM when selected regardless of the black display and the white display and the effective value holding the same are equal. That is, Vms1 = Vm
s2, S1 = S2. Therefore, it is possible to eliminate the difference in the I / V characteristic shift of the element between the white display and the black display, make the I / V characteristic shift of the entire screen uniform regardless of the display content, and eliminate the afterimage. it can. Also, 2
In the active matrix panel using terminal elements,
Since pixel writing is determined by the data content in the Ts period which is a true selection, the image quality is not affected by the dummy selection period.

【0021】[0021]

【発明の効果】本発明によれば、二端子型アクティブ・
マトリクス液晶表示装置において、選択期間の直前に大
電圧を極性を複数回変えて、印加して駆動することによ
り、非線形素子に大電圧が印加される時間の頻度が増
え,I/V特性のシフトを飽和せしめて、画面内の全て
の画素についての電荷の書き込み条件を均一とし、残像
現象を防ぎ、画質の向上が図られる。
According to the present invention, the two-terminal active
In a matrix liquid crystal display device, by driving a large voltage by changing its polarity a plurality of times immediately before the selection period and applying the voltage, the frequency of the large voltage applied to the non-linear element increases and the I / V characteristic shifts. Is saturated, the charge write conditions for all pixels in the screen are made uniform, the afterimage phenomenon is prevented, and the image quality is improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】液晶表示装置の構成図。FIG. 1 is a configuration diagram of a liquid crystal display device.

【図2】非線形素子のI−V特性を示す図。FIG. 2 is a diagram showing IV characteristics of a non-linear element.

【図3】液晶表示装置の駆動波形図(従来例)。FIG. 3 is a drive waveform diagram of a liquid crystal display device (conventional example).

【図4】液晶パネルでの窓表示図。FIG. 4 is a window display diagram on a liquid crystal panel.

【図5】液晶パネルでの中間調表示図。FIG. 5 is a halftone display diagram on a liquid crystal panel.

【図6】液晶表示装置のP駆動波形図。FIG. 6 is a P drive waveform diagram of the liquid crystal display device.

【図7】図1各部のタイム・チャート。FIG. 7 is a time chart of each part in FIG.

【図8】液晶表示装置の駆動波形図(本発明による)。FIG. 8 is a drive waveform diagram of a liquid crystal display device (according to the present invention).

【図9】液晶表示装置の駆動波形図(本発明による)。FIG. 9 is a drive waveform diagram of a liquid crystal display device (according to the present invention).

【符号の説明】[Explanation of symbols]

101列電極駆動回路(Xドライバー) 102行電極駆動回路(Yドライバー) 103液晶パネル 104A/Dコンバータ 105シフトレジスタ 106ラッチ回路 107Xm駆動回路 108液晶電源発生回路 109シフトレジスタ 110ANDゲート 111ANDゲート 112アナログ・スイッチ 113アナログ・スイッチ 114アナログ・スイッチ 115液晶層 116非線形素子 101 column electrode drive circuit (X driver) 102 row electrode drive circuit (Y driver) 103 liquid crystal panel 104 A / D converter 105 shift register 106 latch circuit 107 Xm drive circuit 108 liquid crystal power supply generation circuit 109 shift register 110 AND gate 111 AND gate 112 analog switch 113 analog switch 114 analog switch 115 liquid crystal layer 116 nonlinear element

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】A)走査信号が供給される複数の行電極
と、ビデオ信号に基づくデータ信号が供給される複数の
列電極との交点に、非線形抵抗特性を有する二端子素子
と液晶層とが直列に配置されてなる液晶パネルに対し
て、 B)それぞれの行の選択時には、前記行−列電極間に相
対的に大である電圧が印加され、非選択時には、相対的
に小である電圧が印加される液晶表示装置の駆動法にお
いて、 C)選択期間直前の複数行に対応する期間について、選
択期間と同等、もしくは選択期間の場合以上の電圧が、
極性を少なくとも二回以上変えて、前記行−列電極間に
印加されることを特徴とする液晶表示装置の駆動法。
1. A) A two-terminal element having a non-linear resistance characteristic and a liquid crystal layer at an intersection of a plurality of row electrodes to which a scanning signal is supplied and a plurality of column electrodes to which a data signal based on a video signal is supplied. B), a relatively large voltage is applied between the row and column electrodes when each row is selected, and a relatively small voltage when not selected. In a driving method of a liquid crystal display device to which a voltage is applied, C) a voltage corresponding to the plurality of rows immediately before the selection period is equal to the selection period, or higher than the selection period,
A method of driving a liquid crystal display device, characterized in that the polarity is changed at least twice or more and the voltage is applied between the row and column electrodes.
【請求項2】A)前記二端子素子は、金属−絶縁物−金
属の構成を有することを特徴とする請求項1に記載の液
晶表示装置の駆動法。
2. The method of driving a liquid crystal display device according to claim 1, wherein A) the two-terminal element has a metal-insulator-metal structure.
【請求項3】A)前記二端子素子は、金属−絶縁物−半
導体の構成を有することを特徴とする請求項1に記載の
液晶表示装置の駆動法。
3. The method of driving a liquid crystal display device according to claim 1, wherein A) the two-terminal element has a structure of metal-insulator-semiconductor.
JP26202991A 1991-10-09 1991-10-09 Driving method of liquid crystal display device Expired - Fee Related JP3328944B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26202991A JP3328944B2 (en) 1991-10-09 1991-10-09 Driving method of liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26202991A JP3328944B2 (en) 1991-10-09 1991-10-09 Driving method of liquid crystal display device

Publications (2)

Publication Number Publication Date
JPH05100637A true JPH05100637A (en) 1993-04-23
JP3328944B2 JP3328944B2 (en) 2002-09-30

Family

ID=17370040

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26202991A Expired - Fee Related JP3328944B2 (en) 1991-10-09 1991-10-09 Driving method of liquid crystal display device

Country Status (1)

Country Link
JP (1) JP3328944B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5760758A (en) * 1994-07-15 1998-06-02 Sharp Kabushiki Kaisha Method of driving display device
US6864937B2 (en) * 2000-10-16 2005-03-08 Lg.Philips Lcd Co., Ltd. In-plane switching mode liquid crystal display device with peripheral circuit lines for shielding

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5760758A (en) * 1994-07-15 1998-06-02 Sharp Kabushiki Kaisha Method of driving display device
US6864937B2 (en) * 2000-10-16 2005-03-08 Lg.Philips Lcd Co., Ltd. In-plane switching mode liquid crystal display device with peripheral circuit lines for shielding

Also Published As

Publication number Publication date
JP3328944B2 (en) 2002-09-30

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