JPH0713520A - Driving method for ferroelectric liquid crystal device - Google Patents
Driving method for ferroelectric liquid crystal deviceInfo
- Publication number
- JPH0713520A JPH0713520A JP15210593A JP15210593A JPH0713520A JP H0713520 A JPH0713520 A JP H0713520A JP 15210593 A JP15210593 A JP 15210593A JP 15210593 A JP15210593 A JP 15210593A JP H0713520 A JPH0713520 A JP H0713520A
- Authority
- JP
- Japan
- Prior art keywords
- selection period
- period
- selection
- pulse
- liquid crystal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、強誘電性液晶装置の駆
動方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a ferroelectric liquid crystal device.
【0002】[0002]
【従来の技術】例えばカイラルスメクチックC(SmC
* )相等の強誘電性液晶を用いた液晶素子を時分割で2
値表示駆動する時分割駆動方法として、従来は1回の書
込み動作(1フレーム)を2つのフィールドに分割し、
第1フィールドで一方の安定状態の選択をし、第2フィ
ールドでは他方の安定状態の選択を行なう2フィールド
書込み法、選択時間内に表示状態を一方の状態にリセッ
トするパルスを印加した後、この状態を保持するべく閾
値電圧以下のパルスか、あるいは他方の状態にするべく
閾値電圧以上のパルスを印加する1フレームリセット書
込み法、選択期間内に4個以上のパルスを印加して一方
の状態のリセットと書込みを行なう4パルス法、等があ
った。2. Description of the Related Art For example, chiral smectic C (SmC
* ) Phase-divided liquid crystal element using ferroelectric liquid crystal
As a time-division driving method for driving value display, conventionally, one writing operation (one frame) is divided into two fields,
A two-field writing method in which one stable state is selected in the first field and the other stable state is selected in the second field, after applying a pulse for resetting the display state to one state within the selected time, One-frame reset writing method in which a pulse of a threshold voltage or less is applied to hold the state or a pulse of a threshold voltage or more is applied to enter the other state, and four or more pulses are applied during the selection period There was a 4-pulse method for resetting and writing, and so on.
【0003】[0003]
【発明が解決しようとする課題】しかるに、上記2フィ
ールド法では、選択されない一方のフィールドでは書込
み動作が行なわれないので、変化の多い表示ではちらつ
き(フリッカ)が目立ちやすく、また、2つの安定状態
の閾値電圧が等しくなければならないという問題があっ
た。さらにこの2フィールド法では、一走査線の選択時
間は液晶の応答時間の4倍以上必要となるために、高速
書込みには不利である。However, in the above-mentioned two-field method, since the writing operation is not performed in one of the unselected fields, flicker is conspicuous in the display with many changes, and the two stable states are not noticeable. There was a problem that the threshold voltages of the two must be equal. Further, in the two-field method, the selection time for one scanning line needs to be four times or more the response time of the liquid crystal, which is disadvantageous for high-speed writing.
【0004】また、上記1フレームリセット書込み法
は、駆動波形が電荷的にかたよりを生じるために好まし
くないという欠点があった。さらに、上記4パルス法
は、この電化的なかたよりをなくすために選択期間内に
4個以上のパルスを印加するようにしたものであり、表
示のちらつきや閾値特性の非対称性の問題も軽減できる
が、やはり4個以上のパルスが必要なために書込みに要
する時間が長くなり、高速書込みには向いていない。Further, the one-frame reset writing method described above has a drawback that it is not preferable because the driving waveform causes a bias in charge. Furthermore, in the above-mentioned four-pulse method, four or more pulses are applied within the selection period in order to eliminate this electric bias, and the problems of display flicker and asymmetry of threshold characteristics can be alleviated. However, since four or more pulses are still required, the time required for writing becomes long, which is not suitable for high speed writing.
【0005】本発明は上記のような実情に鑑みてなされ
たもので、その目的とするところは、高速書込みを可能
とするべく走査時間を短くし、且つ、1フレームの波形
全体で電荷のかたよりがなく、表示のちらつきを抑え
て、安定して動作する強誘電性液晶装置の駆動方法を提
供することにある。The present invention has been made in view of the above circumstances, and an object of the present invention is to shorten the scanning time to enable high-speed writing, and to check the charge distribution in the entire waveform of one frame. Another object of the present invention is to provide a driving method of a ferroelectric liquid crystal device which suppresses display flicker and operates stably.
【0006】[0006]
【課題を解決するための手段及び作用】すなわち本発明
は、走査信号電圧の選択期間内に強誘電性液晶の一方の
安定状態にリセットする信号とこの信号に続く書込み信
号を印加し、このときに生じる電荷のかたよりを補償す
べく、選択波形の印加される直前の非選択期間に補償パ
ルスを印加するようにしたもので、走査時間を短くして
高速書込みを可能とし、1フレームの波形全体で電荷の
かたよりがなく、表示のちらつきを抑えて、安定した表
示駆動を行なうことができる。That is, according to the present invention, a signal for resetting the ferroelectric liquid crystal to one stable state and a write signal subsequent to this signal are applied during the selection period of the scanning signal voltage. The compensation pulse is applied during the non-selection period immediately before the selection waveform is applied in order to compensate for the bias of the electric charge generated in the. Thus, there is no bias of electric charge, flicker of display is suppressed, and stable display driving can be performed.
【0007】[0007]
【実施例】以下図面を参照して本発明の一実施例を説明
する。図1はマトリックス構造を有する強誘電性液晶装
置の電極構成を例示し、11がコモン電極群、12がセグメ
ント電極群、C1,C2,…が個々のコモン電極、S
1,S2,…が個々のセグメント電極、a1 ,a2 ,
…,b1 ,b2 ,…,c1,c2 ,…,d1 ,d2 ,
…,e1 ,e2 ,…がそれぞれ画素部を示す。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 illustrates an electrode configuration of a ferroelectric liquid crystal device having a matrix structure, 11 is a common electrode group, 12 is a segment electrode group, C1, C2, ...
1, S2, ... are individual segment electrodes, a1, a2,
..., b1, b2, ..., c1, c2, ..., d1, d2,
, E1, e2, ... Represent pixel portions.
【0008】上記のような電極構成にあって、コモン電
極C1,C2,…、セグメント電極S1,S2,…にそ
れぞれ印加される駆動信号波形は図2に示すようにな
る。すなわち、コモン電極C1,C2,…のそれぞれに
対しては、1フレームTf中の先頭に位置するタイミン
グである選択期間tsの第1期間t1 で−V1 、第2期
間t2 でV2 (V1 >V2 >0)を印加する一方、1フ
レームTf中の最終タイミング、すなわち、次のフレー
ムの選択パルスの直前位置にリセット期間trを配し、
電圧値Vr (V2 >Vr >0)を印加する。In the electrode configuration as described above, the drive signal waveforms applied to the common electrodes C1, C2, ... And the segment electrodes S1, S2 ,. That is, with respect to each of the common electrodes C1, C2, ..., −V1 in the first period t1 of the selection period ts which is the timing located at the beginning in one frame Tf, and V2 (V1> V2 in the second period t2). > 0) while applying the reset period tr at the final timing in one frame Tf, that is, immediately before the selection pulse of the next frame,
A voltage value Vr (V2>Vr> 0) is applied.
【0009】これに対して、例えばセグメント電極S1
にはVb1〜−Vb2間で変化する常時オンを繰返す信号
を、セグメント電極S2には同じくオンとオフを交互に
繰返す信号を、そして、セグメント電極S3には同じく
常時オフを繰返す信号をそれぞれ印加するものとする。On the other hand, for example, the segment electrode S1
Is applied to the segment electrode S2, a signal which is repeatedly turned on and off alternately, and a signal which is repeatedly turned off to the segment electrode S3. I shall.
【0010】図3は図2に示すような波形のコモン信
号、セグメント信号が与えられた場合の各画素部a2 ,
b2 ,c2 における合成波形を示すものである。選択期
間ts中の第1の期間t1 では、強誘電性液晶の一方の
状態にリセットする電圧の絶対値|V1 +Vb1|及び|
V1 −Vb2|を、いずれもこの状態をとるのに必要な閾
値電圧の絶対値|Vth1 |よりも大きくなるように設定
する。FIG. 3 shows each pixel section a2 when a common signal and a segment signal having the waveforms shown in FIG. 2 are given.
It shows a composite waveform at b2 and c2. In the first period t1 of the selection period ts, the absolute values of the voltages for resetting the ferroelectric liquid crystal to one state | V1 + Vb1 | and |
V1-Vb2 | is set so as to be larger than the absolute value | Vth1 | of the threshold voltage required to attain this state.
【0011】また、続く第2の期間t2 で印加される電
圧波形は、上記強誘電性液晶の一方の安定した状態を他
方の状態にスイッチングするのに必要な閾値電圧の絶対
値Vth2 より大きくなるように電圧V2 +Vb2を印加す
るか、あるいは上記リセットされた一方の状態をそのま
ま保持するための閾値電圧Vth2 以下の電圧V2 −Vb2
を印加するかのいずれかで、画素のオンかオフかを選択
できるようにする。The voltage waveform applied during the subsequent second period t2 is larger than the absolute value Vth2 of the threshold voltage required to switch one stable state of the ferroelectric liquid crystal to the other state. Voltage V2 + Vb2 as described above, or a voltage V2 -Vb2 equal to or lower than a threshold voltage Vth2 for maintaining the one reset state as it is.
It is made possible to select ON or OFF of the pixel by either applying.
【0012】このとき、選択期間ts内では、電荷が負
もしくは正のいずれかにかたよってしまうこととなるの
で、これを補償するために選択期間tsの直前である非
選択期間の最終タイミングにリセット期間trを配し、
選択期間の生じる電荷のかたよりとは逆の極性のパルス
電圧Vr を印加する。こうすることで、1回の書込み時
間内での電荷のかたよりが生じないようにすることがで
きる。ここで、かたより補償用のパルスの印加時間はで
きるだけ短いほうが望ましい。具体的には、例えば走査
信号及びデータ信号の最小パルス幅が等間隔である場合
に、その最小パルス幅を補償用パルスとすると有効とな
るものである。At this time, in the selection period ts, the electric charge is either negative or positive. Therefore, in order to compensate for this, resetting is performed at the final timing of the non-selection period immediately before the selection period ts. Allocate period tr,
A pulse voltage Vr having the opposite polarity to the charge bias generated during the selection period is applied. By doing so, it is possible to prevent the bias of charges from being generated within one writing time. Here, it is desirable that the application time of the compensation pulse is as short as possible. Specifically, for example, when the minimum pulse widths of the scanning signal and the data signal are equidistant, it is effective to use the minimum pulse width as the compensation pulse.
【0013】上記の如く選択パルスの印加される直前に
電荷のかたよりを補償するパルスを印加するようにして
いるので、非選択期間全体にバイアス電圧をかけて電荷
のかたよりを補償する場合に比較すれば、ちらつきが生
じにくく安定しており、しかも高速の書込み動作を行な
うことが可能となる。As described above, the pulse for compensating the bias of the electric charge is applied immediately before the selection pulse is applied, so that a bias voltage is applied to the entire non-selection period to compensate for the bias of the electric charge. For example, flicker is less likely to occur and is stable, and high-speed write operation can be performed.
【0014】[0014]
【発明の効果】以上詳記した如く本発明によれば、走査
信号電圧の選択期間内に強誘電性液晶の一方の安定状態
にリセットする信号とこの信号に続く書込み信号を印加
し、このときに生じる電荷のかたよりを補償すべく、選
択波形の印加される直前の非選択期間に補償パルスを印
加するようにしたので、走査時間を短くして高速書込み
を可能とし、1フレームの波形全体で電荷のかたよりが
なく、表示のちらつきを抑えて、安定した表示駆動を行
なうことが可能な強誘電性液晶装置の駆動方法を提供す
ることができる。As described in detail above, according to the present invention, a signal for resetting the ferroelectric liquid crystal to one stable state and a write signal subsequent to this signal are applied during the selection period of the scanning signal voltage. In order to compensate the bias of the electric charge generated in the above, the compensation pulse is applied in the non-selection period immediately before the application of the selected waveform, so that the scanning time can be shortened to enable high-speed writing and the entire waveform of one frame. It is possible to provide a driving method of a ferroelectric liquid crystal device that has no bias of electric charges, suppresses display flicker, and can perform stable display driving.
【図1】本発明の一実施例に係るマトリックス構造の強
誘電性液晶装置の電極構成を示す図。FIG. 1 is a diagram showing an electrode configuration of a ferroelectric liquid crystal device having a matrix structure according to an embodiment of the present invention.
【図2】図1のコモン電極及びセグメント電極に印加さ
れる信号波形を示すタイミングチャート。2 is a timing chart showing signal waveforms applied to the common electrode and the segment electrode of FIG.
【図3】図2の信号波形による各画素部での合成信号波
形を示すタイミングチャート。FIG. 3 is a timing chart showing a composite signal waveform in each pixel portion according to the signal waveform of FIG.
11…コモン電極群、12…セグメント電極群、C1,C2
…コモン電極、S1,S2…がセグメント電極、a1 ,
a2 ,b1 ,b2 ,c1 ,c2 ,d1 ,d2 ,e1 ,e
2 …画素部。11 ... Common electrode group, 12 ... Segment electrode group, C1, C2
... common electrodes, S1, S2 ... are segment electrodes, a1,
a2, b1, b2, c1, c2, d1, d2, e1, e
2 ... Pixel part.
Claims (1)
晶の一方の安定状態にリセットする信号とこの信号に続
いて他方の安定状態を選択もしくは前記リセットされた
状態を保持する信号とを選択するための少なくとも2つ
のパルスを印加し、且つ、選択期間の直前の非選択期間
に選択期間に生じる電荷のかたよりを補償するパルスを
少なくとも1つ印加することを特徴とする強誘電性液晶
装置の駆動方法。1. A signal for resetting one stable state of a ferroelectric liquid crystal within a scanning signal voltage selection period and a signal for selecting the other stable state or holding the reset state following this signal. A ferroelectric liquid crystal device, characterized in that at least two pulses for selection are applied, and at least one pulse for compensating for the bias of charges generated in the selection period in the non-selection period immediately before the selection period is applied. Driving method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15210593A JPH0713520A (en) | 1993-06-23 | 1993-06-23 | Driving method for ferroelectric liquid crystal device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15210593A JPH0713520A (en) | 1993-06-23 | 1993-06-23 | Driving method for ferroelectric liquid crystal device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0713520A true JPH0713520A (en) | 1995-01-17 |
Family
ID=15533167
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15210593A Pending JPH0713520A (en) | 1993-06-23 | 1993-06-23 | Driving method for ferroelectric liquid crystal device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0713520A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6753568B1 (en) | 1996-11-15 | 2004-06-22 | Hitachi, Ltd. | Memory device |
-
1993
- 1993-06-23 JP JP15210593A patent/JPH0713520A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6753568B1 (en) | 1996-11-15 | 2004-06-22 | Hitachi, Ltd. | Memory device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH0534653B2 (en) | ||
JPH0968689A (en) | Driving method of liquid crystal display device | |
JPH05249434A (en) | Ferroelectric liquid crystal device | |
US4834510A (en) | Method for driving a ferroelectric liquid crystal optical apparatus using superposed DC and AC driving pulses to attain intermediate tones | |
JPS59157693A (en) | Driving of display | |
US6271817B1 (en) | Method of driving liquid crystal display device that reduces afterimages | |
JPH0713520A (en) | Driving method for ferroelectric liquid crystal device | |
JPH07306660A (en) | Gradation driving circuit for liquid crystal display device and gradation driving method therefor | |
EP0607860B1 (en) | Method of driving liquid crystal display device | |
EP0616311B1 (en) | Matrix display device with two-terminal non-linear elements in series with the pixels and method for driving such | |
JPH0713521A (en) | Driving method for ferroelectric liquid crystal device | |
JPH0829748A (en) | Driving method of display device | |
JPH0363077B2 (en) | ||
JP3167135B2 (en) | Two-terminal active matrix liquid crystal display device and driving method thereof | |
JP3611581B2 (en) | Liquid crystal display | |
JPH0749480A (en) | Method for driving matrix of flat type display device | |
JP3328944B2 (en) | Driving method of liquid crystal display device | |
JP2630317B2 (en) | Liquid crystal device and driving method thereof | |
JPH03161790A (en) | Driving method for liquid crystal panel | |
JP2794705B2 (en) | Driving method of liquid crystal element | |
JP2770981B2 (en) | Driving method of matrix type ferroelectric liquid crystal panel | |
JPH05333819A (en) | Liquid display device and method thereof | |
JPH06222739A (en) | Liquid crystal display device | |
JP3229450B2 (en) | Matrix driving method for flat display device | |
JPS60201327A (en) | Display panel |