JPS6158038A - Connection system between service processor and main body device - Google Patents

Abstract

PURPOSE:To simplify switching of a master service processor (master SVP) by providing a bus crossing with a system SCI and a selection circuit of the bus to an interface controller (SCI) of one data processing system. CONSTITUTION:The SVP being a master allows a constitution control register 234 of the own system to select the SVP11 of the own system through an output data register 231 in an ACI23 of the own system and allows the register 234 of the other system to select the SVP of the other system. Thus, outputs SEL237 of both the systems, input SEL238 of both the systems and a device selection register (USR) SEL236 selectr respectively a register 231 in an SCI23 of the master side, an USRSEL235 and an input data register 232. The main body device group 4 of both the system functions as devices of the master SVP11 to realize the multi-processor constitution.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention provides a service processor (SVP) via an interface control device (SCI) provided between a main unit of a data processing system and a service processor (SVP).
The present invention relates to a method for connecting SVP) and a main unit.

With the recent increase in size and sophistication of data processing systems,
There is a trend toward an increase in the number of main devices that make up the system.

In addition, in response to the above-mentioned trend toward larger and more sophisticated systems, a dedicated service processor (SVP) is provided to control operation/maintenance operations of the system.

In this case, the service processor (SVP) controls the main unit by interposing an interface control unit (SCI) between it and the main unit, but the interface control unit (SCI) has a configuration control register. (
CFR) is provided, and bus selection within the interface control unit (SCI) is performed according to the contents of the register, and connection between the service processor (SVP) and the main unit is established.

Therefore, as the number of main devices increases, the number of connection lines between the interface control device (SCI) and the main device tends to increase.

On the other hand, with the recent remarkable progress in semiconductor technology, each device that makes up a data processing system is configured on a single board and has become smaller, and the number of interface lines between each device and other GWs is minimized. This has become a requirement.

However, since the size of the bus port itself for connecting the above-mentioned interface control device (SCI) and each main unit does not change much, it becomes impossible to connect with the necessary interface lines as the number of connection lines increases. Due to this trend, there has been a demand for a connection method that allows connection between an interface control device (SCI) and a main unit using as few interface lines as possible.

[Conventional technology]

Figure 2 shows a case where SvP and the main unit are connected via an interface control device (hereinafter referred to as SCI) provided between the main unit of a data processing system and a service processor (hereinafter referred to as SvP). 11 is a block diagram showing the conventional method of mask SVP (M-SV
P), 12 is slave 5VP (S-SVP), 21
22 is the SCI, and 3 is the main unit group.

In this example, it is especially important to use two (7) SVPs (M-5VP
11. S-5VP 12) and 2 units (7) SCI 21
．． 22 shows a conventional configuration method for logically switching two main unit groups 3 to a partition configuration or a multiprocessor configuration.

Here, the partition configuration consists of two sets of SVP (M-
SVP)11. SCI 21 and 5VP (S-SVP
)12. S(:I) 22 each controls one main unit group 3, forming two logically independent systems, and the multiprocessor configuration is one set) SVP (M-SV
P)11. SCI 21 or 5VP (S-3
VP)12. Two main unit groups 3 under SCI 22
is controlled, and the remaining SVP and SCI are for standby use.

In this figure, solid line buses are buses that are logically connected in a multiprocessor configuration, and dash-dotted lines indicate that only buses that are not disconnected are selected in a partition configuration.

In such a configuration, in the conventional system, two sets of buses shown by solid lines and dotted lines are provided between the two SCs 121 and 22 and all the main units 3, and the SCI 21° 22
Bus switching was performed on each main unit 3 side based on information in a configuration control register (CFR) provided therein.

That is, in the partition configuration, the two main unit groups 3 each have their own SCI 21. Alternatively, select a bus from 22, and in a multiprocessor configuration, select S as a mask.
Connected to VP (M-5VP 11 in this figure)'
I had chosen the bus from SCI 21.

Moreover, depending on the contents of the configuration control register (CFR) in SC:I 2L or 22, partition configurations in any combination were possible.

[Problem that the invention seeks to solve]

However, in the conventional method, two SCI 21.2
It is necessary to install a lotus between the SCI 2 and all the main device groups 3, and also, on the side of all the main device groups 3, the two SCI 2
It was necessary to prepare two passports compatible with 1.22 and a mechanism to select between them.

In view of the above-mentioned conventional drawbacks, the present invention provides a bus that intersects the SC1 of one system with the SCI of another system, and an arbitrary control system based on the information of the configuration control register (CFR) provided in each SCI. By providing a mechanism that allows you to select the connection between the service processor (SVP) and the main unit, you can realize a partition configuration or a multiprocessor configuration, and you can more easily switch between them and the master 5VI3 in a multiprocessor configuration. The purpose is to provide a method to do so.

[Means for solving problems]

For this purpose, the service processor (SVP) has one interface control device (5C1) of its own system, the main unit has one interface control device (SCI) of its own system, and the interface control device (SCI) has one interface control device (5C1) of its own system. The service processor (SVP), the main unit of the own system, and the interface control device 7 (SCI) of the other system are respectively connected, and within the interface control device (SCI),
A configuration control register (CFR) is provided that can be set from each group's service processor (SVP), and one of the buses of each group's service processor (SVP) is selected depending on the contents of the register. The main body 'JzW group has a partition configuration in which each group is subordinate to the service processor (SVP) of that system, or the main body device groups of multiple systems operate under the control of one service processor (M-SVP). This is achieved by the service processor and main unit connection method of the present invention that allows a multiprocessor configuration to be constructed.

[Effect]

That is, according to the present invention, each main unit constituting a data processing system has a system configuration in which it can be connected only to the SCI of that system, and a bus that intersects with the SC1 of that system and another system, and a bus therebetween, are provided. A partition configuration or a multiprocessor configuration is realized by providing a circuit that selects based on the stacking of configuration control registers provided in the SCR.

Figure 3 shows that in a data processing system consisting of two systems,
The main points of the bus connection of the present invention are shown in 11.1.
2. is the same as that explained in FIG. 2, and 23.
24 is an SCI implementing the present invention, and 4 is its main unit group. The solid line is a bus that is logically connected in a multiprocessor configuration, and in a partition configuration, the buses between the BoscI 23 and 24 are logically disconnected, allowing each unit to operate independently.

Therefore, in a data processing system that includes multiple SvPs, a partition configuration or a multiprocessor configuration can be realized with a smaller number of buses between the main unit and the SCI and with simple control compared to the conventional system. effective.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. In particular, it is a data processing system consisting of two SVPs, two SCIs, and two main unit groups.
It consists of two systems: one SVP, one SCI, and one main unit group. This figure shows only one of the systems.

In this figure, 11, 23.4 are the same as those explained in FIG. 2, and the output data register (ODR) 23.
1 is a register that holds data that the SVP 11 transfers to the main device group 4, and input data register (IDI?) 2
32 is a register that receives and receives data sensed from the main unit group 4.

Also, configuration control register 7! , RI (CFR) 234 is 2
Stand 5vP (Figure 3 (7) M-SVP 11.S-5V
Here, we will focus only on the bit that indicates whether to select SVP 11 of the own system or SVP 12 of the other system.

The device selection register (IJSI?) 235 is a register that selects the main device group 4 to perform an operation. It can be changed only from the svp of the own system, and it stores selection information for the main device group 4 of both systems (self system, other system). have.

The output SEL 237 is the configuration control register ((:FI
? ) 234, one of the output data registers (OD[1) 231 of both systems is selected to determine the data to be transferred to the main unit 4 of the own system.

Input SEL 23B is the configuration control register (CFR) mentioned above.
Depending on the contents of 234, the input data register (
101? ) 232 to determine the destination of data transfer from the main unit 4 of the own system.

Also, the ll5RSOL 236 similarly controls the SCI2 of both systems depending on the contents of the configuration control register (CFR) 234.
3.24 device selection register (IJsR) 235
Choose one of them.

First, in this data processing system, when creating a partition configuration, each SVP 11. (or 12), each of its own 5CI23. Write data for selecting the SvP of the own system to the configuration control register (CI'l?) 234 provided in (or 24), and
vP11 or 12 is the own system's output data register (OD
R) 231 and the device selection register (USR) 235 are selected, and both systems construct mutually independent systems.

Next, in a multiprocessor configuration, the S
VP' (corresponding to M-5VP 11 in FIG. 3 in this example) is the output data register (OCR) in the SCI 23 of its own system.
) 231, the self-system configuration control register (CuI2
) 234 is the configuration control register (CFR) of the other system so as to select the SVP 11 of the own system.
is set to select the output SEL of both systems.
237, input 5EL of both systems 238, USRSEL
236 is the output data register (ODR) 231 in the SCI 23 on the mask side, the device selection register (USR) 235 (however, the contents of the own system on the mask side, and the contents of the other system on the slave side), and input data Register (I
DR) 232 is selected, and the main unit groups 4 of both systems are all configured to function as subordinates of the master SVP (compatible with M-SVP in FIG. 3) 11.

〔Effect of the invention〕

As explained above in detail, the connection method between the service processor (SVP) and the main unit of the present invention is such that each main unit configuring the data processing system has a system configuration in which it can connect only to the SCI of that system. and other systems of SC
A partition configuration or a multiprocessor configuration is realized by providing buses that intersect with each other and a circuit that selects the buses based on information in a configuration control register provided in the SCI. .

Therefore, in a data processing system including multiple SvPs, a partition configuration or a multiprocessor configuration has a lower connection between the main unit and the SCI than in the conventional system.
There is an effect that it can be achieved with a smaller number of buses and with N simple control.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention. FIG. 2 is a block diagram showing an example of connection according to the conventional method. FIG. 3 is a block diagram showing a connection example according to the present invention. In the drawing, 11 is a service processor (SVP), ? , 2.
riSVP (M-5VP). 12 is a slave SVP (S-SVP). 21.22, 23.24 are interface control devices (S
CI). 3.4 is the main device group. 231 is an output data register (ODR). 232 is an input data register (IDR). 234 is a configuration control register (CFR). 235 is a device selection register (USR). 236 is USRSEL, 237 is output SEL
. 238 is human-powered SEL. are shown respectively.

Claims (1)

[Claims] At least a central processing unit (CPU) and a storage device (M
EM) and transfer device (CHP) as one system, and a service processor (for each system).
In a data processing system consisting of a service processor (SVP) and an interface control unit (SCI) between the service processor (SVP) and the main unit, the service processor (SVP) controls its own interface control unit (SCI).
CI), the main unit has one own interface control device (SCI), and one interface control device (SCI) of its own system.
I) is the service processor (SVP) of the own system, the main unit of the own system, and the interface control device (SCI) of the other system
and the above interface control device (
A configuration control register (CFR) that can be set from the service processor (SVP) of each system is provided in the SCI).
The main unit of each system selects one of the buses of the service processor (S) of that system.
A connection method between a service processor and a main unit, which is characterized in that it is possible to construct a partition configuration under the control of a service processor (SVP) or a multiprocessor configuration in which a plurality of main units operate under the control of one service processor (SVP).