JPS60201448A - Body device connecting circuit - Google Patents

Abstract

PURPOSE:To shorten a fault recovery time by providing a circuit which can execute a connection and the selection to a service processor (SVP) with respect to each interface to each body device in an interface control device (SCI). CONSTITUTION:When a CPU1 goes to off-line due to a fault, etc., the contents of connection designating registers 51, 52 are set-switched so that only the CPU1 is connected to an S-SVP12, and each selecting circuit 531-536 is made to function so as to be connected to the SVP shown by a dotted line by a selecting circuit 53. An M-SVP11 is made controllable independently with regard to the whole device 2 except the CPU1, respectively. The S-SVP12 can execute access of a diagnosis, etc. with respect to only the CPU1 which is in off-line, in parallel to a control driving/maintenance operations to the body device of the M-SVP 11.

Description

Detailed Description of the Invention (a) Technical Field of the Invention The present invention relates to an interface control device provided between a main unit and a service processor of a data processing system, which connects the service processor and the main unit. Regarding circuits.

(h) Technical Background In general, as data processing systems become larger, two service processors, a master and a slave, are usually provided as dedicated processors to control all operation/maintenance operations of the system. When the data processing system is operating in the separation mode (SP?l), the service processor is also separated into two systems together with the interface control device provided between the main unit and the data processing system. When the system is operating in multiprocessor mode (MPM), one of the two service processors and interface control devices acts as a mask, controlling the entire multiplexed main unit, and controlling the other service processors and interface control devices. The interface control device is configured to be logically separated from the main device.

In this case, in the conventional system, the main unit such as the central processing unit, main storage device, channel device, etc. has a connection interface with the above two service processors and the interface control device, and one of them is selected. It became.

However, with the recent remarkable progress in semiconductor technology, logic elements have become highly integrated, and each device constituting the main unit has come to be housed on a single board. Instead of the conventional method of selecting two connection interfaces, the interface control device now has a configuration in which the connection paths from the two service processors intersect,
The method has changed to reducing the number of connection cables on the main unit side by switching the crossover interface to all main units at once.

In this way, in recent large-scale data processing systems, the connection lines between, for example, the entire duplex main unit and the service processor are consolidated and cross-connected in the interface control device. It is easy to select each device constituting the main unit, and the connection between the service processor and the main unit can be easily changed.

However, recent data processing systems are designed to improve system reliability by disconnecting that device and continuing processing even if one of the main devices fails. Therefore, the master service processor must control the failed device in parallel with the system control, which poses a problem of increasing the processing load on the mask service processor.

Therefore, the control of the device disconnected due to a failure is performed using a standby slave service in an interface control device in which the interface lines from each of the main devices mentioned above are consolidated, and it is easy to change the connection between the service processor and the main device. If you can make the processor do it,
It becomes possible to reduce the load on the master service processor and shorten the time for failure recovery. The present invention has been made with attention to this point.

10) Prior Art and Problems The general configuration of a conventional data processing system is shown in FIG.

In FIG. 1, 11 is a mask service processor (hereinafter referred to as M-3VP), 12 is a slave service processor (hereinafter referred to as 5-svp), 2 is an interface control device (hereinafter referred to as SCI), and 3 is a Main unit (CPIO, CIIPO, -, CPUI, CHPI, -
).

In a conventional data processing system, as shown in this figure, M-
5VP 11. and S-5VP 12, and when the data processing system is operating in separate mode (SPM), the boundary line shown by the dashed dot line connects two independent If the data processing system is operating in multiprocessor mode (MPM),
Of the two SVP/SCIs, one is the mask side, and the entire body bag W3 (cpuo.

CIIPO, -, CPUI, CIIPI, -), but other SVPs/SCIs are logically separated from the main unit, and due to a failure in M-3VP 11, S-5VP 12 becomes the master. It will not be used until it is replaced.

Therefore, one device of the main body bag M3 (for example, channel device 1
(CIIPO) is offline due to a failure, the configuration is such that only the M-5VP 11 can access the device.

Therefore, if there is an online device and an offline device, 0M-5VP ii processes the control for the online device and the control for the offline device (for example, failure analysis, etc.) in parallel. or ■ Take the entire system including the offline device (i.e., the faulty device) (e.g., CPUI, CIIPI, -> offline,
sv of the system including the offline device in the separation mode described above.
A method was adopted in which P performed failure analysis on the failed device.

In the case of (2) above, there is a problem in that the load on the M-3VP 11 is heavy, and in the case (2), there is a problem in that the processing capacity of the entire data processing system is reduced.

(d) Purpose of the Invention In view of the above-mentioned conventional drawbacks, the present invention provides a system in which, in recent data processing systems, for example, the connection paths between the redundant SVP and the main unit are consolidated into an SCI, and S
Focusing on the fact that CIs are cross-connected, the purpose of the present invention is to provide a method for providing a selection circuit that can select either of the two SvPs for each of the interface lines from the main unit in the SC. That is.

According to the present invention, a main body device including at least a central processing unit, a main storage device, and a channel device;
It consists of a plurality of SVPs that control the main unit, and an SCI between the SvP and the main unit. Normally, the M-5VP controls the entire main unit, and the standby 5-S
In a data processing system consisting of a SVP, a means is provided in the SCI for selecting a connection to an arbitrary SVP for each interface with each device constituting the main body, and the means enables a standby 5 - Achieved by providing a method for connecting an svp to any offline main unit and diagnosing the main unit, and performing processing such as diagnosing a device that has been disconnected due to a failure. Since the standby 5-svp can perform operation/maintenance processing independently from the M-3VP side, the M-5V
This has the advantage of reducing the load on P and shortening the failure recovery time.

ff) Embodiments of the Invention First, to summarize the gist of the present invention, the present invention provides a main body device such as a central processing unit, a main storage device, a channel device, a plurality of SVPs controlling the main body device, and a main body device such as a central processing unit, a main memory device, a channel device, etc. In a data processing system consisting of an SCI between the main unit and the main unit, a circuit is provided for each interface with each main unit in the SCI, and a circuit is provided for selecting connections with the plurality of SvPs, and a circuit is provided for each SvP. The connection specification information that specifies the connection with each main device allows the main device to connect to the above multiple 5V
It is possible to connect to any one of the 11 SvPs.

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a diagram showing the configuration of a data processing system to which the present invention can be applied, and FIG. 3 is a block diagram showing an embodiment of the present invention.

In FIG. 2, 11.12.3 are the same as those explained in FIG. 1, and 4 is an SCI suitable for applying the present invention.
A feature is that the interface lines from SCI 2 are cross-connected at the SCI 4.

The present invention provides that each device (CPUO, CHPO, -, CPPUO, CHPO, -,
U.I.

Focusing on the fact that the interface lines from CIIPl, -) are aggregated and the interface lines from M-3VP 11 and S-5VP 12 are crossed,
M-5VP for each interface line from each device
A selection circuit that can be connected to any one of the 11°S-5VP and 12 is provided.

FIG. 3 shows an example of the above selection circuit, and 11.1
2.3 is the same as that explained in FIGS. 1 and 2, 5 is the ink face control device (SCI) when the present invention is implemented, and 51 is the SVPO (M-5VP) 11
Connection specification register 52 for 5VPI (S-3V
P) A connection designating register for 12, 53 is a selection circuit (SEL), and the feature is that two 5CI4s, which were duplicated in FIG. 2, are integrated.

In this embodiment, 5VPO11 is M-5V
All main devices 3 (CPUO, CIIPO, -,
CPU1. CIIPI.

-) is controlled. Therefore, 5VP
I12 becomes 5-svp.

In each of the above connection specification registers 51 and 52, the main unit f3 (CPUO
, CIIPO, -, CP [11, CIIPI, -), SVPO (M-5VP)
11 or 5VPI (S-3VP) 12, where "l" indicates connection and '0' indicates disconnection, under normal conditions, If the contents of the connection designation register 51 for the SVP (SVPO) 11 are all "t", the contents of the connection designation register 52 for the S-3VP (SVPI) 12 are all "0".

Here, for example, when the old CP ■ goes offline due to a failure, etc., the contents of the connection specification registers 51 and 52 are set to 5vpi (S-svP) 12 only for the CPU ■, as shown in this figure.
By changing the setting so that the selection circuit (SEL) 53 is connected to the individual selection circuits 531 to
5360, etc., function to connect each device to the SvP shown by the dotted line, SVPO (M-3νP) 11 connects all main devices ■ except the CPU ■, 5VPI (S-3VP) 12 connects the above offline It becomes possible to control each of the CPUIs independently.

Cono result, S-5VP (SVPI) 12 is M-5VP
In parallel with the control of operation/maintenance operations for the main unit (SVPO) 11, access such as diagnosis can be performed only to the offline CPIII■.

(g) Effects of the Invention As described above in detail, the main unit connection circuit of the present invention connects a main unit such as a central processing unit, a main storage device, a channel device, and a plurality of SVPs that control the main unit. , the s
In a data processing system consisting of an SCI between a vp and the main unit, a circuit is provided for each interface with each main unit in the SCI to select connections with the plurality of SvPs, and each SvP The connection specification information that specifies the connection with each main device for each case allows the main device to connect to any of the SvPs in the plurality of 5vPOs mentioned above. When this happens, the load on the M-3VP can be reduced and the failure recovery time can be shortened by switching the connection so that the standby system 5-svp performs control such as diagnosis for the CPt1l. effective.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of a conventional data processing system, and FIG. 2 is a diagram showing the configuration of a data processing system to which the present invention can be applied. FIG. 3 is a block diagram showing one embodiment of the present invention. In the drawing, 11 is a master service processor (M-
3VP), 12 is a slave service processor (S
-3VP), 2,4.5 is the interface control device (S(:I), 3 is the main device f((:PIIO,CP
UI, -), 51 and 52 are connection designation registers, 53 is a selection circuit (SEL), and 531 to 536 are device-specific selection circuits. 2

Claims (1)

[Claims] It consists of a main unit including at least a central processing unit, a main storage unit, and a channel device, a plurality of service processors that control the main unit, and an interface control device between the service processor and the main unit. In a data processing system consisting of a master service processor that controls the entire main unit, and a standby slave service processor, the interface control device includes a controller for each interface with each device constituting the main unit. , a means for selecting connection to an arbitrary service processor is provided, and by means of this means, a standby slave service processor is connected to an arbitrary off-line main unit, so that at least diagnosis of the main unit can be performed. A main device connection circuit characterized by: