JPS6157536U - - Google Patents
Info
- Publication number
- JPS6157536U JPS6157536U JP1984142970U JP14297084U JPS6157536U JP S6157536 U JPS6157536 U JP S6157536U JP 1984142970 U JP1984142970 U JP 1984142970U JP 14297084 U JP14297084 U JP 14297084U JP S6157536 U JPS6157536 U JP S6157536U
- Authority
- JP
- Japan
- Prior art keywords
- heat dissipation
- metal part
- electrical connection
- integrated circuit
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/877—Bump connectors and die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/761—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
- H10W90/764—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between a chip and a stacked insulating package substrate, interposer or RDL
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984142970U JPS6157536U (enExample) | 1984-09-21 | 1984-09-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984142970U JPS6157536U (enExample) | 1984-09-21 | 1984-09-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6157536U true JPS6157536U (enExample) | 1986-04-17 |
Family
ID=30701283
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1984142970U Pending JPS6157536U (enExample) | 1984-09-21 | 1984-09-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6157536U (enExample) |
-
1984
- 1984-09-21 JP JP1984142970U patent/JPS6157536U/ja active Pending
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