JPS6156951B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for detecting the speed of a synchronous motor, and particularly to a method suitable for detecting the speed of a synchronous motor at low speeds.

A rotating field type synchronous motor has an armature as a stator and a field pole as a rotor. By passing three-phase alternating current to the stator winding (armature winding), a rotating magnetic field is generated and the field pole is It is pulled by the rotating magnetic field and rotates at the same speed as the rotating magnetic field. As a control method for such a synchronous motor, a method has been developed that can perform instantaneous value control of the stator current (armature current) to generate torque equivalent to that of a DC motor. 1st
FIG. 4 is an explanatory diagram illustrating such a synchronous motor control method.

In general, the torque generation mechanism of a shunt-wound DC machine uses a commutator to switch the current so that the armature current Ia is always perpendicular to the main magnetic flux φ, as shown in Figure 1a and b. The generated torque T is expressed by the following equation, and if the main magnetic flux φ is constant, the torque T is proportional to the armature current Ia.

T=kφIa (1) In Fig. 1, FM is the field pole, AM is the armature, and AW is the armature winding.

Now, if the above relationship is applied to the rotating field type synchronous motor shown in Fig. 2, φ is the main magnetic flux vector φ〓s of the field pole PM, and Ia is the current vector I〓s of the armature winding SW. can be made to correspond to each
The generated torque T of the synchronous motor is T=k′φsIscosγ (2). Here, γ is the equivalent circuit of a synchronous motor. Referring to Figure 3, armature current Is and induced electromotive voltage
This is the phase difference of Eo. In addition, in Fig. 3, γa
is the resistance of the armature winding SW, and Xs is the synchronous reactance considering armature reaction and armature leakage flux.

Therefore, if the induced electromotive voltage Eo and the armature current Is are made in phase, in other words, if the main magnetic flux φ〓s and the armature current I〓s are controlled to be orthogonal, the torque given by equation (2) can be obtained. T becomes T=k′φsIs=K _T I _S (3), and it is possible to drive a synchronous motor equivalently to the torque generation of a DC motor. However, K _T is a conversion constant.

Therefore, in the proposed method, the phase of the induced electromotive force Eo is detected, a current command having the phase is generated, and this current command is applied to the armature winding of the synchronous motor, which is equivalent to a DC motor. The synchronous motor is driven and controlled. In addition, the induced electromotive force Eo
Since the phases of the main magnetic flux and the main magnetic flux are shifted by 90 degrees, the phase of the induced electromotive force Eo can be detected from the position of the main magnetic flux, in other words, the field pole. FIG. 4 is a circuit block diagram for realizing such a synchronous motor control system.

In the figure, 101 is a rotating field type synchronous motor;
A resolver 2 is connected to the shaft of the synchronous motor, and detects the position of the field pole of the synchronous motor.
This resolver has a rotor 102 as shown in FIG.
a, a rotor winding 102b, and two stator windings 102c arranged with a phase of 90° to each other,
102d, and a carrier wave generation circuit 102e that generates a sinwt carrier wave. Now rotor 102
Assuming that a is at the angle θ, the stator windings 102c and 102d output voltages expressed by the following equations, e _a =sinθ·sinwt (4) e _b =cosθ·sinwt (5), respectively. That is, the resolver 102 outputs a sine wave voltage e _a and a cosine wave voltage e _b corresponding to the position θ of the field pole of the synchronous motor 101 . 103
is a synchronous rectifier circuit, which synchronously rectifies the sine wave voltage e _a and the cosine wave voltage e _b to obtain sinθ,
Output cosθ (Figure 6). 104a is a quadrupling circuit which converts the sine wave signals e _a and e _b into a pulse train and multiplies the frequency by four. In addition, this quadrupling circuit 104a monitors the phases of the two-phase sine wave signals e _a and e _b , and when they are rotating in the normal direction, sends a normal rotation pulse Pn of 4 times the frequency to the line _l1 , and reverses them. If the line l ₂
A reversing pulse Pγ having a frequency four times that of the first one is outputted respectively. 104b is a frequency-voltage converter (F/
105 is a calculation circuit that calculates the difference (hereinafter referred to as speed error) ER between the speed command voltage VCMD commanded from a speed command circuit (not shown) and the actual speed voltage TSA (hereinafter referred to as speed error), and 106 is a calculation circuit that amplifies the speed error ER. Error amplifier that outputs the armature current amplitude Is, 1
07 and 108 are multiplication circuits that multiply the error amplifier output and the output cosθ and sinθ of the synchronous rectifier circuit 103 to obtain two-phase current commands I〓 ₁ a (=Is・sinθ), I〓 ₁ b (=
Is・cosθ) are output respectively. 109 is a 2-phase to 3-phase conversion circuit that converts a 2-phase signal into a 3-phase signal, and has a circuit configuration as shown in FIG. That is,
The 2-phase to 3-phase conversion circuit includes two operational amplifiers OA1 and OA2, 10KΩ resistors _R1 to _R4 ,
It has a resistance R ₅ of 5.78KΩ and a resistance R ₆ of 5KΩ. Now, by determining the values of each resistor R ₁ to _{R 6} as described above and connecting them as shown, the terminals Tu,
From Tv and Tw respectively is output. And these I〓u, I〓v, I〓w
have a phase difference of 2π/3 from each other, and are three-phase current commands that are in phase with the induced electromotive force Eo.

110U, 110V, and 110W are arithmetic circuits provided for each phase, respectively, and command currents I〓u,
I〓v, I〓w and actual phase currents I〓au, I〓av, I〓aw
111 is an arithmetic circuit that adds I〓av and I〓aw and outputs the U-phase phase current I〓au. 112V and 112W are V-phase and W-phase phase currents, respectively. Current transformer that detects I〓av, I〓aw, 1
13U, 113V, and 113W are current amplifiers each provided for each phase and amplifying the current difference between each phase;
14 is a pulse width modulation circuit; 115 is an inverter controlled by the output signal of the pulse width modulation circuit;
16 is a three-phase AC power supply; 117 is a known rectifier circuit that rectifies three-phase AC into DC; a group of diodes 117a;
and a capacitor 117b. The details of synchronous control have been described above, but in order to accurately control such a synchronous motor, the rotational speed must be detected with high precision at both low and high speeds. Note that the above explanation is for a case where a resolver is used as a position detector, and in this case, a tachogenerator is used as a speed detector. However, this method is not often used because it costs more than a method that uses a pulse generator as a position detector and also performs speed detection. For this reason, a method is required that accurately detects the speed from the pulse generator.

By the way, in the conventional speed detection method, the fourth
As shown in the figure, the pulse generator 102 generates two-phase signals e _a and e _b that are out of phase with each other by π/2 and have a frequency proportional to the rotational speed of the motor. to a frequency 4 signal, and finally frequency 4
A frequency-voltage converter 10 that generates a voltage proportional to
4b to the voltage proportional to the rotational speed (actual speed voltage
TSA). However, in such a method, when the motor speed becomes low, the output voltage value of the frequency-voltage converter is no longer proportional to the rotational speed and rapidly decreases. Furthermore, rather than converting the frequency of the pulse signal generated from the pulse generator 102 into a frequency/voltage, it is preferable for LSI implementation to have the microcomputer directly read the pulse signal as a digital quantity. Therefore, various methods of digitally reading the speed have been proposed. FIG. 8 is an explanatory diagram of a conventional example in which pulses generated from a pulse generator 211 are counted for a predetermined period of time and outputted to a microcomputer. In this method, a pulse generator 211 is provided, and each time the motor rotates a predetermined amount, a pulse is generated from the pulse generator 211, and this pulse is sent to a counter 21.
2, the contents of the counter are transferred to the register 213 and reset at predetermined time intervals, and then the contents of the register are read by the microcomputer 214 as the actual speed. Thereafter, the above operation is repeated to obtain the actual speed digitally. However, although this method allows accurate speed detection at high speeds, it is not possible to accurately detect speed at low speeds because the pulse period generated from the pulse generator 211 increases. By the way, to increase the resolution at low speeds, pulse generator 2
Either the number of pulses per revolution generated from 11 must be increased, or the reading period must be lengthened. However, the number of pulses generated by the pulse generator 211 is limited to 10,000 pulses per rotation, and resolution cannot be improved to this extent. Therefore, resolution cannot be increased by the former method. Therefore, the resolution cannot be increased by the former method. On the other hand, the latter means of lengthening the reading cycle deteriorates control responsiveness. That is, the register 21 is processed by a microprocessor.
Considering the responsiveness of the speed control system, the reading cycle (sampling cycle) of No. 3 must be about 1 ms, and the responsiveness cannot be improved. In the following, the sampling period is 1 msec, the output pulse Pc generated from the pulse generator 211 is 10000 [pulses/rotation], and the case where the motor is rotating at an extremely low speed of 1 rpm will be explained according to Fig. 9. do. In FIG. 9, Spi is a sampling pulse, Pc is a pulse generated from the pulse generator 211, and [CN] is a count value of the counter 212. Now, the pulses Pc from the pulse generator 211 are counted by the counter 212 as described above, and the contents of the counter are set and reset in the register 213 in synchronization with the sampling pulse SPi, and then the contents of the register are transferred to the microcomputer. 214 is read. By the way, since the sampling period is 1 msec and the period of pulse Pc is 6 msec, the count value [CN] of the counter 212 is 1 at the time when the first sampling pulse SP ₁ is generated, but subsequent sampling pulses SP ₂ ~
When SP ₆ occurs, [CN] = O. In other words, the microcontroller has speed data of 1, 0, 0,
Intermittent data of 0, 0, 0 is input. For this reason, it is not possible to perform fast-responsive and accurate speed control. For this reason, the present inventor has proposed a speed detection method that allows accurate speed detection without discontinuing speed data. This proposed method will be described in detail below.

Now, in the previously proposed system, the period T of the pulse Pc generated from the pulse generator during low speed rotation is measured, and the speed is detected using this period T. Now, if the number of clock pulses CP generated within one period of pulse Pc is N, and the period of this clock pulse is ΔT (=0.125 μs), then the frequency of pulse Pc generated from the pulse generator is = 1/T = 1 /N・ΔT (Hz/μsec) = 10 ⁶ /N・ΔT (Hz/sec) = 60×10 ⁶ /N・ΔT (Hz/min), and when ΔT=0.125 is substituted, = 480×10 ⁶ /N (Hz/min) (7) Furthermore, if the number of pulses generated by the pulse generator per rotation is 10,000, the rotational speed n is n=48,000/N (rpm) (8). Therefore, in the previously proposed method, the period T of the pulse Pc generated from the pulse generator at low speeds, in other words, the number N of clock pulses CP generated within one period of the pulse Pc is determined, and (7) or (8) The rotation speed is detected from the formula.

FIG. 10 is a block diagram illustrating this method.

In the figure, 301 is a pulse generator that outputs two pulse signals Pc and Pc' whose phases are shifted by π/2 each time a motor (not shown) rotates by a predetermined amount;
02 is a rotation direction discrimination circuit, which receives a pulse signal
It is determined which of Pc and Pc' is leading in phase and outputs a rotation direction signal SGN. 303 is a counter having a clear terminal CLR count enable terminal EN, a clock terminal CLK, and a carry pulse generation terminal TC. A pulse signal Pc is input to the clear terminal CLR, and "1" is always input to the count enable terminal EN. Therefore, the counter 303 outputs the counted value as a pulse signal.
It is cleared every time Pc occurs, and counts the number of clock pulses CP until the next pulse Pc occurs. 304 is a flip-flop;
It is set every time a carry pulse OFP occurs, and is reset every time a pulse signal Pc occurs. That is, the counter 303 and flip-flop 304 display the number of clock pulses generated within one period of the pulse signal Pc.
Incidentally, if the capacity of the counter 303 is sufficiently large, there is no need to provide the flip-flop 304. 3
05 is an AND gate, and 306 is an n-bit register. Each time the output of the AND gate 305 becomes "1", in other words, each time a pulse signal Pc is generated, the count value of the counter 303 is set. 3
07 is a 2-bit register, and each time the output of the AND gate 305 becomes "1", the set output of the flip-flop 304 and the rotation direction signal SGN are input.
(When it is "1", it is running in the forward direction, and when it is "0", it is running in the reverse direction)
is set. 308 is a division unit which receives the contents of registers 306 and 307, executes the calculation of equation (8), and calculates the rotational speed n. Note that the division unit 308 can be configured using the division function of a microcomputer that digitally processes speed control. Especially in recent microcontrollers, 16-bit division is
Since there are things that can be done in less than μs,
A division unit can be easily constructed using such a microcomputer. Now, in FIG. 10, every time the pulse signal Pc is generated from the pulse generator 301, the counter 303 and the flip-flop 304
is reset, and thereafter these counter 303 and flip-flop 304 count the number N of clock pulses CP until the next pulse signal Pc is generated. This allows the period of the pulse signal Pc to be measured. When the next pulse signal Pc is generated, the contents of the counter 303 and flip-flop 304 and the rotation direction signal SGN are transferred to the register 30.
It is set to 6,307. At the same time, the counter 303 and flip-flop 304 are reset again and start counting the clock pulses CP. Now, the number N of clock pulses CP stored in the registers 306 and 307 is determined by the division unit 30.
8, and the division unit executes the division operation of equation (8) to determine the rotational speed n. In this way, according to the method shown in FIG. 10, even if the rotation speed n is extremely low as shown in FIG. Detection can be performed.

However, in this proposed method, the detection speed is stepped. That is, in this system, the actual speed is calculated every time a pulse is generated from the pulse generator, the detected speed rises to be equal to the actual speed, and thereafter maintains the detected value until the next pulse is generated. For this reason, there is no problem when the speed is constant or changing very slowly, but when the speed is changing relatively suddenly, the step width becomes large and the accuracy between pulses cannot be adjusted. This means that the vehicle will not show a proper speed. This means that a delay element has been introduced into the speed detection system, and with this, the gain of the speed control loop cannot be set high and responsive control cannot be realized.

In light of the above, an object of the present invention is to provide a novel speed detection method that can detect the actual speed of a synchronous motor with higher accuracy.

Embodiments of the present invention will be described in detail below with reference to the drawings.

Now, in the present invention, when a pulse is generated from a pulse generator attached to the shaft of a synchronous motor, the speed is calculated by the method shown in FIG. In other cases, each time an interrupt signal (enable signal) of a certain period is generated, the current actual speed is determined using the past current command value and the past detected speed according to the characteristic formula of the synchronous motor. is calculated and the predicted speed is regarded as the detected speed.

Next, the prediction calculation of the actual speed will be explained.
The torque T of a synchronous motor is the inertia of the motor J
_M (Kg・cm・sec ² ), the inertia of the load is J _L
[Kg・cmsec ² ], the rotational speed is v and the load torque is
If T ₀ [Kg・cm], then T = (J _M + J _L ) dv/dt + T ₀ ...(9), and from equations (3) and (9), K _T I _S = (J _M + J _L ) dv/ dt+T ₀ ...(10) holds true. If we transform equation (10), we get dv=K _T I _S dt/(J _M +J _L )−T ₀ dt/J _M
+ _JL . Since dv=v(k+1)-v(k), v(k+1) =v(k)+K _T・ΔI _S /(J _M +J _L )−ΔT
₀ /(J _M + J _L )...(11) holds true. When formula (11) is converted into a discrete value system with a sampling period T _S , v(k+1) = v(k) + K _T T _S / (J _M + J _L ) I _S (k-
1) _−TS /( _JM + _JL ) _T0 (k)...(12) holds true. By the way, it can be considered that the load torque T ₀ does not change between each sampling, and therefore Δ
In order to consider T ₀ = O, equation (12) is v (k + 1) = v (k) + K _T・T _S / (J _M + J _L ) I _S (k
−1)…(13) If we further transform equation (13), we get v(k) = v(k-1)+K _T・T _S /(J _M +J _L )・I
_S (k-2)... (14)

Therefore, the detection speed v(k-
1) and the current command value I _S (k-
If 2) is known, the rotation speed can be estimated from equation (14).

FIG. 12 is a block diagram of an embodiment according to the present invention, FIG. 13 is a time chart thereof, and FIG. 14 is an explanatory diagram of detection speed. Note that the same parts as in the conventional device shown in FIG. 4 are given the same reference numerals.

In the figure, 401 is a speed detection section, which has the configuration shown in FIG. 10 (however, the pulse generator 301 and
(excluding division unit 308). 40
Reference numeral 2 denotes a flip-flop, which is set by the pulse Pa generated from the pulse generator 102 and reset by the speed calculation end signal OPEN generated from the processing device 113. Reference numeral 403 denotes an interrupt pulse generation circuit that generates a speed calculation interrupt signal (speed calculation enable signal) ITP at a constant period. In addition, VD is the digital command speed, and AV is the first
This is a digital value indicating the cycle output from the registers 306 and 307 shown in FIG.

Next, the speed detection operation will be explained.

From the pulse generator 102 at time t ₁ (13th
When pulse Pa occurs in FIG. 1, flip-flop 402 is set. In this state, if the interrupt pulse generation circuit 403 generates an interrupt pulse ITP with a constant period (time t ₂ ), the processing device 113
First, it senses whether the flip-flop (FF) 402 is set. in this case,
Since FF402 is set, processing device 1
13 uses the period AV of the pulse Pa inputted from the speed detection unit 401 to perform the division operation of equation (8) to obtain the rotation speed. After the calculation is completed (time t ₃ ), the processing device outputs a speed calculation end signal OPEN to reset the flip-flop FF 402 to the initial state. Thereafter, the processing device 113 determines the speed deviation and generates the primary current amplitude signal I _S based on the speed deviation.
Output. This commands the primary current to the synchronous motor in the subsequent circuit function.

The above is a case where the FF 402 is set, but when it is reset, prediction calculation of the rotational speed is performed. That is, when the interrupt pulse ITP occurs at time _t4 , the processing device 113
402 is sensed. Processing device 11
3 is the past detected speed v (k-1) and past current command I _S (k-2) stored in the data memory 113c if the FF 402 is not set.
The rotation speed v(k) is predicted by executing the calculation of equation (14) using Then, using this rotation speed v(k) as the actual speed, the difference between it and the command speed VD is determined, and the primary current command is output in the same manner as described above.

Thereafter, since the FF 402 is not set at times _t5 and _t6 , the processing unit 113 calculates the equation (14) to predict the actual speed. At time _t7 , a pulse Pa is generated from the pulse generator 102, the FF 402 is set, and rotational speed processing using the same pulse period AV as described above is performed.

As a result, when the actual speed va of the synchronous motor changes as shown in FIG. 14a, the rotational speed detected by the present invention changes as shown by the solid line in FIG. 14b,
Compared to the previously proposed method shown by the dotted line, the step width is much smaller, allowing highly accurate speed detection.

As described above, according to the present invention, the rotational speed can be detected with very high accuracy, and it has become possible to drive a synchronous motor with high gain and excellent responsiveness. It should be noted that the present invention is not limited to the synchronous motor control method shown in the embodiment, but can of course be applied to other methods. Further, although past current command values are used in the predictive calculation of equation (14), past actual current values may be used.

[Brief explanation of the drawing]

1 to 3 are explanatory diagrams illustrating the synchronous motor control system, FIG. 4 is a synchronous motor drive circuit block diagram, FIG. 5 is an explanatory diagram of the resolver, and FIG. 6 is an explanatory diagram of the output waveform of the resolver. Fig. 7 is a circuit diagram of a 2-phase to 3-phase conversion circuit, Figs. 8 and 9 are explanatory diagrams of the conventional speed control method, and Figs. 10 and 11 are explanatory diagrams of the already proposed speed detection method. , FIG. 12 to FIG. 14 are explanatory diagrams of the present invention, in which FIG. 12 is a block diagram of the same, FIG. 13 is a time chart of the same, and FIG.
FIG. 4 is an explanatory diagram of the same detection speed. 101...Synchronous motor, 102...Pulse generator, 113...Microcomputer, 113c...Data memory, 401...Speed detection section, 402...Flip-flop, 403...Interrupt pulse generation circuit.

Claims (1)

[Claims] 1 Synchronization driven by a current command that is periodically output so that the armature current in phase with the induced electromotive force flows in the armature winding, and the magnitude depends on the deviation between the speed command and the actual speed. A motor speed control system includes a pulse generator that generates a number of pulses proportional to the amount of rotation of a synchronous motor or the amount of movement of a mechanical movable part, a means for timing the period of the pulses, and an enable signal of a constant period. a speed calculation means for calculating the actual speed of the synchronous motor each time the pulse generator generates a pulse, and the speed calculation means calculates the actual speed using the period in synchronization with an enable signal when a pulse is generated from the pulse generator. In other cases, a synchronous motor is characterized in that the current actual speed is predictively calculated using a previously output current command value in synchronization with an enable signal, or an actual current value and past actual speed. speed detection method.