JPS6156327A - Driving method of display panel - Google Patents

Abstract

PURPOSE:To execute an image display of high quality by applying a video signal which is inverted at every period of an integer multiple of one horizontal scanning period, and also whose phase has been inverted at every one vertical scanning period. CONSTITUTION:A frequency divider 20 of a display panel driving circuit divides a frequency of a horizontal synchronizing signal HD into two, and a video signal is controlled by a polarity inverting circuit consisting of an invertor 3 and a switch 4. Also, a set-reset signal generated from a frequency divider 21 and a pulse distributing circuit 22 is applied in advance, therefore, as for an output of a frequency divider 20, its phase is inverted at every period of a vertical synchronizing signal VD. By using this circuit, a signal whose period is shorter than one vertical scanning period, and an integer multiple of one horizontal scanning period, and also whose phase has been inverted at every one vertical period can be applied. In this way, such pehnomena as a luminance gradient in the upper and lower directions and tailing in the upper and lower directions of an image, or a flicker are not generated.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a display panel equipped with an active matrix substrate, and particularly to a liquid crystal display panel that displays multivalued images.

2. Description of the Related Art Conventionally, display panels have been proposed that display multivalued images, such as television images, using high-density two-dimensional matrix liquid crystal panels (active matrix liquid crystal panels) using thin film transistors (TPTs).

In a conventional display panel, for example, as shown in FIG. 1, a signal obtained by sampling and holding a video signal is supplied to a source line S, and a vertical scanning signal is applied to a gate line G. While the gate line G is ON, conduction occurs between the source S of the TPT and the source line 19470, and the voltage of the source line S is transferred to the equivalent capacitance CLC of the liquid crystal cell 14. This situation is shown in Figure 4. In FIG. 2, the voltage of the source line Sl is transferred to LC,,,'LCI, at the timing of the gate lines Gl and Gn, respectively, and v
The voltage is held for one vertical scanning period like LCJI and VLC/RE. However, since the TPT includes a leak resistance 13 like Roff shown in FIG. 1, the charge stored in CLc of the liquid crystal cell 14 passes through Roff.
Discharge to source line S.

As a result, the voltage decreases as shown by the dotted line at 1/'L, the transmittance of the pixel LCI decreases, and the image becomes dark. This leakage waveform differs depending on the phase relationship between each VLC and the signal on the source line S. When the phase is almost the same as that of the source line as shown in Fig. 2, VLo, /, the potential difference between VLC and the source line is small, and leakage does not occur. Although it will be less, v
When the phase difference between VLC and the source line is large, as in LCIA, the potential difference between v-〇 and the source line is also large,
The leakage will also increase.

Therefore, a brightness gradient occurs from the top to the bottom of the image. Alternatively, when an image signal as shown in FIG. 351 is applied, v and is changed by the waveform of S'l as shown by the dotted line on VLCII. On an image, this phenomenon appears as if a tail is trailing in the vertical direction of the image.

Furthermore, if the source voltage of the TPT is inverted every vertical period, the operating point of the TPT will be different every vertical period, and the nonlinearity of the TPT will cause the operating waveform to become asymmetric, causing flicker. Problems also arise.

As explained above, in the conventional driving method, phenomena such as vertical brightness gradient of the image, trailing in the vertical direction of the image, and flicker occur, degrading the image quality.

It is an object of the present invention to eliminate the drawbacks of the above-mentioned conventional examples and to provide a method for driving a display panel with high image quality.

An object of the present invention is to provide a display panel equipped with an active matrix using a display panel driving method that applies a video signal whose phase is inverted every integer multiple of the horizontal scanning period and whose phase is inverted every vertical scanning period. achieved.

The present invention will be explained below with reference to the drawings.

FIG. 4 shows a drive circuit for the display panel of the present invention. In Fig. 4, 1 is a video signal input terminal, 2 is an amplifier that amplifies the input video signal, 3 is an inverter that inverts and amplifies the amplified video signal, and 4 is the output terminal of the amplifier 2 and inverter 3. 5. Switches that are switched according to the polarity of a signal obtained by dividing a vertical synchronization signal by two, which will be described later; T1 to Tm are switches for distributing the signals switched by the switch 4 to the capacitors C1xCm, respectively, according to control signals H1 to Hm;5. -5m is capacitor C.

A source line of the liquid crystal panel 11 connected to ~Cm.

GINGn is the gate line of the liquid crystal panel 11, LC, 1 to L
Cnm is each pixel of the liquid crystal panel, 5 is the horizontal synchronization signal (HD
) input terminal, 6 is a clock generation circuit that generates approximately m times the HD clock, and 7 is the output of the clock generation circuit.
A horizontal shift register that generates sequential scanning pulses H and NHm synchronized with HD, 8 is a vertical synchronizing signal (VD) input terminal, and 10 is a vertical shift register that shifts at the HD cycle and generates sequential scanning pulses synchronized with VD. , 20 is a frequency divider (I) that divides HD by 2, 21 is a frequency divider (II) that divides VD by 2, 22 is a frequency divider (I), and a pulse that generates a pulse to set/reset 20. It is a distribution circuit.

In the drive circuit described above, a video signal such as a television signal is input to the video signal input terminal 1, and is amplified by the amplifier 2 to a signal amplitude suitable for driving the liquid crystal. The amplified video signal is supplied to switch 4 and inverter 3.

The switch 4 generates a video signal selected from the outputs of the amplifier 2 and the inverter 3 according to the polarity of the output signal of the downstream frequency divider (I) 20. This is a necessary operation to drive the liquid crystal with alternating current. This signal is applied to the common terminal of switches T5-Tm, and according to control signals H4-Hm, capacitor C
t''Cm and source lines 51~ connected to 01~Cm
It is distributed to Sm. The control signals H1 to Hm input a clock approximately m times the horizontal scanning period generated by the clock generation circuit 6 into the horizontal shift register 7, and from H1 to Hm,
It is designed to scan sequentially within one horizontal period, and by sequentially turning on switches T to Tm for one clock period, horizontal pixels LCk, to LCkm (k=1 to n ) Sample and hold the video signals corresponding to each. The signals sampled and held in C1 to Cm are turned ON during the horizontal retrace period of the video signal, and one of the gate lines 01 to Gn is turned ON, and the signal is 1947.
It is transferred to the pixel L Ck l" L Ck m for display. HD is used as a clock for the gate lines Gi to Gn, and signals are vertically shifted to sequentially scan from G to Gn within one vertical scanning period. It is generated and added by the register 10. The timings of H1 to Hm and G+ to Gn are shown in FIG.

With the above configuration, a television image is displayed on the liquid crystal panel 11.

In the above configuration, the frequency divider (I) 20 divides the HD by two, and the frequency divider (I) 20, which controls the video signal with a polarity inversion circuit consisting of an inverter 3 and a switch 4, has one frequency. A set-reset signal generated from the frequency generator (II) 21 and the pulse distribution circuit 22 is added, and this set-reset signal is configured to alternately repeat set and reset every VD cycle. , frequency divider (r) 20
The phase of the output is inverted every VD cycle.

By using this circuit, H<IH is shorter than IVD.
A signal having a cycle that is an integral multiple of D and whose phase is inverted for each IVD can be applied to COM.

Next, operation waveforms in a display panel using the above-described drive circuit will be explained. The polarity-inverted video signal is transferred to the fifth
The COM signal shown in FIG. 5 is sampled and held on the source line, and becomes as shown in FIG. After this,
The gate line turns ON as shown at G″1.G″n, and S′
1 voltage is transferred to the liquid crystal cell. The voltage of the liquid crystal cell is VL
Since the COM signal shown in C"l/" and "LCτ8" is controlled so that its phase is inverted every VD cycle as described above, vLJ: is inverted every VD cycle.

Here, the influence of the leakage resistance (ROff shown in FIG. 1) of the TPT on the pixel mentioned above will be considered. The charges stored in the capacitance CwC of the liquid crystal cell 14 shown in FIG. 1 are discharged to the source line S via the Roff leak resistance 13. At this time, a waveform as shown in FIG. 5 Sl is given to the source line.

Since this waveform is inverted for each HD, its low frequency component is almost gone, and CLl, = f
The discharge from Roff to the source line S is always performed with Ov as the target value, regardless of the content of the image signal. As a result, phenomena such as a brightness gradient in the vertical direction of an image and trailing in the vertical direction of an image, which occur in conventional display panels, do not occur at all. Furthermore, since the operating point of the FET is always constant, the operating waveform becomes symmetrical and flicker does not occur.

Further, in the second embodiment, the source signal is inverted every HD period, but the inversion period may be shorter than VD and may be an integral multiple of HD. In this case, the power consumption is reduced by reducing the operating frequency. This has the effect of reducing

Furthermore, in the above embodiments, a black and white display was explained, but the exact same driving method can be used for a color display panel that combines a liquid crystal panel with a color filter.In particular, a color image display that requires high image quality can be used. In this case, the effects of the present invention are significant.

As explained above, the source signal is HD
By inverting at a cycle that is an integral multiple of the cycle, high quality is achieved without the problems of conventional problems such as vertical brightness gradient of the image, vertical trailing of the image, or flicker. An image display is obtained.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram showing a constant low circuit in a pixel of a liquid crystal panel. FIGS. 2 and 3 are explanatory diagrams showing operating waveforms in a conventional liquid crystal panel. FIG. 4 is an explanatory diagram showing a drive circuit used in a display panel of the present invention, particularly a liquid crystal display panel. FIG. 5 is an explanatory diagram showing operating waveforms in the display panel of the present invention. 1; Video signal input terminal 2; Amplifier 3; Inverter 4; Polarity inversion switch 5; Horizontal synchronization signal input terminal 6; Clock generator 7; Horizontal shift register 8; Vertical synchronization signal input terminal 10, vertical shift register 11; Liquid crystal panel 12; TFT 13; leak resistance 14; equivalent capacitance of liquid crystal 15; counter electrode of liquid crystal cell 20.21; frequency divider 22; pulse distribution circuit 51-5m
; Source line 01~Gm; Gate line

Claims (2)

[Claims] (1) In a method of driving a display panel equipped with an active matrix, a display characterized by applying a signal whose phase is inverted every integer multiple of one horizontal scanning period and whose phase is inverted every one vertical scanning period. Panel driving method. (2) The display panel driving method according to claim 1, wherein the period that is an integral multiple of one horizontal scanning period is shorter than one vertical scanning period.