JPS6155995A - Method of producing multilayer circuit board - Google Patents

Method of producing multilayer circuit board

Info

Publication number
JPS6155995A
JPS6155995A JP59177762A JP17776284A JPS6155995A JP S6155995 A JPS6155995 A JP S6155995A JP 59177762 A JP59177762 A JP 59177762A JP 17776284 A JP17776284 A JP 17776284A JP S6155995 A JPS6155995 A JP S6155995A
Authority
JP
Japan
Prior art keywords
hot plate
boards
multilayer
circuit board
multilayer circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59177762A
Other languages
Japanese (ja)
Inventor
敏郎 児玉
三ツ井 久三
桜木 信男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59177762A priority Critical patent/JPS6155995A/en
Publication of JPS6155995A publication Critical patent/JPS6155995A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はボイドの含有を抑制した多層配線基板の製造方
法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for manufacturing a multilayer wiring board in which inclusion of voids is suppressed.

大量の情報を高速に処理するため情報処理装置はIC,
LSIなどの半導体素子を多用して高密度実装が行われ
ている。
In order to process large amounts of information at high speed, information processing equipment uses IC,
High-density packaging is being carried out by making extensive use of semiconductor elements such as LSI.

すなわち部品搭載が行われるプリント配線基板は多層基
板が使用されているが、この構成層数は次第に増加し、
最近では1ONを越えるものも実用化されている。
In other words, multilayer boards are used for printed wiring boards on which components are mounted, but the number of constituent layers is gradually increasing.
Recently, devices exceeding 1ON have been put into practical use.

ここで、IC:、l、81などの能動素子またコンデン
サ。
Here, IC: an active element such as , l, 81 or a capacitor.

抵抗器などの受動素子を装着するため多層プリント配線
基板には2.5m++の基準ピッチで必要個所にスルー
ホールが設けられている。
In order to mount passive elements such as resistors, the multilayer printed wiring board is provided with through holes at necessary locations at a standard pitch of 2.5m++.

またこれら部品は小形化されていると共に形状寸法およ
びリード線間隔なども2.5鶴の基準寸法の整数倍に規
格化されている。
In addition, these parts are miniaturized, and their shapes and lead wire spacing are standardized to integral multiples of the standard dimensions of 2.5 cranes.

このように搭載部品の小形化と半導体素子の大容量化及
び規格化によって多層プリント配線基板(以下略して基
板)の配線パターンも微細となり、パターン幅が150
μm程度のものも実用化され高密度の配線が行われてい
る。
As described above, due to the miniaturization of mounted components and the increase in capacity and standardization of semiconductor elements, the wiring patterns of multilayer printed wiring boards (hereinafter referred to as "boards") have also become finer, and the pattern width has become 150 mm.
Threads on the order of micrometers have also been put into practical use and are used for high-density wiring.

このように情報処理装置に使用される基板は多層化と共
に微細パターンが形成されているので、眉間の絶縁が完
全であり、また層間にボイド(空隙)が存在しないこと
が配線パターン間の絶縁保持のために必要である。
In this way, the substrates used in information processing devices are multi-layered and have fine patterns formed on them, so the insulation between the wiring patterns must be maintained completely and without voids between the layers. It is necessary for

そこでボイドの含有が少なく、また均一な面内特性を備
えた多層基板の製法の確立が望まれている。
Therefore, it is desired to establish a method for manufacturing a multilayer substrate that contains fewer voids and has uniform in-plane characteristics.

〔従来の技術〕[Conventional technology]

多層基板の製造は積層金型に予め別個にパターン形成し
た複数個の両面プリント板をプリプレグを挟んで積層し
、基準ピンを用いて正確に位置合わせした状態で熱圧着
して融着し一体化する。
Multilayer boards are manufactured by laminating multiple double-sided printed boards with pre-prepared patterns in a lamination mold with prepreg sandwiched between them, and using reference pins to accurately align them and heat-press them to fuse and fuse them together. do.

ここでパターン形成は銅張り積層、板に写真食刻技術(
ホトリソグラフィ)を用いて微細な導体パターンを形成
したものであり、またプリプレグは半硬化状態のエポキ
シ樹脂をガラス布に含浸させたボンディングシートであ
る。
Here, the pattern is formed using copper-clad lamination and photo-etching technology (
Prepreg is a bonding sheet made by impregnating glass cloth with semi-cured epoxy resin.

第3図は従来の製造方法を示すもので、導体パターン層
lを両面に形成したプリントa板2をプリプレグ3で挟
んで交互に積層金型4に積層し、基準ピン5を用いて正
しく位置決めする。
Fig. 3 shows a conventional manufacturing method, in which printed A boards 2 with conductor pattern layers l formed on both sides are sandwiched between prepregs 3 and alternately stacked on a lamination mold 4, and are positioned correctly using reference pins 5. do.

次に銅張り積層板6を上下層とし、このようにプリント
基板2を積み重ねた積層金型4はクッション材7を介し
、ヒータを備えた熱板8で加熱圧着することにより多層
基板を一体化している。
Next, the copper-clad laminates 6 are used as upper and lower layers, and the laminate mold 4 in which the printed circuit boards 2 are stacked in this way is heated and pressed with a hot plate 8 equipped with a heater through a cushioning material 7 to integrate the multilayer boards. ing.

さて積層金型4を用いて位置決めし積層した状態では内
部に多聞の空気を含んでおり、このままの状態で加熱加
圧しプリプレグを溶融させただけの状態では圧力は均一
に加わり含有空気などのガスが抜は切らない状態で保持
されるためボイドが発生してしまう。
Now, when the stacking mold 4 is used to position and stack the layers, there is a large amount of air inside.If the prepreg is simply melted by heating and pressurizing it in this state, the pressure will be uniform and the contained air and other gases will be added. Since it is held in an uncut state, voids occur.

そのため従来はクッション材7の片面に銅箔などを張り
付けて中心部を凸状とし、プリン)i+fflへの圧力
が中央部から周辺部に及ぶように工夫していた。
Therefore, in the past, a copper foil or the like was pasted on one side of the cushion material 7 to make the center part convex, so that the pressure on the cushion material 7 was applied from the center part to the peripheral part.

このようにするとプリプレグ3の溶融は中心部から始ま
るためにガスは中心部から徐々に周辺に移り、またプリ
プレグ3を構成する樹脂も周辺へ均等に流れるために膜
厚分布が均等になる。
In this way, the melting of the prepreg 3 starts from the center, so the gas gradually moves from the center to the periphery, and the resin constituting the prepreg 3 also flows evenly to the periphery, so that the film thickness distribution becomes uniform.

従来はこのようにクッション材7を加工することにより
ボイドの減少と溶着特性の均等化がなされていたがクッ
ション材の加工など面倒であり、またボイドの分布や多
層基板の厚さの分布など基板特性の一様性に乏しい点が
問題である。
Conventionally, by processing the cushion material 7 in this way, voids were reduced and the welding characteristics were equalized, but processing of the cushion material was troublesome, and the board was affected by the distribution of voids and the thickness distribution of the multilayer board. The problem is that the characteristics are not uniform.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

以上記したように多N基板の形成は配線基板を積層した
積層金型を加熱加圧することによりプリプレグを基板と
融着させることにより行われるが、この場合ボイドの除
去が充分でなく、また積層基板の特性について再現性が
充分でないことが問題である。
As described above, multi-N substrates are formed by heating and pressurizing a laminated mold in which wiring boards are laminated to fuse the prepreg to the substrate, but in this case, voids are not removed sufficiently, and the laminated mold is heated and pressed. The problem is that the reproducibility of the characteristics of the substrate is not sufficient.

〔問題点を解決するための手段〕[Means for solving problems]

上記の問題点はパターン形成の終わった複数のプリント
配線基板をプリプレグを介して積層金型に積層し、位置
合わせを行った後、熱板を用いて加熱圧縮して一体化す
る際、互いに凸状の加圧面をもつ熱板を用いて加圧成形
を行う多層配線基板の製造方法により解決することがで
きる。
The above problem occurs when multiple printed wiring boards with pattern formation are stacked on a stacking mold via prepreg, aligned, and then heated and compressed using a hot plate to integrate them. This problem can be solved by a method for manufacturing a multilayer wiring board that performs pressure molding using a hot plate having a shaped pressure surface.

〔作用〕[Effect]

本発明はクッション材を加工し、これによってプリン1
−.1板の中央部に優先的に圧力が加わる従来の方法の
代わりに熱板自体を中央が凸状となるよう形成するごと
によりボイドの含有が僅かでまた特性が優れた多層基板
を製造するものである。
The present invention processes the cushion material, thereby making the pudding 1
−. Instead of the conventional method of applying pressure preferentially to the center of one board, the hot plate itself is formed so that the center is convex, thereby manufacturing a multilayer board with few voids and excellent properties. It is.

〔実施例〕〔Example〕

第1図は本発明を実施した積層プレスの構成図で積層金
型4を用いて位置決めし積層したプリント基板2とプリ
プレグ3などの配置状態は従来と違わない。
FIG. 1 is a block diagram of a lamination press embodying the present invention, and the arrangement of printed circuit boards 2 and prepregs 3, which are positioned and laminated using a lamination mold 4, is the same as in the conventional press.

すなわち積層金型4に備えられている基準ピンを用い、
プリントi板2とプリプレグ3とを交互にまた上下には
銅張り積層板6を配置して正確に位置決めしである。
That is, using the reference pin provided in the laminated mold 4,
The printed i-boards 2 and prepregs 3 are arranged alternately, and copper-clad laminates 6 are arranged above and below for accurate positioning.

一方クッション材9は何等の加工も施されていない。On the other hand, the cushion material 9 is not subjected to any processing.

また熱板10には同心円状或いは同心方形状の段差が設
けられていて中心部が凸状に形成されている。
Further, the hot plate 10 is provided with steps in the shape of concentric circles or concentric squares, and the center portion is formed in a convex shape.

このように段差のある熱板10を用いれば凸状の段差を
備えたクッション材を用いる場合と効果は同様であるが
、中心位置が固定しており、また永久的であるので再現
性は頗る良い。
If the hot plate 10 with steps is used in this way, the effect is the same as when using a cushion material with convex steps, but the reproducibility is excellent because the center position is fixed and permanent. good.

ただし、り・ノション材に加工する場合も同様であるが
、加熱加圧する基板の面積に応じて段差を加減すること
が必要である。
However, in the case of processing into a resin/notion material, it is necessary to adjust the level difference depending on the area of the substrate to be heated and pressurized.

第2図はこの関係を示すもので横軸には基板面積をまた
kilt軸には段差をとっであるが、図から判るように
凸状部分の高さは最大でも200μm程度に過ぎない。
FIG. 2 shows this relationship, with the horizontal axis representing the substrate area and the quilt axis representing the height difference. As can be seen from the figure, the height of the convex portion is only about 200 μm at most.

以上記したように本発明は使用する基板面積に応する熱
板10を用意しておけば良く、これによりボイドの含を
が少なく、また特性の再現性の優れた多層基板を製造す
ることができる。
As described above, in the present invention, it is only necessary to prepare the hot plate 10 according to the area of the substrate to be used, and thereby it is possible to manufacture a multilayer substrate with fewer voids and excellent reproducibility of characteristics. can.

〔発明の効果〕〔Effect of the invention〕

以上のように本発明の実施によりクッション材に加工す
る煩雑さがなくなると共に再現性のすぐれた多層基板の
製造が可能となる。
As described above, by carrying out the present invention, it becomes possible to eliminate the complexity of processing into a cushion material and to manufacture a multilayer substrate with excellent reproducibility.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明を実施した積層プレスの構成を示す断面
図。 第2図は基板面積と熱板段差の関係図。 第3図は従来の積層プレスの構成を示す断面図である。 図において、 2はプリント基板、   3はプリプレグ、4は積層金
型、      5は基準ビン、7.9はクッション材
、  8.10は熱板、である。
FIG. 1 is a sectional view showing the configuration of a lamination press embodying the present invention. Figure 2 is a diagram showing the relationship between the board area and the hot plate step. FIG. 3 is a sectional view showing the configuration of a conventional lamination press. In the figure, 2 is a printed circuit board, 3 is a prepreg, 4 is a laminated mold, 5 is a reference bottle, 7.9 is a cushioning material, and 8.10 is a hot plate.

Claims (1)

【特許請求の範囲】[Claims] パターン形成の終わった複数のプリント配線基板をプリ
プレグを介して積層金型に積層し、位置合わせを行った
後、熱板を用いて加熱圧縮して一体化する際、互いに凸
状の加圧面をもつ熱板を用いて加圧成形を行うことを特
徴とする多層配線基板の製造方法。
Multiple patterned printed wiring boards are stacked in a stacking mold via prepreg, aligned, and then heated and compressed using a hot plate to integrate them. A method for manufacturing a multilayer wiring board, characterized by performing pressure molding using a hot plate.
JP59177762A 1984-08-27 1984-08-27 Method of producing multilayer circuit board Pending JPS6155995A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59177762A JPS6155995A (en) 1984-08-27 1984-08-27 Method of producing multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59177762A JPS6155995A (en) 1984-08-27 1984-08-27 Method of producing multilayer circuit board

Publications (1)

Publication Number Publication Date
JPS6155995A true JPS6155995A (en) 1986-03-20

Family

ID=16036682

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59177762A Pending JPS6155995A (en) 1984-08-27 1984-08-27 Method of producing multilayer circuit board

Country Status (1)

Country Link
JP (1) JPS6155995A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011077210A (en) * 2009-09-30 2011-04-14 Kyocer Slc Technologies Corp Vacuum lamination device and lamination method
JP2013154510A (en) * 2012-01-27 2013-08-15 Fujitsu Ltd Method and apparatus for manufacturing multilayer substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011077210A (en) * 2009-09-30 2011-04-14 Kyocer Slc Technologies Corp Vacuum lamination device and lamination method
JP2013154510A (en) * 2012-01-27 2013-08-15 Fujitsu Ltd Method and apparatus for manufacturing multilayer substrate

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