JPS6154078A - Digital data recorder - Google Patents

Abstract

PURPOSE:To prevent the deterioration of efficiency of using a magnetic tape by storing input data into a buffer memory with at least one scan of capacity and reading and recording the data after a scan of the input data is stored. CONSTITUTION:A register buffer memory 1 has a scan of memory capacity, and input data Din and an external clock CK1 synchronized with it are supplied and the data is written by the CK1. When one scan of the input data stored in a memory 1 is stored, the data is read by a clock CK2, recorded data RDT is recording into a magnetic tape 4 by a recording/reproducing head 3 through a recording circuit 2. On the other hand, by a recording/reproducing head 3, a reproducing signal reproduced from a magnetic tape 4 is supplied into a reproducing buffer memory 6 through a reproducing circuit 5 to prevent the deterioration of efficiency of using the magnetic tape 4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital data recorder that records digital data using a rotary head, and is particularly applicable to a case where input data has a plurality of data rates.

[Conventional technology]

With digital data recorders, the rate of human data (
sampling frequency) may vary depending on the type of observation data, etc.
The input rate is not limited to the highest rate that can be recorded by the recorder, but also a lower rate, for example, a rate that is an integer fraction of the highest rate.

Thus, when the data rate is low, conventional fixed head data recorders use two methods to avoid reducing the efficiency of magnetic tape usage.

One method is to lower the speed of the magnetic tape, and the other method is to reduce the number of heads (number of channels) used when the rate is 172 or less.

[Problem that the invention seeks to solve]

As a digital data recorder, a rotary head type has the advantage of higher recording density than a fixed head type. However, it is difficult to avoid reducing the usage efficiency of magnetic tape in the same way as with fixed heads.

In other words, the method of slowing down the magnetic tape requires changing the speed of the recording head in order to keep the slope of the track formed on the magnetic tape constant, which is difficult to control. The method of reducing the number of heads is inflexible in the case of a rotating head type, since the number of heads is 1 to 4.

Therefore, an object of the present invention is to make it possible to use a magnetic tape more than once when the data rate of human data is as low as the highest rate of 172 or less without changing the number of heads, thereby improving the efficiency of magnetic tape usage. An object of the present invention is to provide a digital data recorder that can prevent data from decreasing.

[Means for solving problems]

The present invention is a digital data recorder that records on a magnetic tape 4 not only the highest data rate that can be recorded, but also a plurality of input digital data that differ by an integer fraction of the highest data rate.

The present invention includes a buffer memory 11.12 capable of storing an amount of digital data that can be recorded in at least one or more trunks formed by one scan of the recording disk 3, and recording on tracks from the buffer memory 11.12. This digital data recorder includes: a recording circuit 2 that controls recording of digital data RDT read out with a system clock CK2 according to the available capacity at every scan according to a data rate conversion ratio;

[Effect]

The input data Din is stored in the buffer memories 11 and 12, which have a capacity for one scan, and the recording operation is controlled so that when the human input data Din is stored for one scan, this input data is read out and recorded. , magnetic tape 4
, an empty space corresponding to the data rate of the input data Din is created, and subsequent recording can be performed in this empty space, thereby preventing a decrease in the usage efficiency of the magnetic tape 4.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows the overall configuration of this embodiment. In FIG. 1, 1 is a recording buffer memory, 2 is a recording circuit, 3 is a recording head, 4 is a magnetic tape, 5 is a reproduction circuit, and 6 is the playback buffer memory.

The recording buffer memory l has a memory capacity for one scan, and stores input data Din and this input data Di.
An external clock CKI synchronized with n is supplied to the recording buffer memory 1, and the external clock CKI is supplied to the recording buffer memory 1.
Input data Din is written by KI. Recording data RDT read from the recording buffer memory 1 in accordance with the system clock CK2 of the digital data recorder is supplied to the recording circuit 2.

The recording circuit 2 is provided with a digital modulation circuit, a recording amplifier, etc., and a recording signal generated at its output is supplied to a recording/reproducing head (rotary head) 3 via a rotary transformer (not shown). It is recorded on the magnetic tape 4. The recording/reproducing head 3 is configured as a multi-channel head in order to record recording signals on a plurality of parallel trunks, for example, four tracks. A recording current enable signal REN is supplied to this recording circuit 2, and only when this recording current enable signal REN is at a high level, a recording current is supplied to the recording/reproducing head 3 and control is performed so that recording is performed.

FIG. 2 shows recording patterns formed on the magnetic tape 4, and the numbers attached to each inclined trunk pattern indicate the scan order and the corresponding scan number. As mentioned above, each scan includes multiple trunks formed simultaneously.

A reproduction signal reproduced from the magnetic tape 4 by the recording/reproduction head 3 is supplied to a reproduction circuit 5. This reproducing circuit 5 includes a reproducing amplifier, a digital demodulation circuit, a bit clock reproducing circuit, etc., and reproduced data PDT obtained as an output thereof is supplied to a reproducing buffer memory 6.

The playback data PDT is written into the playback buffer memory 6 using the system clock CK2, and the playback data PDT is written into the playback buffer memory 6 using the system clock CK2.
1, and output data Dout having the same data rate as the input data Din is obtained.

FIG. 3 is a block diagram of the recording buffer memory l,
FIG. 4 is a block diagram of the playback buffer memory 6.

In FIG. 3, 11 and 12 each have a capacity for data recorded as 1 scan, and indicate banks constituting the reproduction sofa memory 1. In this example, banks 11 and 12 are configured by different memory areas of one memory, for example, RAM. Input data Din and write enable pulse RWE are supplied to the banks 11 and 12. The write enable pulse RWE controls the input of input data to the banks 11 and 12, and when RWE is at a high level, writing is enabled.

Banks 11 and 12 are supplied with a write address from a write-side address counter 13 and a subsequent address from a read-side address counter 14. The write address is generated by the external clock CKI, and the read address is generated by the system clock CK2. A bank switching pulse RX is supplied to the address counters 13 and 14, and switching between the write operation and the read operation of the banks 11 and 12 is controlled.

For example, if the human data is at a normal data rate (i.e., the highest data rate that can be recorded), banks 11 and 12
■Switching is done every scan.

15 indicates a register. This register 15 stores a signal ND indicating the maximum value of the write address, that is, the number of input data within the time of one scan. bank 1
Data read from each of 1 and 12 and register 15
A signal ND from the data selector I6 is supplied to the data selector I6. The data selector 16 sequentially selects the read data of the bank 11 or 12 and the signal ND from the register 15 and outputs the selected data as recording data. In this case, the signal ND is positioned at the beginning of one scan's worth of recording data.

As shown in FIG. 4, the playback sofa memory 6 is composed of banks 21 and 22, and the playback data PDT from the playback circuit 5 is supplied to the banks 21 and 22.

Banks 21 and 22 have write enable pulses PWE
The write operation is controlled by A write address generated by the write address counter 23 from the system clock CK2 and a read clock generated from the external clock CKI are supplied to the banks 21 and 22. The bank switching pulse PX controls switching between the old operation and continuous output operation of the two banks.

A signal ND indicating the number of data located at the beginning of one scan of reproduced data is taken into a register indicated by 25. This signal ND and the read address are supplied to a comparison circuit 27, and it is detected whether or not they match. Comparison circuit 2
The coincidence pulse from 7 is used as a bank switching pulse PX, and the aging operation and read operation of banks 21 and 22 are switched. The read outputs of banks 21 and 22 are supplied to a data selector 26, and output data DouL is taken out at the output of this data selector 26.

The above-mentioned recording puffer memory 1 and reproduction puffer memory 6
This will be explained with reference to the time charts shown in FIG. 5 and below.

FIG. 5 is a time chart during recording when input data Din at a normal data rate is supplied, and FIG. 6 is a time chart during reproduction at that time.

In the following explanation, since the explanation is N-only, a maximum of 10 pieces of data can be recorded on the magnetic tape 4 during one scan, and
The data rate of the input data Din at this time will be explained assuming that eight pieces of data are generated per one scan time.

FIG. 5A shows the external clock CKI, and FIG. 5B shows the external clock CKI.
FIG. 5C shows the input data Din and does not show the bank switching pulse RX. By supplying this bank switching pulse RX to address counters 13 and 14,
The aging and reading operations of banks 11 and 12 are alternately switched for each scan.

Input data (1 to 8) is written to bank 11 during scan time To, and in the next scan time T1, input data (9 to 16) is written to bank 12, and from bank 11, system clock CK2 (second Data is read out according to FIG. 5D). Due to the frequency of this system clock, the time axis of the read data from the bank 11 is compressed, and the rate is such that 10 pieces of data can be included in one scan time. The first data period of this l scan time is blank, followed by eight pieces of data, and between the last piece of data 201, read data with meaningless dummy data added is obtained. It will be done.

The data selector 16 selects the signal ND indicating the number of data as the first data among the 10 data of l scan time, selects the read data of bank 11 as the following 9 data, and therefore the data Record data RDT shown in FIG. 5E is taken out from the output of the selector 16, and this record data RDT is supplied to the recording circuit 2.

As shown in FIG. 5F, the recording circuit 2 is always supplied with a high-level recording current enable signal REN, and recording data RDT is continuously recorded.

The reproduced data PDT recorded as described above is the sixth
It will be as shown in Figure A. As shown in FIG. 6B, the write enable pulse PWE is set to a high level, and during the scan time TI, the zero-order data to be written to addresses (0 to 8) of the bank 21 other than the signal ND indicating the number of data at the beginning. During scan time T2, the external clock CKI (see Figure 5A) scans bank 2 from address (0) to address (8).
1 data is read out sequentially, and when the number of data indicated by the successive address becomes equal to the value of the signal ND, a bank switching signal PX shown in FIG. 6C is generated to switch the bank to be read. Therefore, this bank switching is
This is done every scan.

At the next scan time T3, data is read from the bank 22.

FIG. 6B shows the write enable pulse PWE supplied to the banks 21 and 22. Since this pulse PWE is always at a high level, the reproduced data PD
It is always possible for T to write to both banks 21 and 22. During the scan time T2, the bank 21 is being read and the reproduction data PDT is being written to the bank 22 in parallel. In this way.

At the output of the data selector 26, output data Dout shown in the sixth diagram is taken out.

The recording operation when the input data rate is the usual 172 will be explained with reference to FIG. FIG. 7A and FIG. 7B show the external clock CKI and human horn data Din, respectively.
shows. The input data Din includes four pieces of data per one scan time. Record Panzer Memory 1
Now, banks 11 and 12 are switched every two scans using the bank switching pulse RX shown in FIG. 7C. Further, the seventh diagram shows the system clock CK2.

This system clock CK2 has a constant frequency regardless of the input data rate.

First, input data (1 to 8) is written to bank 11 at scan time T(-1) and TO. At the next scan times T1 and T2, the system clock C
Data is read from bank 11 by K2. During these scan times T1 and T2, input data (9
~16) are written to bank 12.

When the bank 11 is read by the system clock CK2, the bank 11 is read at the scan time TI.
All data will be read out.

Therefore, the recording data R obtained from the data selector 16
As shown in FIG. 7E, DT is the odd-numbered scan time TI, T3 . Valid data exists only during the 100 interval between .

Recording current enable signal REN supplied to recording circuit 2
As shown in FIG. 7F, is set to a high level only during odd-numbered scan times when valid data exists. Therefore,
No signal is recorded during the even scan times, and a second recording can be performed only during the even scan times.

As shown in FIG. 8A, the reproduction buffer memory 6 is alternately supplied with the first recording data and the second recording data (the data number is shown surrounded by O) from the reproduction circuit 5, as shown in FIG. 8A. Ru. Write enable pulse P shown in FIG. 8B
WE is at a high level only during odd scan times,
During this high level period, reproduction data PDT is written to banks 21 and 22.

In other words, during the scan time T1, eight pieces of data (1 to 8) excluding the data count signal ND are written to the bank 21, and during the next scan time T2, control is performed so that nothing is written into the bank 21. be done. At the next scan time T3, bank 2
2 and 8 data excluding the data number signal ND (9 to 1
6) is written, and furthermore, it is controlled so that nothing is written during the next scan time T4. During the scan times T3 and T4, data is read from the bank 21 using the external clock CKI (see FIG. 7A).

Therefore, output data Dout at the original data rate is obtained from the data selector 26, as shown in Figure 8. The banks 21 and 22 are switched by the switching pulse PX shown in FIG. 8C, which is generated when the read address matches the signal ND indicating the number of reproduced data.

Also, when reproducing the data recorded for the second time, write enable pulse PWE is applied only during even scan.
should be set at a high level. In this case, if two sets of buffer memories are provided on the playback side and the playback data of the odd scan time and the playback data of the even scan time are stored in each buffer memory alternately, the first recorded data and the second Recorded data can be played back at the same time.

Note that the input data rate is 1/3 to 1/3 of the normal rate.
4. In the case of 1/4 to 115..., the recording time on the magnetic tape of the predetermined length is tripled, 4 times
It can be made twice as long.

Further, the buffer memory is not limited to the configuration of two banks, but may be configured such that one memory operates asynchronously.

〔Effect of the invention〕

According to this invention, it is possible to use a magnetic tape an integral number of times without changing the number of heads when the data rate of input data is lower than the highest rate, for example, one integer fraction of the highest rate. This can be done without reducing efficiency.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of this invention, FIG. 2 is a route diagram showing a recording pattern of an embodiment of this invention, and FIG. 3 is a diagram showing the configuration of a recording buffer memory in an embodiment of this invention. A block diagram, FIG. 4 is a block diagram showing the configuration of a playback buffer memory in an embodiment of the present invention, and FIG.
6 and 6 are time charts used to explain the operation of recording and reproducing normal data, and FIGS. 7 and 8 each show the operation of recording and reproducing normal data having a data rate of 172. This is a time chart used for explanation. 1: Recording buffer memory, 2: Recording circuit, 3: Recording/playback head, 4: Magnetic tape, 6: Playback buffer memory,
11.12.21.22: Bank.

Claims (1)

[Claims] In a digital data recorder that records a plurality of input digital data having different data rates on a magnetic tape, the data can be recorded on one or more tracks formed by at least one scan of the recording head. a buffer memory capable of storing a certain amount of digital data, and a circuit that controls recording of digital data read from the buffer memory at a clock according to the capacity that can be recorded on the track at every scan according to a data rate conversion ratio. A digital data recorder equipped with .