JPS6150197A - Liquid crystal matrix panel drive - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a driving device for a liquid crystal matrix panel, and particularly to an improvement of a circuit that generates a driving voltage waveform.

[Background of the invention]

Conventionally, it has been known to drive a liquid crystal matrix panel using an alternating current (AC) method using a line-sequential scanning method and an atmospheric pressure averaging method. proposed an IJ panel drive device as shown in Figure 1 (Tokugan No. 112994/1986).

In FIG. 1, reference numeral 10 denotes a liquid crystal matrix node, and a plurality of scanning electrodes X1 to
4 and signal electrodes Y1 to Y4. When the voltage applied to the liquid crystal interposed between the opposing electrodes at the intersection point of the valley matrix exceeds a certain value (referred to as threshold voltage V th), the alignment state of the liquid crystal molecules changes and the light transmittance changes. do.

When displaying images on this type of panel, scanning electrodes X1 to X4 are scanned using a line sequential scanning method that takes into account the characteristics of liquid crystals, while image signals are supplied to signal electrodes Y1 to Y4. In that case, the drive method is as follows:
In order to prevent unevenness in the excited state of the liquid crystal, an AC driving method called a voltage averaging method is preferably used.

In the drive device shown in FIG. 1 which employs such a line +11L order scanning method and voltage averaging method, 12 is a scanning circuit that generates a line sequential scanning signal, and 16.18 is a selection voltage v81 as shown in FIG. , a voltage generation circuit that generates a non-selection voltage VNII, and 2, a first electronic switch circuit that combines the voltages v11+VNIII in accordance with the line sequential scanning signal to synthesize a driving voltage waveform to be supplied to each scanning electrode.
2 is a serial-parallel conversion circuit having an image signal input terminal 22a; 24 is a line memory that stores image signals for one row;
28.30 is the selection voltage vs2 and non-selection voltage VNI! as shown in FIG. '! +: The voltage generating circuits 32 generate voltages Vs2, . (2) A second electronic switch circuit that combines r+sz to synthesize a drive voltage waveform to be supplied to each signal electrode. The electronic switch circuit 20 includes electronic switches 20a and 2 connected to each scanning electrode.
A positive-phase scanning signal is applied to the control terminal of each one of the electronic switches 20a, and a reverse-phase scanning signal is applied to the control terminal of each other electronic switch 20b via the inverter 14. It is now possible to do so. Electronic switch bearings open and close alternately so that when one switch is on, the other switch is off.1. As shown in FIG. 2, a scanning electrode driving voltage waveform Vx consisting of a combination of a selection voltage V s 1 and a non-selection voltage VNIII is generated on the common output side. The electronic switch circuit 32 is also configured in the same manner as the circuit 20 described above, and has electronic switches 32a and 32b connected to each signal electrode, and the control terminal of each electronic switch 32a is connected to the positive phase. An image signal of the opposite phase is applied to the control terminal of each other electronic switch 20b by removing the inverter 26. Electronic switches 32a, 32
Bear b opens and closes in the same way as the electronic switches 20a and 20b described above, and the selection voltage VB! is applied to its common output terminal as shown in FIG. A voltage waveform Vτ for driving the signal electrode is generated from a combination of the voltage waveform Vτ and the non-selection voltage VNB. When driving voltages Vx and Vd are applied to the liquid crystal matrix panel 10, the voltage applied to the liquid crystal at the time of display has an AC waveform of VxVr as shown in FIG. 2, where A is in the selected state, B and C are in the half-selected state, D is in a non-selected state.

In order to obtain the drive voltage waveform shown in FIG. ) A signal with two levels of Vo is used as the selection voltage V s 2.A signal with two levels of O and Vo is used as the non-selection voltage VNl12.
Signals with two levels, o and (1-2/a)VO, are required, respectively, and the voltage generation circuits 16, 18, 28
．． 30 is composed of a pulse oscillator that generates each signal. Note that a is a constant determined according to the optimum driving conditions, and as shown in Japanese Patent Laid-Open No. 50-68419, when the duty ratio is 1/N, it is expressed as a=ζ+1.

In the circuit shown in FIG. 1, the driving voltage waveforms Vx and My as shown in FIG. 3 are generated depending on the case, and VX
An alternating current waveform VY similar to that in FIG. 2 can also be added. In this case, Val is +(11/a)V
Two-level signal of o and -<1-x/a>Vo, ■N81
A 0 level signal is generated as s2 and VNl12 are generated as alternating current signals of ±1/aVo with opposite phases to each other.

However, the above-mentioned conventional devices have two drawbacks: (1) The internal configurations of the voltage generating circuits 16, 18, 28, and 30 are complicated, so changes in device specifications cannot be accommodated, and (2) those voltage generating circuits are (3.
) There are problems such as the difficulty of standardizing the circuit.

[Purpose of the invention]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a liquid crystal matrix panel drive device with a simple configuration that solves these types of problems and allows easy setting of optimal drive conditions and standardization of circuits.

[Summary of the invention]

To summarize the features of the present invention, the circuit that generates the drive voltage waveform to be supplied to the scanning electrodes and/or the drive voltage waveform to be supplied to the signal electrodes is composed of a resistive voltage divider circuit and a group of electronic switch circuits. The point is that it is constructed as a single thing by combining.

A resistive voltage divider circuit has a plurality of resistors connected in series between a pair of potential terminals, and extracts all the potential levels necessary to configure the drive voltage waveform from these potential terminals or the connection point between the resistors. configured.

Further describing a preferred embodiment of the present invention, one of the electronic switch circuits includes a plurality of electronic switch circuits for opening and closing pairs of potential levels in opposite phases in accordance with a synchronizing signal. It has electronic switch tracks and is configured to generate selection and non-selection voltages by these electronic switch tracks.

These features not only simplify the circuit configuration and enable circuit standardization, but also make it extremely easy to deal with changes in device specifications, especially making it easy to set or change optimal drive conditions. There are advantages.

[Embodiments of the invention]

Hereinafter, the present invention will be described in detail with reference to the embodiments shown in the drawings labeled '16≦.

Referring to FIG. 4, a circuit configuration of a liquid crystal matrix panel driving device according to an embodiment of the present invention is shown. In the circuit shown in FIG. 1, the same parts as those in FIG. For simplicity, in this example 3
9 shows the case of driving the liquid crystal matrix panel 10 of X3.
Next, the configuration and operation of the voltage generating circuit 40, which is a feature of the present invention, will be explained in detail. In Figure 4, ell, el
l...e33 indicates the liquid crystal body or pixel located at the matrix intersection point, and Vxt-Vxs indicates the scanning electrodes X1 to
X3't-driving voltage, 7th 1~Vr3 is the signal electrode Y
The voltage for driving l to Y3 is shown. Also, 81~S
3 represents a sequential scanning signal, and L1 to L3 represent each bit of an image signal for one row.

Scanning side selection voltage V s l and non-selection voltage VNg'1
and the signal side selection voltage V s 2 and the non-selection voltage V s
The voltage generating circuit 40 that generates sz has a configuration as shown in FIG. 5, and includes a resistive voltage dividing circuit 43 and an electronic switch circuit 50. The resistor voltage divider circuit 43 includes a resistor 43 connected in series between a pair of potential points 44A and 44F.
A, 43B, 43C, 43D.

43E, a power supply voltage Voo is applied from a power supply terminal 41 via a variable resistor 42 to a potential point 44A, and a potential point 44F is connected to the 01 position or the ground potential. Resistors 43A, 43B, 43C.

The values of 43D and 43E are selected as R1, (a-4)R, R, and R, respectively, in order to obtain the potential levels constituting the selection and non-selection voltages previously explained with reference to FIG. 2, and their resistance ratio is 1. :1:(a-4):1:1. By giving weights to each of the resistors 43A to 43E in this way, the connection points 44B, 44C, 44D, and 44E have the following properties:
When the potential of potential point 44A is Vo and that of potential point 44F is O, (1-1/a)Vo and (1-2/a
)Vo, 2/aVo, 1/aVo can be obtained.

On the other hand, the electronic switch circuit 50 includes electronic switches 51a and 51b, 52a and 52b, 53a and 53b, and 54a and 54b forming four electronic switch pairs 51, 52, 53, and 54, respectively. The output ends of the electronic switches 51a, 51k) are connected to the output terminal 55, and the electronic switch 52a is connected to the output terminal 55.

The output end of 52b is connected to the output terminal 56, and the electronic switch 53a
, 53b are connected to the output terminal 57, and the electronic switch 54 is connected to the output terminal 57.
The output terminals of a and 54b are commonly connected to an output terminal 58, respectively. 48 is a terminal for applying a synchronizing clock signal CP, and this terminal 48 is connected to electronic switches 51a and 52b.

53b, 54b, and an electronic switch 51b via an inverter 49 on the other hand.

It is connected to each control input terminal of 52a, 53a, and 54a. As a result, the electronic switches of each electronic switch pair open and close in opposite phases, such that when one closes, the other opens. One electronic switch 51a of the electronic switch pair 51 is supplied with a voltage vo at a potential point 44A, and the other electronic switch 51b is supplied with a voltage O at a potential point 44F. As shown in FIG. 2, a selection voltage V a 1 on the scanning electrode side is generated in response to the clock signal CP. One electronic switch 52 constituting the electronic switch pair 52
a has connection point 44B+7)! The pressure (1-1/a) Vo is
The other electronic switch 52b has the voltage i/a at the connection point 44E.
vo are respectively supplied, and a non-selection voltage V Nsl on the scan electrode side is generated at the output terminal 56 according to the clock signal CP as shown in FIG. One electronic switch 538 of the electronic switch pair 53 receives a voltage v from the potential point 44A.
O is supplied, and the other switch 53b is supplied with a voltage of 0 from the potential point 44F. Therefore, as shown in FIG. 7, a selection voltage Va2 on the signal electrode side is generated at the output terminal 57 in accordance with the clock signal CP. be done.

Furthermore, one electronic switch 5 of the electronic switch pair 54
4a receives the voltage (1-2/a)Vo of the connection point 44C, and the other electronic switch 54b receives the voltage (1-2/a)Vo of the connection point 44C.
4D voltage 2/aVo is supplied and output terminal 5
8, a non-selection voltage VNlI2 on the signal electrode side is obtained in response to the clock signal CP, as shown in FIG.

As each of the electronic switches shown in FIGS. 4 and 5, an electronic switch made of a complementary metal φ oxide semiconductor (CMO8') integrated circuit as shown in FIG. 6 can be used. In Figure 6,
IN is the input terminal, OUT is the output terminal, VC is the control terminal,
Van indicates a source power source.

Now, with reference to FIG. 8, the overall operation of the circuit shown in FIG. 4 will be briefly described. As shown in FIG.
Scanning signals 81, 82 and 83 are generated from the scanning circuit 12 in response to this. Now, pixels e13+ e22+ e31
, the image signal is sent to line memory 2.
4 to 8 L1. It is generated as shown in L2°L3. When Sl and L3 are at H level, the driving voltage Vxl,
Since Vya is formed by selection voltages VIIL and V++z, pixel e13 is displayed, and similarly, pixel e13 is formed by S2.
When S3 and L2 are at H level, pixel e22 is displayed, and when S3 and L1 are at H level, pixel 831 is displayed. For example, the electrode Xi shown as an example in FIG.
, Yl, respectively applied voltages Vx1. A voltage similar to Vyt is applied, and the pixel is in a half-selected or unselected state.

As described in detail above, this embodiment is advantageous because the selection/non-selection/direct pressure generation circuits have simple configurations, and the electronic switch circuit section 50 and the like can be easily displayed. In addition, since the resistor voltage divider circuit 43'f is used, the magnitude of the power supply voltage V o, o can be directly changed or the resistor 42'f is used.
By changing the value of , one of the reference potentials Vo can be easily changed by K.

By changing the reference voltage Vo, the brightness and contrast of the liquid crystal can be adjusted. Particularly in this case, it is advantageous to use the variable resistor 42 because it can easily accommodate changes in device specifications regarding vo.

Furthermore, setting or changing the optimum driving conditions can be easily carried out by simply adjusting one resistor 43C, and in this respect as well, there is high flexibility for various device specifications.

The present invention is not limited to the embodiments described above, but can be implemented in modified forms. For example, in the above embodiment, the present invention was illustrated with respect to the generation of selection/non-selection voltages that are the basis of the drive voltage waveform shown in FIG. It can also be easily applied when generating a selection voltage waveform. Note that a temperature-sensitive resistor can be connected between the power supply terminal 41 and the potential point 44A instead of or together with the variable resistor 42 in the circuit of FIG. It is extremely beneficial to use one that corresponds to the temperature change in the threshold voltage Vn of the liquid crystal as shown in FIG. 9, since it is possible to automatically compensate for the temperature change in the threshold voltage. .

〔Effect of the invention〕

As described above, according to the present invention, it is possible to obtain a liquid crystal matrix panel driving device with a simple configuration in which optimum driving conditions can be easily set and circuits can be standardized.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a liquid crystal matrix panel driving device according to the prior art, and FIGS. 2 and 3 are waveform diagrams showing drive voltage waveforms when the device of FIG. 1 is AC driven according to the voltage averaging method. , FIG. 4 is a circuit diagram of a liquid crystal matrix panel driving device according to an embodiment of the present invention, FIG. 5 is a wiring diagram showing the detailed configuration of the selection/non-selection voltage generation circuit in the device of FIG. 4, and FIG. 5 is a circuit diagram showing an example of an electronic switch that can be used in the circuit of FIG. 5. FIGS. 7 and 8 are time charts for explaining the operation of the circuit of FIGS. 4 and 5. FIG. 9 is a graph showing an example of the temperature characteristics of the liquid crystal used in the circuit of FIG. 10...Liquid crystal matrix panel, 12...Scanning circuit, 14.26.49...Inverter, 16.18°2
8.30.40...Selection/non-selection voltage generation circuit, 20
．． 32.50... Electronic switch circuit, 22... Series-parallel conversion circuit, 24... Line memory, 42...
Variable resistor for determining applied voltage, 43... Resistance voltage divider circuit, 5
1 to 54...Electronic switch pair. :f1+ca 22 years

Claims (1)

[Scope of Claims] 1. A liquid crystal matrix panel for driving a liquid crystal matrix panel having a plurality of scanning electrodes and signal electrodes arranged to intersect with each other so as to define a large number of matrix intersection points to become pixels, A resistive voltage divider circuit has a plurality of resistors connected between the potential terminals of the resistor and extracts the plurality of potential levels from the potential terminals or the connection point between the resistors, and a resistor voltage divider circuit which has a plurality of resistors connected between the potential terminals of and an electronic switch circuit group that generates a drive voltage waveform to be supplied to the scanning electrode and/or a drive voltage waveform to be supplied to the signal electrode, one of the pair of potential terminals. is connected to one terminal of a power source via a variable resistor, thereby making it possible to freely adjust the potential level at the one potential terminal. 2. In claim 1, the electronic switch circuit group is configured to open and close the selection voltage and the non-selection voltage on the scanning electrode side in opposite phases according to the scanning signal. a first electronic switch circuit which has a pair of electronic switches connected to the electrodes and generates a drive voltage waveform to be supplied to each scanning electrode by the pair of electronic switches; A pair of electronic switches are connected to each of the signal electrodes in order to respectively open and close a selection voltage and a non-selection voltage on the signal electrode side, and the drive voltage waveform to be supplied to each signal electrode is controlled by the pair of electronic switches. a second electronic switch circuit for generating the voltage; and a plurality of electronic switch pairs for opening and closing pairs of the plurality of potential levels in opposite phases in accordance with a synchronization signal, respectively;
and a third electronic switch circuit configured to generate a selection voltage and a non-selection voltage on the scanning electrode side and a selection voltage and a non-selection voltage on the signal electrode side, respectively, by means of these electronic switch pairs. Characteristic liquid crystal matrix panel. 3. In claim 1 or 2, one of the pair of potential terminals is a temperature sensitive device that exhibits a temperature change corresponding to a temperature change indicated by a threshold voltage of a liquid crystal of the panel. A liquid crystal matrix panel driving device, characterized in that temperature changes in the threshold voltage are compensated for by connecting to one terminal of a power source via a resistor.