JPS6149245A - Automatic analyzer of program module structure - Google Patents

Abstract

PURPOSE:To attain the automatic analysis and display of a module structure by extracting a reference instruction of a lower module out of a program read out of a program library and displaying the program module structure after arrangement and storage. CONSTITUTION:When an analysis command for module structure is received by a CPU11 from an input device 14, a source program to be analyzed is read into a temporary memory 12 from a program library 20. Then a pattern of a reference instruction for desired lower module is set according to the using language type. The reference instructions corresponding to each step of a program read out of the memory 12 are checked for extraction of the reference instruction of the lower module. Then the lists of lower and upper modules are produced and an oil list written on a memory 13 is replaced. The module structure is outputted and displayed in response to a display command.

Description

DETAILED DESCRIPTION OF THE INVENTION Purpose of the Invention Industrial Application Field The present invention reads a specified program from a program library and automatically analyzes and analyzes its module structure.
This relates to an automatic analysis device for editing and displaying.

BACKGROUND OF THE INVENTION Programs generally have an open design based on a modular structure in order to respond to a wide variety of user requests and technological innovations.

Traditionally, in order to understand the module structure of a program,
Module structure diagrams were created and managed manually for each program.

Additionally, conventionally only a lower module structure diagram was created for each program.

Problems to be Solved by the Invention As mentioned above, in the past, module structure diagrams were manually created and managed for each program, so each module structure diagram had to be revised every time the module structure of a program was changed. There was a problem in that it required a great deal of effort and errors such as omission of corrections were likely to occur.

In addition, conventionally, only a lower module structure diagram was created for each program, so when focusing on a specific lower module, it is difficult to accurately understand which higher module (program) that lower module is referenced by. was difficult. Therefore, when there is a change in the lower module, there is a problem in that it is difficult to accurately grasp the range of the upper module to which the change applies.

Configuration of the Invention Means for Solving the Problems The present invention solves the above problems by providing a reading means for reading a specified program from a program library, and a lower module reference instruction from the program read from the reading means. The present invention includes an extraction means for extracting, a storage means for organizing and storing the module structure from each lower module reference instruction extracted from the extraction means, and means for displaying the stored contents of the storage means in response to a command. It is configured! Operation The automatic program/module structure analysis device according to the present invention operates to automatically analyze, organize, and display the module structure of a designated program.

Hereinafter, the structure of the present invention will be explained in more detail with reference to examples.

Embodiment FIG. 1 shows an automatic program module structure analysis device 1o according to an embodiment of the present invention, and a program library 2.
FIG.

This program/module structure automatic analysis device 10 includes CPU11. Temporary storage device 12. Storage device 13. It includes an input device 14 and an output device 15.

The operation of the apparatus 10 will be described below using the flowchart shown in FIG.

When the CPU 11 starts operating, first in step 31 it reads a command from the input device 14 using a paper card or the like. If the CPU 1 determines in the secondary step 32 that the instruction from the input device 14 is a module structure analysis instruction, the process proceeds to step 33. In step 33, a source program whose module structure is to be analyzed is determined.

The information is transferred from the program library 20 to the temporary storage device 12. When the CPU 1 completes the program, it proceeds to the next step 34. Step 34
At , the header portion of the program read into the temporary storage device 20 is read and analyzed by the CPU II, and the language type used is recognized.

The CPU 1 sets a pattern of lower module reference instructions necessary for analyzing the module structure in a register according to the language type used. For example, if the language type used is C0BOL, the CPU 11 executes the CALL instruction, C0P, necessary for analyzing the module structure of the source program.
Set patterns such as the Y instruction and Zabus schema entry in the register.

In the next step 35, the first step (single statement) of the source program is read into the CPUI 1. C
The PUI 1 uses the step knobs 36 to 38 to check the first sentence read from the temporary storage device 12 against each pattern set in the register, thereby determining whether this is a CALL instruction or a C0PY instruction.

Check whether it corresponds to any of the lower module reference instructions such as subschema entries. The CPU II is
If the first sentence does not correspond to any lower module reference instruction, the process proceeds to step 39, and it is determined whether the sentence for which the above inspection has been completed is the final sentence of the program read into the temporary storage device 12. .

In this case, since it is not the final sentence, the CPU II operation returns to step 35. In step 35, the next step (1 step) of the program read into the internal storage device 20 is executed.
statement) is read by the CPU II, and this one statement is also checked to see if it corresponds to any of the lower module reference instructions.

In this way, the CPU II sequentially checks each step of the program to see if it corresponds to any of the lower module reference instructions.

If the CPU 1 determines that one sentence of the program read from the internal storage device 12 corresponds to a lower module reference instruction in any of steps 36 to 38, the process proceeds to step 40. CPUII is.

In step 40, one sentence corresponding to the lower module reference instruction is written in the temporary storage device 12.

After step 39, the process returns to step 35.

The extraction of lower module reference instructions as described in - is repeated until the final step of the program is reached. CPU
When I1 determines in step 39 that the program has ended, it proceeds to step 41. The CPU 11 performs step 41.
At , it is determined whether the program whose analysis has been completed is the last program for which an analysis command was issued from the input device 14. If it is not the final program for which an analysis command has been issued, the CPU 11 reads the source program to be analyzed first from the program library 20 into the temporary storage device 12 in step 33. After this, temporary storage device 1
For the program loaded in 2.

of the lower module reference instruction exactly as described above.

Extraction takes place.

When the CPU 1 finishes extracting lower module reference commands as described above for all programs for which an analysis command has been issued, the process proceeds to step 42. In step 42, the CPU 1 organizes the lower module reference instructions extracted from each program to create a list of lower modules referenced by each program and a list of programs (upper module) that refer to each lower module. A list is created and written to the storage device 13. If these lists have already been written, the old lists are updated with the newly created lists. Therefore, each time a program is changed or modified, the module structure list is automatically updated by issuing a module structure analysis command for that program.

FIG. 3 shows an example of a list of lower modules created for each program. In program A,
Lower module (subroutine program) a, b,
c is called and the lower module (registry member) d
, e is C0PY.

It is illustrated that subschemas x and y are referenced. On the other hand, in program B, lower modules b and c are C
It is illustrated that the lower module a is C0PY.

FIG. 4 shows an example of a list of upper modules created for each lower module.

Module a is executed by programs A, D, and E.
It is exemplified that it is ALL. On the other hand, modules b and C are called by programs A, B, and F, and module d is called by program A.

It is illustrated that C0PY is performed by B and H.

' When the CPU II finishes creating the module structure consisting of the list of lower modules and upper modules as described above, the CPU II proceeds to step 43. The module structure that is commanded to be displayed is output to the output device 15 for display, and the operation ends.

The command from the input device 14 has already been created.

If the module structure is to be displayed, the process immediately proceeds from step 1 determination step 32 to step 43, where the module structure for which 9 display is commanded is output to the output device 15 and displayed.

These module structure lists include 9 the date of creation/update 1 the name of the person creating/updating, as appropriate.

The identification number of the affiliation etc. will be added.

Above, the configuration in which the program to be analyzed is temporarily read from the program library into the temporary storage device 12 has been illustrated.
Step by step CPU directly from program library
It may be configured to be read in I1.

In addition, although we have illustrated a configuration in which a list of lower module and upper module is created for each lower module reference instruction,
Regardless of the type of lower module reference instruction, only modules may be list-amplified.

Although the case where the program stored in the program library is a source program has been exemplified, the present invention can be similarly applied to object programs and load modules.

Effects of the Invention As explained in detail above, the present invention automatically associates specified programs and modules.

It is configured to display A7 fold and note 1a2.

It has the advantage that the modular structure of a program can be created and updated quickly and accurately without the great effort and risk of errors as in the past.

In addition, since the configuration creates and updates not only the lower module structure but also the upper module structure, it has the advantage of being able to quickly and accurately grasp the extent of the impact that changes in lower modules have on the upper module. .

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention together with a program library, and FIG. 2 is a flowchart for explaining the operation of the embodiment. FIGS. 3 and 4 are conceptual diagrams showing examples of created module structure lists. 10...Automatic five-way trading device with program module structure, 11...CPU, 12...Temporary storage device. 13...Storage device, 14...Input device, 15...Output device. Tea 1 Zuya #3 side Certain 4th side

Claims (1)

[Claims] Reading means for reading a specified program from a program library; extraction means for extracting a lower module reference instruction from each step of the program read from the reading means; A program module structure automation system comprising: storage means for organizing and storing the program module structure from each lower module reference command; and means for displaying the stored contents of the storage means in accordance with the command. Analysis device.